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1. 发明专利

CA2686677C CONTROL APPARATUS, CONTROL METHOD AND CONTROL PROGRAM 未知
公开(公告)号：CA2686677C
公开(公告)日：2016-08-23
申请号：CA2686677
申请日：2007-06-28
申请人： HITACHI LTD , HITACHI INFORMATION & CONTROL SOLUTIONS LTD
发明人： BANDOU AKIRA , KOBAYASHI MASAMITSU , SHIRAISHI MASAHIRO , ONOZUKA AKIHIRO , UMEHARA TAKASHI , KOKURA SHIN , ISHIKAWA MASAKAZU , FURUTA YASUYUKI , MASHIKO NAOYA , FUNAKI SATORU , SEKI YUUSUKE , OOTANI TATSUYUKI , SASAKI WATARU , OTSUKA YUSAKU , NAKANO AKIHIRO , OZAWA SHOICHI , KASAHARA TAKENORI , IWASAKI YU , KOBAYASHI EIJI
IPC分类号： G05B23/02 , G05B19/048
摘要： A control apparatus has a communication control unit communicably connected to a first communication channel, at least a portion of which constitutes a serial transfer operation. The communication control unit transmits/receives information with respect to an equipment under control via a second communication channel, a portion of which constitutes a parallel transfer operation. The apparatus comprises: a communication channel diagnostic unit for diagnosing an abnormal event such as an open and stuck-at of a parallel transfer portion of the second communication channel under such a condition that a data transfer operation in the second communication channel is interrupted. A signal for instructing an initiation of a diagnosis via the first communication channel is transmitted to the communication channel diagnostic unit.

2. 发明专利

JP2013211049A Control device 有权
标题翻译：控制装置
公开(公告)号：JP2013211049A
公开(公告)日：2013-10-10
申请号：JP2013118170
申请日：2013-06-04
申请人： Hitachi Ltd , 株式会社日立製作所 , Hitachi Information & Control Solutions Ltd , 株式会社日立情報制御ソリューションズ
发明人： FUNAKI SATORU , KIYOFUJI YASUHIRO , SUENAGA MASASHI , OGURA MAKOTO , KOBAYASHI EIJI , ONOZUKA AKIHIRO , SEKI YUSUKE , SHIMIZU TOSHIKI , TAHARA YUKIKO , SUGIMOTO YUTA
IPC分类号： G06F11/18 , G06F12/16
摘要： PROBLEM TO BE SOLVED: To prevent processing from being continuously performed in an unstable state by immediately and certainly detecting a fault.SOLUTION: A control device generates a first error detection code from first information output as result obtained by executing a prescribed program by a first processor. The control device generates a second error detection code from second information output as result obtained by executing the program by a second processor configured such that the second processor outputs the same arithmetic result as the first processor. The control device detects whether or not the first information and the second information are identical, detects whether or not the first error detection code and the second error detection code are identical, and controls writing of the first information or the second information into a main memory on the basis of the detection result.
摘要翻译：要解决的问题：通过立即并确定地检测故障来防止处理在不稳定状态下持续执行。解决方案：控制装置从第一信息输出生成第一错误检测码，作为通过执行规定的程序由第一处理器。控制装置从第二信息输出生成第二错误检测码，作为通过由配置为使得第二处理器输出与第一处理器相同的算术结果的第二处理器执行程序获得的结果。控制装置检测第一信息和第二信息是否相同，检测第一错误检测码和第二错误检测码是否相同，并且控制第一信息或第二信息的写入到主存储器在检测结果的基础上。

3. 发明专利

JP2010200016A Line switch device and plant control system 有权
标题翻译：线路开关装置和设备控制系统
公开(公告)号：JP2010200016A
公开(公告)日：2010-09-09
申请号：JP2009042938
申请日：2009-02-25
申请人： Hitachi Information & Control Solutions Ltd , Hitachi Ltd , 株式会社日立情報制御ソリューションズ , 株式会社日立製作所
发明人： TAHARA YUKIKO , NISHIOKA ATSUSHI , KIYOFUJI YASUHIRO , KOBAYASHI EIJI , SHIMIZU KATSUTO , OTSUKA YUSAKU , SHIMIZU TOSHIKI , ONOZUKA AKIHIRO , FUNAKI SATORU , ISHIKAWA MASAKAZU , SEKI YUSUKE , SASAKI WATARU , MASUKO NAOYA , NAKANO AKIHIRO , OGURA MAKOTO , OZAWA SHOICHI
IPC分类号： H04L29/14 , H04B1/74
摘要： PROBLEM TO BE SOLVED: To provide a new line switching device for suppressing damages to a line fault, to a minimum, improving the availability, and enhancing cost-effectiveness in the system as a whole, and to provide a plant control system which uses the device. SOLUTION: The line switching devices corresponding to each input/output device are arranged in order to control the plurality of input/output devices with the use of a single CPU. An ID is imparted to each line switching device. An ID for uniquely identifying the line switching device is embedded in a data frame to be transmitted from the CPU. By having the line switching device allow only the data frame with IDs matching to pass, collisions of the data frames, which occurs when the data frame improperly comes-in to a control line, are avoided. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供一种用于抑制对线路故障的损害的新的线路切换装置，至少提高系统的可用性和提高成本效益，并且提供一种工厂控制系统使用该设备。解决方案：对应于每个输入/输出设备的线路切换设备被布置以便使用单个CPU来控制多个输入/输出设备。 ID被赋予每个线路交换设备。用于唯一地识别线路交换设备的ID被嵌入在要从CPU发送的数据帧中。通过使线路交换装置仅允许具有匹配的ID的数据帧通过，当数据帧不正确地进入控制线时发生的数据帧的冲突被避免。版权所有（C）2010，JPO＆INPIT

4. 发明专利

JP2010160649A Controller and control method 有权
标题翻译：控制器与控制方法
公开(公告)号：JP2010160649A
公开(公告)日：2010-07-22
申请号：JP2009001899
申请日：2009-01-07
申请人： Hitachi Information & Control Solutions Ltd , Hitachi Ltd , 株式会社日立情報制御ソリューションズ , 株式会社日立製作所
发明人： FUNAKI SATORU , KIYOFUJI YASUHIRO , SUENAGA MASASHI , OGURA MAKOTO , KOBAYASHI EIJI , ONOZUKA AKIHIRO , SEKI YUSUKE , SHIMIZU TOSHIKI , TAHARA YUKIKO , SUGIMOTO YUTA
IPC分类号： G06F11/18 , G06F12/16
CPC分类号： G06F11/1008 , H03M13/09
摘要： PROBLEM TO BE SOLVED: To prevent going on performing processing in an unstable state by immediately and certainly detecting a fault. SOLUTION: This controller generates a first error detection code from first information output as a result obtained by executing a prescribed program by a first processor. The controller generates a second error detection code from second information output as a result obtained by executing the program by a second processor configured such that the second processor outputs the same arithmetic result as the first processor. The controller detects whether or not the first information and the second information are identical, detects whether or not the first error detection code and the second error detection code are identical, and controls writing of the first information or the second information into a main memory based on results of the detections. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：为了防止在不稳定状态下立即执行处理并确定地检测故障。解决方案：该控制器通过由第一处理器执行规定的程序而获得的第一信息输出产生第一错误检测码。控制器从第二信息输出生成第二错误检测码，作为通过由配置为使得第二处理器输出与第一处理器相同的算术结果的第二处理器执行程序获得的结果。控制器检测第一信息和第二信息是否相同，检测第一错误检测码和第二错误检测码是否相同，并且控制将第一信息或第二信息写入到主存储器中检测结果。版权所有（C）2010，JPO＆INPIT

5. 发明专利

JP2007043679A Sending device, receiving device, and communication system 有权
标题翻译：发送设备，接收设备和通信系统
公开(公告)号：JP2007043679A
公开(公告)日：2007-02-15
申请号：JP2006178896
申请日：2006-06-29
申请人： Hitachi Information & Control Solutions Ltd , Hitachi Ltd , 株式会社日立情報制御ソリューションズ , 株式会社日立製作所
发明人： ISHIKAWA MASAKAZU , ONOZUKA AKIHIRO , OGURA MAKOTO , SHIRAISHI MASAHIRO , UMEHARA TAKASHI , MASUKO NAOYA , NAGAYAMA HISAO , ENDO HIROMICHI , FUNAKI SATORU , KOBAYASHI MASAMITSU , BANDO AKIRA , KOBAYASHI EIJI , FURUTA YASUYUKI
IPC分类号： H04L29/10 , H04L1/00
摘要： PROBLEM TO BE SOLVED: To attain both a high performance and safety in data communication between a controller and a process I/O unit.
SOLUTION: The device is provided with a circuit which generates and adds a CRC (Cyclic Redundancy Check) to a transmitted data of the controller and the process I/O unit, a circuit which checks the CRC of a received data, and a status register which selects operation modes of operation or stop of a CRC generation and a check function and shows CRC errors in each device, and inconsistency of the operation mode of a transmitter and a recipient of the data. It also performs a check of the CRC in a relay communication device. When two or more relay communication devices exist, the CRC for transmission between relay communication devices is additionally added, the CRC check result in each device of the controller, the relay communication device, and the process I/O unit is reflected in the status register, the soundness of the data between terminals is checked, the data having errors generated in a transceiver process is prevented from being used, and the device is prevented from a malfunction.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：为了在控制器和处理I / O单元之间实现数据通信的高性能和安全性。解决方案：该设备具有电路，该电路为控制器和处理I / O单元的发送数据生成CRC（循环冗余校验），检查接收到的数据的CRC的电路，以及选择操作模式或停止CRC生成和检查功能的状态寄存器，并且在每个设备中显示CRC错误，以及发送器的操作模式与数据的接收者的不一致。它还执行中继通信设备中的CRC校验。当存在两个以上的中继通信装置时，还附加用于中继通信装置之间传输的CRC，控制器，中继通信装置和处理I / O单元的每个装置的CRC校验结果反映在状态寄存器检查终端之间的数据的正确性，防止在收发器处理中产生的错误的数据被使用，并且防止装置发生故障。版权所有（C）2007，JPO＆INPIT

6. 发明专利

JP2010003081A Arithmetic processing unit multiplexing control system 有权
标题翻译：算术处理单元多路复用控制系统
公开(公告)号：JP2010003081A
公开(公告)日：2010-01-07
申请号：JP2008160877
申请日：2008-06-19
申请人： Hitachi Information & Control Solutions Ltd , Hitachi Ltd , 株式会社日立情報制御ソリューションズ , 株式会社日立製作所
发明人： SHIMIZU TOSHIKI , BANDO AKIRA , OTSUKA YUSAKU , KIYOFUJI YASUHIRO , KOBAYASHI EIJI , ONOZUKA AKIHIRO , FUNAKI SATORU , ISHIKAWA MASAKAZU , MASUKO HIDEAKI , SEKI YUSUKE , SASAKI WATARU , MASUKO NAOYA , NAKANO AKIHIRO , OGURA MAKOTO , OZAWA SHOICHI , IWASAKI YU
IPC分类号： G06F11/20
CPC分类号： G06F11/2033 , G06F8/67 , G06F11/1658 , G06F11/2028 , G06F11/2038 , G06F11/2097
摘要： PROBLEM TO BE SOLVED: To solve the problems wherein conventionally, a memory data signal of a CPU of a main system is snooped and is acquired by a CPU of a subordinate system via a matching bus, using a parallel bus, which is thus unsuitable for long-distance transmission because the parallel bus vulnerable to noise is used, data to be snooped are the data to be stored in the main system, and thus the subordinate system cannot be processed simultaneously with the main system, causing delays and resulting at the cost of the response speed of the system as a whole, and a separate function for running a plant, without stopping it at updating of a program is required and which makes the functions complicated.
SOLUTION: In a duplexed control system, data to be snooped by a CPU2 of the subordinate system as a stand-by system from a CPU1 of the main system as an execution system are set as control information from a control target to be acquired by the CPU of the main system, and further, advantageously, the phase of a control period of the subordinate system is made to advance more than the phase of the control period of the main system.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题为了解决常规的问题，主系统的CPU的存储器数据信号被窥探并且通过下位系统的CPU经由匹配总线获取，使用并行总线，其是因此不利于长距离传输，因为使用易受噪声影响的并行总线，要窥探的数据是要存储在主系统中的数据，因此下级系统不能与主系统同时处理，导致延迟和结果以整个系统的响应速度为代价，并且需要用于运行工厂的单独功能，而不会在更新程序时停止它，并且使功能变得复杂。解决方案：在双工控制系统中，将来自作为执行系统的主系统的CPU1作为备用系统的从属系统的CPU2所窥探的数据从控制目标设置为控制信息由主系统的CPU获取，并且进一步地，使得从属系统的控制周期的相位超过主系统的控制周期的相位。版权所有（C）2010，JPO＆INPIT

7. 发明专利

JP2008009794A Programmable electronic controller, and communication control method for programmable electronic apparatus 审中-公开
标题翻译：可编程电子控制器和可编程电子设备的通信控制方法
公开(公告)号：JP2008009794A
公开(公告)日：2008-01-17
申请号：JP2006180648
申请日：2006-06-30
申请人： Hitachi Information & Control Solutions Ltd , Hitachi Ltd , 株式会社日立情報制御ソリューションズ , 株式会社日立製作所
发明人： UMEHARA TAKASHI , BANDO AKIRA , KOBAYASHI MASAMITSU , SHIRAISHI MASAHIRO , ONOZUKA AKIHIRO , OGURA MAKOTO , KOBAYASHI EIJI , ISHIKAWA MASAKAZU , FURUTA YASUYUKI , SASAKI WATARU , OTSUKA YUSAKU , NAKANO AKIHIRO , OZAWA SHOICHI , MASUKO NAOYA , FUNAKI SATORU , KASAHARA TAKENORI , SEKI YUSUKE , IWASAKI YU
IPC分类号： G05B9/03 , G05B19/05 , G06F11/20 , H04L29/04
摘要： PROBLEM TO BE SOLVED: To provide a programmable electronic apparatus which operates at higher speed while satisfying requirements as functional safety (normal operation of apparatus) and has synchronism during start and stop, and multiple system switching.
SOLUTION: A state-switching signal from a central processing storage device to a system is simultaneously notified even to input-output devices connected through a serial line 1. The state-switching signal has a safety stop request signal and a system switching request signal during hardware redundancy. Further, two state-switching signals are provided, and respective polarities are inverted. Alternatively, the state-switching signals are pulse-shaped. The common part of a frame of the serial line is provided with a bit for safety stop request, or a command is provided with a new state-switching code, and its command instruction achieves simultaneous broadcast communication. According to the invention, it is possible to achieve safety as well as system synchronism. Further, it is possible to achieve control suitable for the functional safety use by using safe communication.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供一种在满足作为功能安全（装置的正常运行）的要求并且在启动和停止期间具有同步以及多系统切换的高速运行的可编程电子装置。解决方案：即使对于通过串行线路1连接的输入输出设备，也将来自中央处理存储设备的系统的状态切换信号同时通知。状态切换信号具有安全停止请求信号和系统切换在硬件冗余期间请求信号。此外，提供两个状态切换信号，并且各极性反转。或者，状态切换信号是脉冲形的。串行线路的公共部分被提供有安全停止请求的位，或者指令被提供有新的状态切换代码，并且其命令指令实现同时的广播通信。根据本发明，可以实现安全性和系统同步性。此外，可以通过使用安全通信来实现适合于功能安全用途的控制。版权所有（C）2008，JPO＆INPIT

8. 发明专利

JP2008009793A Control device, control method and control program 有权
标题翻译：控制装置，控制方法和控制程序
公开(公告)号：JP2008009793A
公开(公告)日：2008-01-17
申请号：JP2006180645
申请日：2006-06-30
申请人： Hitachi Information & Control Solutions Ltd , Hitachi Ltd , 株式会社日立情報制御ソリューションズ , 株式会社日立製作所
发明人： ONOZUKA AKIHIRO , BANDO AKIRA , KOBAYASHI MASAMITSU , SHIRAISHI MASAHIRO , OGURA MAKOTO , UMEHARA TAKASHI , KOBAYASHI EIJI , FUNAKI SATORU , ISHIKAWA MASAKAZU , FURUTA YASUYUKI , NAKANO AKIHIRO , MASUKO NAOYA , OZAWA SHOICHI , KASAHARA TAKENORI , SEKI YUSUKE , OTANI TATSUYUKI , IWASAKI YU
IPC分类号： G05B23/02 , H04L13/08
摘要： PROBLEM TO BE SOLVED: To provide a communication control device, transferring by wire a plurality of input modules, in a process control system, without addition of counters or deterioration of transfer performance.
SOLUTION: A communication control device of a receiver is provided with a clock counter, an input buffer for temporarily storing input data and a clock buffer for temporarily storing a clock value of the clock counter, in which update of the buffers are simultaneously permitted. Further, the communication control device of the receiver includes a means for transmitting one clock value and a plurality of input values, and a communication control device of a transmitter includes a means for developing one clock value to a plurality of input values.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：为了提供通信控制装置，在过程控制系统中通过线路传送多个输入模块，而不增加计数器或转移性能的劣化。解决方案：接收机的通信控制装置设置有时钟计数器，用于临时存储输入数据的输入缓冲器和用于临时存储时钟计数器的时钟值的时钟缓冲器，其中缓冲器的更新同时允许的。此外，接收机的通信控制装置包括用于发送一个时钟值和多个输入值的装置，并且发射机的通信控制装置包括用于将多个输入值显示一个时钟值的装置。版权所有（C）2008，JPO＆INPIT

9. 发明专利

JP2011081705A Memory control device and method for controlling the same 有权
标题翻译：存储器控制装置及其控制方法
公开(公告)号：JP2011081705A
公开(公告)日：2011-04-21
申请号：JP2009235177
申请日：2009-10-09
申请人： Hitachi Information & Control Solutions Ltd , Hitachi Ltd , 株式会社日立情報制御ソリューションズ , 株式会社日立製作所
发明人： SEKI YUSUKE , OGURA MAKOTO , ISHIKAWA MASAKAZU , KOBAYASHI EIJI , ONOZUKA AKIHIRO , FUNAKI SATORU , SHIMIZU TOSHIKI , NAGAYAMA HISAO , YOKOKURA AOI
IPC分类号： G06F12/16
摘要： PROBLEM TO BE SOLVED: To improve the reliability of a memory control device performing access control on a memory device, by solving the problem that it is difficult to cope with a transient failure occurring during memory access control operation because access operation is one-way due to characteristics of memory elements, and detecting the transient failure to restore a control state to an initial state. SOLUTION: The memory control device includes two memory control circuits, and respective signals required for memory access are compared by a self-diagnosis function, whereby an failure in the memory control device is early detected to improve the safety. Furthermore, the memory control circuits are initialized and completely synchronized after failure detection to continue the next memory access operation, whereby the availability is improved. COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：为了提高对存储装置执行访问控制的存储器控制装置的可靠性，通过解决难以应对存储器访问控制操作期间发生的瞬时故障的问题，因为访问操作是一个 - 由于存储器元件的特性，以及检测瞬态故障将控制状态恢复到初始状态。解决方案：存储器控制装置包括两个存储器控制电路，并且通过自诊断功能来比较存储器访问所需的相应信号，由此早期检测到存储器控制装置中的故障以提高安全性。此外，在故障检测之后，存储器控制电路被初始化并完全同步，以继续下一个存储器访问操作，从而提高可用性。版权所有（C）2011，JPO＆INPIT

10. 发明专利

JP2008009795A Diagnostic device, line diagnostic method and line diagnostic program 审中-公开
标题翻译：诊断装置，线诊断方法和线诊断程序
公开(公告)号：JP2008009795A
公开(公告)日：2008-01-17
申请号：JP2006180649
申请日：2006-06-30
申请人： Hitachi Information & Control Solutions Ltd , Hitachi Ltd , 株式会社日立情報制御ソリューションズ , 株式会社日立製作所
发明人： KOBAYASHI EIJI , BANDO AKIRA , KOBAYASHI MASAMITSU , SHIRAISHI MASAHIRO , ONOZUKA AKIHIRO , UMEHARA TAKASHI , OGURA MAKOTO , ISHIKAWA MASAKAZU , FURUTA YASUYUKI , FUNAKI SATORU , SEKI YUSUKE , OTANI TATSUYUKI , SAKATA TERUAKI , SHIMAMURA KOTARO
IPC分类号： G06F13/362
摘要： PROBLEM TO BE SOLVED: To provide a controller improving both responsiveness and safety by diagnosing an arbiter operation with the use of a monitoring means by an external diagnostic module in order to improve the safety of a bus arbiter operation for arbitrating bus use right requests output by a plurality of devices in the controller.
SOLUTION: The diagnostic module monitors a signal regarding an arbiter arbitration, and stops data transfer safely and prevents safety data from being erroneously output when abnormality resulting from signal adherence or the failure in an arbitration control part is detected.
COPYRIGHT: (C)2008,JPO&INPIT

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