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1. 发明专利

JP2001036396A SEMICONDUCTOR INTEGRATED CIRCUIT 失效
公开(公告)号：JP2001036396A
公开(公告)日：2001-02-09
申请号：JP2000185909
申请日：2000-06-16
申请人： HITACHI LTD , HITACHI DEVICE ENG
发明人： KAWAHARA TAKAYUKI , KAWAJIRI YOSHIKI , AKIBA TAKESADA , HORIGUCHI SHINJI , WATABE TAKAO , KITSUKAWA GORO , KAWASE YASUSHI , TACHIBANA RIICHI , AOKI MASAKAZU
IPC分类号： G11C11/418 , G11C11/407 , G11C11/413 , G11C16/06 , H03K19/00
摘要： PROBLEM TO BE SOLVED: To refine a CMOS circuit and to reduce current consumption at the time of standby, even if a sub-threshold current becomes large by setting a current flowing to plural CMOS circuits at standby, not through a sub-threshold current but by a leakage current small in a switching transistor. SOLUTION: A switching control terminal T1 is set at low level, at a standby, a switch S1 using a MOS transistor is turned, off, a leakage current of the switch S1 is set smaller than a sub-threshold current of many circuit of which only a few operate Ci(Ci=1 to n) at one time. Therefore, a maximum current to the circuit Ci which uses the CMOS transistor, having a low threshold voltage from a high potential side power source VC is the leakage current to the switching circuit S1. That is, the current flowing the circuit Ci is decided not by the sub-threshold current of the circuit Ci but by the leakage current of the small switching circuit S1. Thus, current consumption at standby time becomes small.

2. 发明专利

JP2002197865A DATA PROCESSING SYSTEM 审中-公开
公开(公告)号：JP2002197865A
公开(公告)日：2002-07-12
申请号：JP2001321321
申请日：2001-10-19
申请人： HITACHI LTD , HITACHI DEVICE ENG
发明人： KAWAHARA TAKAYUKI , KAWAJIRI YOSHIKI , AKIBA TAKESADA , HORIGUCHI SHINJI , WATABE TAKAO , KITSUKAWA GORO , KAWASE YASUSHI , TACHIBANA RIICHI , AOKI MASAKAZU
IPC分类号： G11C11/413 , G11C11/401 , G11C11/407 , G11C11/418 , G11C16/06 , H03K19/0948
摘要： PROBLEM TO BE SOLVED: To reduce current consumption at the time of standby in a semiconductor integrated circuit M using a plurality of CMOS circuits Ci using minute MOS transistors. SOLUTION: This system is switched to a standby state by signals (/RAS signal, /CAS signal) controlling a semiconductor integrated circuit M. A sub- threshold current flowing in a CMOS circuit of the semiconductor circuit is reduced by providing a power source switch to be turned off at the time of standby.

3. 发明专利

JPH02189795A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH02189795A
公开(公告)日：1990-07-25
申请号：JP761889
申请日：1989-01-18
申请人： HITACHI LTD , HITACHI DEVICE ENG
发明人： KAWAHARA TAKAYUKI , ITO KIYOO , KITSUKAWA GORO , KAWAJIRI YOSHIKI , WATABE TAKAO , HIGUCHI HISAYUKI , AKIBA TAKESADA , KATO SHISEI
IPC分类号： G11C11/417 , G11C11/407 , G11C11/408 , G11C11/409 , G11C11/414 , H01L21/8242 , H01L27/10 , H01L27/108
摘要： PURPOSE:To obtain a semiconductor memory device with fast operation and low noise by providing a level conversion circuit used as decorder in common connecting a circuit part with a small amplitude and a circuit part with a large amplitude and operating circuit parts other than a circuit directly controlling a MOS memory cell array with a small signal amplitude. CONSTITUTION:Peripheral circuits other than a circuit controlling directly a MOS memory cell C requiring a signal with a large amplitude (part excluding predecoder in decoder driver circuits 8X, 8Y) have a small signal level. That is, the amplitude of an internal operation signal and an output signal for a control circuit 9 and an address buffer 5X, an internal operation signal and an input output signal for a predecoder 20 is selected small amplitude Va and the signal with the amplitude Va is level-converted by a decoder word driver 21 (decoder and level conversion circuit and driver) to drive a MOS memory cell C at a large amplitude Vb. The Y system (data line system) circuits 5Y, 8Y are operated similarly as the X system circuits 5X, 8X. Thus, a semiconductor device with high speed and low noise is obtained.

4. 发明专利

JPH01261918A SEMICONDUCTOR CIRCUIT 失效
公开(公告)号：JPH01261918A
公开(公告)日：1989-10-18
申请号：JP8906288
申请日：1988-04-13
申请人： HITACHI LTD , HITACHI DEVICE ENG
发明人： KITSUKAWA GORO , YANAGISAWA KAZUMASA , KAWAJIRI YOSHIKI , WATABE TAKAO , KAWAHARA TAKAYUKI , ITO KIYOO , KATO SHISEI
IPC分类号： H03K17/567 , H03K17/56
摘要： PURPOSE:To obtain a pulse current power which is extremely simple and whose operation is stable by connecting in serial the current power of a current switch by means of switch MOS transistors and current value setting elements. CONSTITUTION:The current power consists of the switch MOS transistors M1, M2 and M3 and the current setting MOS transistors M4, M5 and M6. The gates of the MOSM1, M2 and M3 are controlled by a driving pulse phi1. When the pulse phi1 is in a high potential, they are turned on, and when it is in a low potential, they are turned off. When the high potential of the pulse phi1 is raised, and the ratio of a gate width W/gate length is enlarged in such a case, an on-resistance is reduced, and the stable current power which is stable with respect to the voltage fluctuation of a control pulse can be obtained. When the low potential of the pulse phi1 is reduced less than a threshold voltage, a current can be set to zero. On the other hand, MOSM4, M5 and M6 can be operated in a saturated state so that the current becomes stable. Thus, the current has no connection with a drain voltage. The precision of the current can be improved by taking the absolute value of W, L and VG (current control voltage) larger than respective fluctuation values.

5. 发明专利

JP2001176270A SEMICONDUCTOR INTEGRATED CIRCUIT 失效
公开(公告)号：JP2001176270A
公开(公告)日：2001-06-29
申请号：JP2000327003
申请日：2000-10-20
申请人： HITACHI LTD , HITACHI DEVICE ENG
发明人： KAWAHARA TAKAYUKI , KAWAJIRI YOSHIKI , AKIBA TAKESADA , HORIGUCHI SHINJI , WATABE TAKAO , KITSUKAWA GORO , KAWASE YASUSHI , TACHIBANA RIICHI , AOKI MASAKAZU
IPC分类号： G11C11/413 , G11C11/407 , G11C16/06 , H03K19/00 , H03K19/0948
摘要： PROBLEM TO BE SOLVED: To reduce the current consumption of a semiconductor integrated circuit using fine MOS transistors when the circuit is in a standby state. SOLUTION: The device parameter of a switching transistor S11 constituting a power switch which is turned off in a standby mode is set so that the leakage current of the transistor S11 may become smaller than the sum total of the sub-threshold currents of the p-channel MOSs of a plurality of word driver circuits WDi when the circuits WDi are in turned-off states. Consequently, the currents of the circuits WDi in the turned-off states do not become the large sub-threshold currents of the circuits WDi when the fine MOS transistors are used, but the small leakage current of the transistor S11.

6. 发明专利

JP2000082286A SEMICONDUCTOR INTEGRATED CIRCUIT 失效
公开(公告)号：JP2000082286A
公开(公告)日：2000-03-21
申请号：JP16931199
申请日：1999-06-16
申请人： HITACHI LTD , HITACHI DEVICE ENG
发明人： KAWAHARA TAKAYUKI , KAWAJIRI YOSHIKI , AKIBA TAKESADA , HORIGUCHI SHINJI , WATABE TAKAO , KITSUKAWA GORO , KAWASE YASUSHI , TACHIBANA RIICHI , AOKI MASAKAZU
IPC分类号： G06F1/32 , G11C11/407 , G11C11/413 , G11C11/418 , G11C27/02 , H03K19/0948
摘要： PROBLEM TO BE SOLVED: To reduce current consumption at a standby time by enlarging an operation voltage of a first circuit block than the operation voltage of a second circuit block and providing a current control means controlling a current in a circuit block in both the first and second circuit blocks. SOLUTION: When a switch control terminal T1 of a switch circuit is at a high level, a switch S1 is turned on, and when the T1 is at a low level, the S1 is turned off. At the standby time, the T1 is set to the low level, and the switch S1 is turned off. At this time, the leakage current of the switch S1 is set smaller than a sub-threshold current. Then, a maximum current from a high potential side source VC to a logic circuit or circuits Ci that only a small number are operated once becomes the leakage current of the switch S1. Thus, the current flowing through the circuits Ci is decided by the leakage current of the small switch S1 even when MOS transistors having a low threshold value are used to the circuits Ci for low voltage operation.

7. 发明专利

JP2002368598A Semiconductor integrated circuit 有权
标题翻译：半导体集成电路
公开(公告)号：JP2002368598A
公开(公告)日：2002-12-20
申请号：JP2002162282
申请日：2002-06-04
申请人： Hitachi Device Eng Co Ltd , Hitachi Ltd , 日立デバイスエンジニアリング株式会社 , 株式会社日立製作所
发明人： KAWAHARA TAKAYUKI , KAWAJIRI YOSHIKI , AKIBA TAKESADA , HORIGUCHI SHINJI , WATABE TAKAO , KITSUKAWA GORO , KAWASE YASUSHI , TACHIBANA RIICHI , AOKI MASAKAZU
IPC分类号： H03K19/00 , G11C11/407
摘要： PROBLEM TO BE SOLVED: To reduce current consumption in a semiconductor integrated circuit using a fine MOS transistor.
SOLUTION: While both first and second MOS transistors are turned off (T1=VC and I1=VC), a voltage between the gate and source of the first MOS transistor is the inverse polarity of a voltage between the gate and source of the first MOS transistor while the first MOS transistor is turned on. Therefore, the first MOS transistor is turned into strong OFF state and a sub- threshold current is remarkably decreased.
COPYRIGHT: (C)2003,JPO
摘要翻译：要解决的问题：减少使用精细MOS晶体管的半导体集成电路中的电流消耗。解决方案：当第一和第二MOS晶体管关断（T1 = VC和I1 = VC）时，第一MOS晶体管的栅极和源极之间的电压是第一MOS的栅极和源极之间的电压的相反极性晶体管，而第一MOS晶体管导通。因此，第一MOS晶体管变为强关断状态，并且子阈值电流显着降低。

8. 发明专利

JP2002305249A SEMICONDUCTOR INTEGRATED CIRCUIT 审中-公开
公开(公告)号：JP2002305249A
公开(公告)日：2002-10-18
申请号：JP2002012289
申请日：2002-01-22
申请人： HITACHI LTD , HITACHI DEVICE ENG
发明人： KAWAHARA TAKAYUKI , KAWAJIRI YOSHIKI , AKIBA TAKESADA , HORIGUCHI SHINJI , WATABE TAKAO , KITSUKAWA GORO , KAWASE YASUSHI , TACHIBANA RIICHI , AOKI MASAKAZU
IPC分类号： H01L27/04 , G11C11/407 , H01L21/822 , H01L21/8238 , H01L21/8242 , H01L27/092 , H01L27/10 , H01L27/108 , H03K19/00
摘要： PROBLEM TO BE SOLVED: To reduce a consumption current during standby, in a semiconductor integrated circuit in which a plurality of CMOS circuits C1 using fine MOS transistors are used. SOLUTION: A power source switch S1 is installed to a circuit, which is operated by an operation voltage supplied from an internal power source. At standby, the switch S1 is turned off. The sub-threshold current of a MOS of a p-channel or an n-channel in the off-state of the CMOS circuit C1 is limited by the switch S1. The current of the CMOS circuit C1 during standby is not a large sub-threshold current of the CMOS circuit C1, when the fine MOS transistor is used but a small leakage current of the power source switch S1.

9. 发明专利

JP2001176271A SEMICONDUCTOR INTEGRATED CIRCUIT 失效
公开(公告)号：JP2001176271A
公开(公告)日：2001-06-29
申请号：JP2000327004
申请日：2000-10-20
申请人： HITACHI LTD , HITACHI DEVICE ENG
发明人： KAWAHARA TAKAYUKI , KAWAJIRI YOSHIKI , AKIBA TAKESADA , HORIGUCHI SHINJI , WATABE TAKAO , KITSUKAWA GORO , KAWASE YASUSHI , TACHIBANA RIICHI , AOKI MASAKAZU
IPC分类号： G11C11/418 , G11C11/407 , G11C11/413 , G11C16/06 , H03K19/00 , H03K19/0948
摘要： PROBLEM TO BE SOLVED: To reduce the current consumption of a semiconductor integrated circuit using fine MOS transistors when the circuit is in a standby state. SOLUTION: Sub-threshold currents flowing to a plurality of MOS circuit Ci are controlled by means of a switch circuit S1 which is common to the MOS circuits Ci. When the currents are controlled, a control signal T1 inputted to the switch circuit S1 changes from a standby state to an operating state before the input I1 of the MOS circuit C1 changes. Therefore, the currents of the MOS circuits Ci when the circuits Ci are in standby states are not limited by the large sub-threshold currents of the circuit Ci when the circuits Ci use fine MOSs, but by the switch circuit S1.

10. 发明专利

JP2000082285A SEMICONDUCTOR INTEGRATED CIRCUIT 失效
公开(公告)号：JP2000082285A
公开(公告)日：2000-03-21
申请号：JP16931099
申请日：1999-06-16
申请人： HITACHI LTD , HITACHI DEVICE ENG
发明人： KAWAHARA TAKAYUKI , KAWAJIRI YOSHIKI , AKIBA TAKESADA , HORIGUCHI SHINJI , WATABE TAKAO , KITSUKAWA GORO , KAWASE YASUSHI , TACHIBANA RIICHI , AOKI MASAKAZU
IPC分类号： G06F1/32 , G11C11/407 , G11C11/413 , G11C11/418 , G11C27/02 , H03K19/0948
摘要： PROBLEM TO BE SOLVED: To reduce current consumption at a standby time in the case of using plural CMOS circuits using a minute MOS transistor. SOLUTION: A device parameter of a switching transistor S1 is set so that the leakage current of the switching transistor S1 constituting a source switch to be turned off at the standby time becomes smaller than a total sum of sub- threshold currents of (p) channel or (n) channel MOS in the off state of plural CMOS circuits Ci. By such a manner, the current at the standby time of plural CMOS circuits Ci becomes the small leakage current of the switching transistor S1 not the large sub-threshold currents of the Ci when the minute MOS is used.

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