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    • 3. 发明专利
    • DUPLICATE RING SYSTEM
    • JPH04192646A
    • 1992-07-10
    • JP31781790
    • 1990-11-26
    • HITACHI LTDHITACHI COMPUTER ENG
    • KURATA MASAMIHIRAI MASATO
    • H04L12/42
    • PURPOSE:To prevent system-down by devising the system such that a reproduction repeater delivers a fault to subordinate nodes without implementing loopback or bypassing on the occurrence of a fault such as power failure so as to allow a ring configuration controller to detect the fault surely when the reproduction repeater and the ring configuration controller are in existence in mixture in the system. CONSTITUTION:Stations ST are connected to transmission lines 2 in duplicate by a line concentrator 1 and connected in a ring by using a ring configuration controller 3 checking the normality of a data to configure the ring, and a reproduction repeater 4 to extend the length of the ring. The reproduction repeater 4 does not implement loopback and bypassing on the occurrence of a fault such as a power failure but allows subordinate devices to detect the fault. Since the ring configuration controller 3 recognizes the fault and eliminate a fault location from the ring through loopback, system-down is prevented, the ring is managed and the fault location is easily found out.
    • 4. 发明专利
    • DIFFERENTIAL AMPLIFIER CIRCUIT
    • JPH01170106A
    • 1989-07-05
    • JP32708487
    • 1987-12-25
    • HITACHI LTDHITACHI COMPUTER ENG
    • HIRAI MASATOKURATA MASAMI
    • H03F3/45
    • PURPOSE:To obtain a differential amplifier circuit in which the balance of both outputs of differential outputs are good by packing circuit elements connecting between the emitters of a pair of transistors to an object physically to the emitters of a pair of the transistors. CONSTITUTION:By connecting between the emitters of a pair of transistors Q1 and Q2 to compose the differential amplifier circuit by means of circuit elements (an R1, an R2 and a C), an amplification degree is controlled. At such a time, the circuit elements (the R1, R2 and C) are packed to the object physically to the emitters of the transistors Q1 and Q2. Then, the floating capacity to a ground to accompany the packing of the circuit elements (the R1, R2 and C) is attached to the object to both emitters. The ground impedances of both emitters are also made equal, and the balance of the impedances between both emitters are made good. Thus, the differential amplifier circuit can be obtained in which the balance of both outputs of the differential outputs are good.
    • 5. 发明专利
    • RELAY CONNECTION SYSTEM
    • JPS6243236A
    • 1987-02-25
    • JP18180785
    • 1985-08-21
    • HITACHI LTDHITACHI COMPUTER ENG
    • HIRAI MASATOKURATA MASAMIYOSHINO RYOZO
    • H04L12/42
    • PURPOSE:To offset the crosstalk produced by a relay circuit with no attachment of an external parts by a relay connection system in a trunk coupling unit of a token ring. CONSTITUTION:The signal A sent from a transmission part 5 of a station 1-1 is transmitted to a reception part 4 of a station 1-2 through relays 5 and 8. While the signal B sent from a transmission part 5 of the station 1-2 is transmitted to the reception part 4 of a station 1-3 through relays 7 and 9. Here the positive side crosstalk C(+) of the signal B is produced to a terminal (c) from a terminal (b) of both relays 6 and 7 respectively. While the negative side crosstalk C(-) of the signal B is produced to a terminal (c) from a terminal (b) of both relays 8 and 9 respectively. Then both crosstalks C(+) and C(-) are added together between relays 6 and 9 as well as relays 7 and 8 through connections 14 and 15 and offset with each other. Thus no crosstalk C of the signal B is produced at the reception part 4 of the station 1-2.
    • 7. 发明专利
    • SYSTEM CLOCK PROTECTION SYSTEM
    • JPH0432330A
    • 1992-02-04
    • JP13702690
    • 1990-05-29
    • HITACHI LTDHITACHI COMPUTER ENG
    • HIRAI MASATOKURATA MASAMINAKAUCHI TOSHIHIKO
    • H04L7/033G06F1/08H03L7/14
    • PURPOSE:To hold the frequency and phase constant by switching an input to a frequency divider in a phase locked loop into a reference clock provided on the inside of the system at the time of the interruption of an external clock. CONSTITUTION:When a clock 25 from an external network is lost, an interruption detection circuit 35 detects the state and generates a switching signal 36 and a selector 33 selects an input to a frequency divider 24 from the output 27 of a VCO 23 into the output of a reference oscillator 34. Since the frequency of the reference oscillator 34 is within a permissible deviation, the internal clock 26 of the output of the frequency divider is hold within a prescribed frequency range. Moreover, although the phase fluctuation of a maximum of 180 deg. takes place in the input phase to the frequency divider 24 by the switching, since the phase fluctuation of the internal clock 26 being the output of the frequency divider 24 is decreased to 1/N, when the N is larger, the internal clock is selected almost without phase fluctuation. Thus, not only the frequency but also the phase is held constant.