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    • 1. 发明专利
    • DE3136128A1
    • 1982-04-08
    • DE3136128
    • 1981-09-11
    • HITACHI LTD
    • SUGIURA KAZUMASAMORI KINJIIHARA HIROKAZUKAWAI YOSHINORI
    • H04L1/24H04L12/437H04L25/02
    • In a data transmission system with such a construction that a plurality of terminal units are connected to a first and a second loop transmission line for transmitting messages in a first direction and in a second direction which is opposite to said first direction, respectively, through a pair of transmission control units (the one unit being connected to said first loop transmission line with the other unit being connected to said second loop transmission line), each transmission control unit sends a check message sequentially in order to check the state of a minor loop which connects two adjacent pairs of transmission control units. This check message has a data field, in which an initial value is set at the sending time. The value of this data field is incremented by one in each transmission control unit through which the message passes to make a round through the minor loop. Each transmission control unit decides as to whether the value of the data field of the received check message has a prescribed value or not, thereby to discriminate if the message generated by the transmission control unit itself has made a round through the minor loop and returned. If the sent out check message is not received within a prescribed period (after sending), the transmission control unit confirms the presence of an abnormality on a minor loop with the unit as a start point, and thereafter switches its operation to use the bypass transmission line for sending usual messages.
    • 3. 发明专利
    • DE1221290B
    • 1966-07-21
    • DEH0050937
    • 1963-11-25
    • HITACHI LTD
    • KAWAI YOSHINORIKIWAKI HISAKATSUSATO HIROSHI
    • H02M7/515H02M7/516H03F9/00H03F9/04
    • 1,070,576. Magnetic amplifiers; transistor amplifier and oscillator circuits. HITACHI Ltd. Nov. 20, 1963 [Nov. 24, 1962], No. 45899/63. Headings H3B and H3T. The output from a magnetic amplifier to a load is obtained from a D.C. power source. As shown in Fig. 1 a D.C. electrical source Eo is applied to output windings NL1, NL2 1 and NL2, NL1 1 through a load RL and a pair of silicon controlled rectifiers SCR1, SCR2 respectively, the output windings being mounted on two saturable cores m1, m2 together with control windings Nc connected to a D.C. control or input voltage source Ec. If rectifier SCR1 is conducting and SCR2 non-conducting current flows through windings NL1 and NL2 1 to the load RL and capacitor C is charged over circuit SCR1-C-NL2-NL1 1 until voltage Eo is applied across windings NL2 and NL1 1 so that voltages are induced in the windings in the direction shown by the arrows. The induced voltage in gate winding NG 1 causes capacitor C 1 to be charged through diode D1 1 and the gate cathode of rectifier SCR1 so keeping this rectifier conducting and the induced voltage in gate winding NG2 causes capacitor C2 to be charged over diode D2 and rectifier SCR2 to be maintained cut off. When core m 2 saturates capacitor C2 discharges through diode D2 1 and the gate cathode of rectifier SCR2 so as to render it conductive. Capacitor C is thus discharged through SCR1 and SCR2 resulting in SCR1 being. non-conducting. The cycle is repeated. The SCR's may be replaced by transistors. Each iron core may be provided with a feedback winding (N#), Fig. 5 (not shown). In order to start the circuit oscillating a switch may be connected in parallel with SCR1 or a parallel combination of a resistor and capacitor may be connected in parallel with the rectifier Fig. 6 (not shown).