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1. 发明专利

DE60125710D1 未知
公开(公告)号：DE60125710D1
公开(公告)日：2007-02-15
申请号：DE60125710
申请日：2001-08-22
申请人： HITACHI LTD
发明人： KAMINAGA MASAHIRO , ENDO TAKASHI , WATANABE TAKASHI , OHKI MASARU
IPC分类号： G06F7/72 , G06F12/14 , G06F21/06 , G06F21/24 , G06K19/07 , G09C1/00 , H04L9/10
摘要： The invention relates to an information processing device such as an IC card the overflow processing of which occurs in the case of a modular multiplication operation to be performed during crypto-processing inside shows a particular pattern of a consumption current. It is the subject of the present invention to decrease the relationship between data processing and the pattern of the consumption current. In the processing procedures for performing a modular exponentiation operation according to the 2 bit addition chain method, modular multiplication operation to be executed is selected at random in step 1106, the selected modular multiplication operation is executed for each 2 bits in a step among step 1112 to step 1115, the correction of the result is performed in step 1116, and in step 1118 or 1119, the result of the calculation (corrected value or uncorrected value) is output.

2. 发明专利

DE69906022D1 未知
公开(公告)号：DE69906022D1
公开(公告)日：2003-04-24
申请号：DE69906022
申请日：1999-12-14
申请人： HITACHI LTD
发明人： OKI MASARU , FUKUZAWA YASUKO , OKUHARA SUSUMU , KAMINAGA MASAHIRO
IPC分类号： G06K19/073 , G06F9/30 , G06F13/00 , G06F21/06 , G06K13/00 , G06K19/07 , G07F7/10 , G09C1/00 , H01L21/82 , H01L21/822 , H01L27/04 , H04L9/10
摘要： A relation between the data process contents in an IC card chip and the consumption current of the IC card chip is reduced. Prior to executing an input data process of the IC card chip, the input data (405) is transformed (406) to thereby reduce the relation between the process data and the consumption current of the IC card chip. After the transforming process, the transformed data is untransformed (410) to obtain a correct process result (411).

3. 发明专利

DE60137193D1 未知
公开(公告)号：DE60137193D1
公开(公告)日：2009-02-12
申请号：DE60137193
申请日：2001-08-29
申请人： HITACHI LTD
发明人： ENDO TAKASHI , KAMINAGA MASAHIRO , WATANABE TAKASHI , OHKI MASARU
IPC分类号： G06K19/07 , G07F7/10 , G06K19/073 , G09C1/00 , H04L9/06 , H04L9/10
摘要： It is an object of the disclosed technology to provide a tamper resistance device such as a card member having high security. The disclosed technology provides a solution to problems by reduction of the degree of relationship between information processed in the card member such as a chip for an IC card and current consumption for the processing. As a means for solving the problem, there is provided a method for reducing the degree of relationship between the magnitude of a current consumed by the chip for an IC card and information processed by the chip. In accordance with this method, information is transformed by using data for disturbance of the information prior to processing and, after the processing of the transformed data, the processed transformed information is subjected to inverse transformation using the data for disturbance of the information to result in correct processed information. The method is characterized in that the hamming weight of the data for disturbance of information is all but constant.

4. 发明专利

DE69906022T2 未知
公开(公告)号：DE69906022T2
公开(公告)日：2004-01-08
申请号：DE69906022
申请日：1999-12-14
申请人： HITACHI LTD
发明人： OKI MASARU , FUKUZAWA YASUKO , OKUHARA SUSUMU , KAMINAGA MASAHIRO
IPC分类号： G06K19/073 , G06F9/30 , G06F13/00 , G06F21/06 , G06K13/00 , G06K19/07 , G07F7/10 , G09C1/00 , H01L21/82 , H01L21/822 , H01L27/04 , H04L9/10
摘要： A relation between the data process contents in an IC card chip and the consumption current of the IC card chip is reduced. Prior to executing an input data process of the IC card chip, the input data (405) is transformed (406) to thereby reduce the relation between the process data and the consumption current of the IC card chip. After the transforming process, the transformed data is untransformed (410) to obtain a correct process result (411).

5. 发明专利

DE60138995D1 未知
公开(公告)号：DE60138995D1
公开(公告)日：2009-07-30
申请号：DE60138995
申请日：2001-08-27
申请人： HITACHI LTD
发明人： KAMINAGA MASAHIRO , ENDO TAKASHI , WATANABE TAKASHI , OHKI MASARU
IPC分类号： G06F7/72 , G06F12/14 , B60K6/08 , G06F9/302 , G06F9/318 , G06F21/06 , G06F21/24 , G06K19/073 , G09C1/00 , H04L9/10

6. 发明专利

DE60217260T2 未知
公开(公告)号：DE60217260T2
公开(公告)日：2007-07-12
申请号：DE60217260
申请日：2002-05-24
申请人： HITACHI LTD
发明人： WATANABE TAKASHI , KAMINAGA MASAHIRO , ENDO TAKASHI , KUMANO SEIICHI
IPC分类号： G06F12/14 , G06K19/073 , G06F1/00 , G06F21/00 , G06F21/06 , G06F21/24 , G07F7/10 , H04L9/00 , H04L9/10 , H04L9/32 , H04L29/06
摘要： The invention relates to an information processing unit (E201) and methods therefor which render it more difficult to infer information being processed within said information processing unit (E201) by observing the unit's current consumption or electromagnetic radiation. Specifically, the information processing unit (E201) preferably encrypts and decrypts data when the data is read from/written to (S201; S203) memories (E202) within the unit (E201). The encryption/decryption process may include the use of multiple cryptographic keys, permutated data storage locations, randomly generated keys, and permutated data processing steps.

7. 发明专利

DE60217260D1 未知
公开(公告)号：DE60217260D1
公开(公告)日：2007-02-15
申请号：DE60217260
申请日：2002-05-24
申请人： HITACHI LTD
发明人： WATANABE TAKASHI , KAMINAGA MASAHIRO , ENDO TAKASHI , KUMANO SEIICHI
IPC分类号： G06F12/14 , G06K19/073 , G06F1/00 , G06F21/00 , G06F21/06 , G06F21/24 , G07F7/10 , H04L9/00 , H04L9/10 , H04L9/32 , H04L29/06
摘要： The invention relates to an information processing unit (E201) and methods therefor which render it more difficult to infer information being processed within said information processing unit (E201) by observing the unit's current consumption or electromagnetic radiation. Specifically, the information processing unit (E201) preferably encrypts and decrypts data when the data is read from/written to (S201; S203) memories (E202) within the unit (E201). The encryption/decryption process may include the use of multiple cryptographic keys, permutated data storage locations, randomly generated keys, and permutated data processing steps.

8. 发明专利

DE60125710T2 未知
公开(公告)号：DE60125710T2
公开(公告)日：2007-11-08
申请号：DE60125710
申请日：2001-08-22
申请人： HITACHI LTD
发明人： KAMINAGA MASAHIRO , ENDO TAKASHI , WATANABE TAKASHI , OHKI MASARU
IPC分类号： G06F7/72 , G06F12/14 , G06F21/06 , G06F21/24 , G06K19/07 , G09C1/00 , H04L9/10
摘要： The invention relates to an information processing device such as an IC card the overflow processing of which occurs in the case of a modular multiplication operation to be performed during crypto-processing inside shows a particular pattern of a consumption current. It is the subject of the present invention to decrease the relationship between data processing and the pattern of the consumption current. In the processing procedures for performing a modular exponentiation operation according to the 2 bit addition chain method, modular multiplication operation to be executed is selected at random in step 1106, the selected modular multiplication operation is executed for each 2 bits in a step among step 1112 to step 1115, the correction of the result is performed in step 1116, and in step 1118 or 1119, the result of the calculation (corrected value or uncorrected value) is output.

9. 发明专利

DE60121066T2 未知
公开(公告)号：DE60121066T2
公开(公告)日：2006-10-19
申请号：DE60121066
申请日：2001-12-19
申请人： HITACHI LTD
发明人： KAMINAGA MASAHIRO , ENDO TAKASHI , WATANABE TAKASHI
IPC分类号： G06F12/14 , H04L9/30 , G06F7/72 , G06F21/06 , G06F21/24 , G06K19/07 , G09C1/00 , H04L9/10
摘要： The present invention makes it difficult for unauthorized parties to estimate processing and a secret key based upon the waveforms of power consumption of an IC card chip (102) by changing a processing order in the IC card chip (102) so that it is not estimated by the attackers. In an information processing apparatus comprising storing means (204) having a program storing part (205) for storing programs and a data storing part (206) for storing data, an operation processing unit (201), means (207) for inputting data to be operated on in the operation processing unit (201), and means (207) for outputting operation processing results on the data by the operation processing unit (201), an arithmetic operation method is provided which comprises the steps of: for two integers K1 and K2, when finding a value F(K, A) of a function F satisfying F(K1 + K2; A)=F(K1, A)OF(K2,A) (O denotes an arithmetic operation in a commutative semigroup S. K designates an integer and A designates an element of S), decomposing the K to the sum of m integers KÄ0Ü + KÄ1Ü + ...KÄm-1Ü; using T(0), T(1), ... T(m-1) resulting from rearranging a string of the m integers 0, 1, ... m-1 by permutation T (the result corresponds one for one to the integer string 0, 1, ... m-1); and operating on terms F(KÄT(0)Ü, A) to F(KÄT(m-1)Ü, A) on the right side of F(K, A) = F(KÄT(0)Ü, A)OF(KÄT(1)Ü, A)O ...F(KÄT(m-1)Ü, A) in the order of F(KÄT(0)Ü, A), F(KÄT(1)Ü, A) ... F(KÄT(m-1)Ü, A) to find F(K, A).

10. 发明专利

AU782868B2 Information processing device, information processing method and smartcard 未知
公开(公告)号：AU782868B2
公开(公告)日：2005-09-01
申请号：AU2801901
申请日：2001-03-15
申请人： HITACHI LTD
发明人： KAMINAGA MASAHIRO , ENDO TAKASHI , WATANABE TAKASHI , OHKI MASARU
IPC分类号： B42D15/10 , G06F7/72 , G06F21/06 , G06K19/07 , G06K19/073 , G09C1/00 , H04L9/10
摘要： The present invention provides a tamper-resistant information device for use with IC cards, etc. having high security. The tamper-resistant information device comprises: means for inputting a signal; a storage unit for storing a program; an operation unit for performing predetermined data processing according to a program; and means for outputting a signal; wherein the program stored in the above storage unit includes one or more data processing instructions giving an execution direction to the operation unit; whereby when the signal input from the above data inputting means is subjected to data processing, at least one of the above data processing instructions instructs an operation on a signal A and a signal B to be performed, where the signal B is used for a given calculation in data processing, the above operation including the steps of: arbitrarily dividing the signal A or B into pieces; performing a given operation on each piece of the divided signal and on the remaining undivided signal, separately; and adding all the operation results to obtain the proper encrypted signal.

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