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1. 发明申请

WO2007053764A3 CROSSBAR-ARRAY DESIGNS AND WIRE ADDRESSING METHODS THAT TOLERATE MISALIGNMENT OF ELECTRICAL COMPONENTS AT WIRE OVERLAP POINTS 审中-公开
公开(公告)号：WO2007053764A3
公开(公告)日：2007-05-10
申请号：PCT/US2006/042923
申请日：2006-11-01
申请人： HEWLETT-PACKARD DEVELOPMENT COMPANY, L. P. , WU, Wei , KUEKES, Philip, J. , WILLIAMS, R., Stanley
发明人： WU, Wei , KUEKES, Philip, J. , WILLIAMS, R., Stanley
IPC分类号： G11C8/10
摘要： Various embodiments of the present invention are directed to crossbar array designs that interfaces wires to address wires, despite misalignments between electrical components and wires. In one embodiment, a nanoscale device may be composed of a first layer of two or more wires (1501-1511) and a second layer of two or more address wires (1512-1523) that overlays the first layer. The nanoscale device may also include an intermediate layer (704-804) positioned between the first layer and the second layer. Two or more redundant electrical component patterns (1400) may be fabricated within the intermediate layer so that one or more of the electrical component patterns is aligned with the first and second layers.

2. 发明申请

WO2007030208A1 CONSTANT-WEIGHT-CODE-BASED ADDRESSING OF NANOSCALE AND MIXED MICROSCALE/NANOSCALE ARRAYS 审中-公开
标题翻译：基于常数 - 基于代码的纳米结构和混合微阵列/纳米阵列的寻址
公开(公告)号：WO2007030208A1
公开(公告)日：2007-03-15
申请号：PCT/US2006/028300
申请日：2006-07-21
申请人： HEWLETT-PACKARD DEVELOPMENT COMPANY, L. P. , KUEKES, Philip, J. , ROBINETT, Warren, J. , ROTH, Ron, M. , SEROISSI, Gadiel , SNIDER, Gregory, S. , WILLIAMS, R., Stanley
发明人： KUEKES, Philip, J. , ROBINETT, Warren, J. , ROTH, Ron, M. , SEROISSI, Gadiel , SNIDER, Gregory, S. , WILLIAMS, R., Stanley
IPC分类号： G11C13/00 , G11C8/10
CPC分类号： G11C8/10 , B82Y10/00 , G11C13/00 , G11C13/0023 , G11C13/0069 , G11C2013/009 , G11C2213/77 , G11C2213/81
摘要： Various embodiments of the present invention include methods for determining nanowire addressing schemes and include microscale/nanoscale electronic devices that incorporate the nanowire addressing schemes for reliably addressing nanowire-junctions within nanowire crossbars (1700). The addressing schemes allow for change in the resistance state, or other physical or electronic state, of a selected nanowire-crossbar junction without changing the resistance state, or other physical or electronic state, of the remaining nanowire-crosbar junctions, and without destruction of either the selected nanowire-crossbar junction or the remaining, non-selected nanowire-crossbar junctions. Additional embodiments of the present invention included nanoscale memory arrays (1700) and other nanoscale electronic devices that incorporate the nanowire-addressing-scheme embodiments of the present invention. Certain of the embodiments of the present invention employ constant-weight codes (1308), a well-known class or error-control-encoding codes, as addressed-nanowire selection voltages applied to microscale output signal lines (1316-1319) of microscale/nanoscale encoder-demultiplexers that are selectively interconnected with a set of nanowires (1310-1315).
摘要翻译：本发明的各种实施例包括用于确定纳米线寻址方案的方法，并且包括微纳米级纳米级电子器件，其纳入用于在纳米线交叉梁内可靠地寻址纳米线结的纳米线寻址方案（1700）。寻址方案允许选择的纳米线 - 交叉连接点的电阻状态或其他物理或电子状态的改变，而不改变剩余的纳米线 - 交叉连接点的电阻状态或其他物理或电子状态，并且不破坏选择的纳米线 - 交叉结或剩余的未选择的纳米线 - 交叉点结。本发明的另外的实施例包括纳米尺度存储器阵列（1700）和纳入本发明的纳米线寻址方案实施例的其它纳米级电子器件。本发明的某些实施例采用公知的类或误差控制编码代码（1308）作为施加到微米级/微米级编码的微米级输出信号线（1316-1319）的寻址纳米线选择电压，纳米级编码器 - 解复用器，其选择性地与一组纳米线相互连接（1310-1315）。

3. 发明申请

WO2008054400A2 CONTROL LAYER FOR A NANOSCALE ELECTRONIC SWITCHING DEVICE 审中-公开
标题翻译：用于纳米电子开关器件的控制层
公开(公告)号：WO2008054400A2
公开(公告)日：2008-05-08
申请号：PCT/US2006/043687
申请日：2006-11-08
申请人： HEWLETT-PACKARD DEVELOPMENT COMPANY, L. P. , STEWART, Duncan , OHLBERG, Douglas, A. , WILLIAMS, Stanley, R. , KUEKES, Philip, J.
发明人： STEWART, Duncan , OHLBERG, Douglas, A. , WILLIAMS, Stanley, R. , KUEKES, Philip, J.
IPC分类号： G11C13/02 , H01L21/768 , H01L51/00
CPC分类号： G11C13/0009 , G11C2213/55 , G11C2213/56 , G11C2213/77 , H01L45/04 , H01L45/085 , H01L45/1233 , H01L45/1266 , H01L45/14 , H01L45/142 , H01L45/143 , H01L45/146 , H01L51/0591
摘要： A control layer (26, 26', 28, 28', 28") for use in a junction of a nanoscale electronic switching device (10) is disclosed. The control layer (26, 26', 28, 28', 28") includes a material that is chemically compatible with a connecting layer (16) and at least one electrode (12, 14) in the nanoscale switching device (10). The control layer (26, 26', 28, 28', 28") is adapted to control at least one of electrochemical reaction paths, electrophysical reaction paths, and combinations thereof during operation of the device (10).
摘要翻译：公开了一种用于纳米级电子开关装置（10）的接合处的控制层（26,26'，28,28'，28“），控制层（26,26'，28,28'，28” ）包括与纳米级切换装置（10）中的连接层（16）和至少一个电极（12,14）化学相容的材料。控制层（26,26'，28,28'，28“）适于在装置（10）的操作期间控制电化学反应路径，电物理反应路径及其组合中的至少一个。

4. 发明申请

WO2008048597A2 CROSSBAR-MEMORY SYSTEMS AND METHODS FOR WRITING TO AND READING FROM CROSSBAR MEMORY JUNCTIONS OF CROSSBAR-MEMORY SYSTEMS 审中-公开
标题翻译：交叉记忆体系统和用于写入和读取跨轨存储器系统的跨轨存储器连接的方法
公开(公告)号：WO2008048597A2
公开(公告)日：2008-04-24
申请号：PCT/US2007/022070
申请日：2007-10-16
申请人： HEWLETT-PACKARD DEVELOPMENT COMPANY, L. P. , ROBINETT, Warren , KUEKES, Philip, J.
发明人： ROBINETT, Warren , KUEKES, Philip, J.
IPC分类号： G11C13/02
CPC分类号： G11C13/02 , B82Y10/00 , G06F11/1008 , G06F11/1076 , G11C11/54 , G11C13/0023 , G11C13/004 , G11C13/0069 , G11C2013/0047 , G11C2013/0057 , G11C2013/009 , G11C2213/16 , G11C2213/77 , G11C2213/81
摘要： Various embodiments of the present invention are directed to crossbar-memory systems to methods for writing information to and reading information stored in such systems. In one embodiment of the present invention, a crossbar-memory system (1300) comprises a first layer of microscale signal lines (808), a second layer of microscale signal lines (810), a first layer of nanowires (804) configured so that each first layer nanowire overlaps each first layer microscale signal line (808), and a second layer of nanowires (806) configured so that each second layer nanowire overlaps each second layer microscale signal line (810) and overlaps each first layer nanowire (804). The crossbar-memory system includes nonlinear-tunneling resistors (1526,1528) configured to selectively connect first layer nanowires (804) to first layer microscale signal lines (808) and to selectively connect second layer nanowires (806) to second layer microscale signal lines (810). The crossbar-memory system (1300) also includes nonlinear tunneling-hysteretic resistors (1318) configured to connect each first layer nanowire (2008) to each second layer nanowire (2012) at each crossbar intersection.
摘要翻译：本发明的各种实施例涉及交叉存储器系统，用于将信息写入和读取存储在这样的系统中的信息的方法。在本发明的一个实施例中，交叉开关存储器系统（1300）包括第一层微米级信号线（808），第二层微型信号线（810），第一层纳米线（804），其构造成使得每个第一层纳米线与每个第一层微米信号线（808）重叠，并且第二纳米线层（806）被配置为使得每个第二层纳米线与每个第二层微米信号线（810）重叠并与每个第一层纳米线（804）重叠，。交叉开关存储器系统包括非线性隧道电阻器（1526,1528），其被配置为选择性地将第一层纳米线（804）连接到第一层微米信号线（808），并且将第二层纳米线（806）选择性地连接到第二层微米信号线（810）。交叉开关存储器系统（1300）还包括非线性隧道迟滞电阻器（1318），其被配置为在每个交叉点交叉处将每个第一层纳米线（2008）连接到每个第二层纳米线（2012）。

5. 发明申请

WO2008134021A1 ACTIVE CONTROL OF TIME-VARYING SPATIAL TEMPERATURE DISTRIBUTION 审中-公开
标题翻译：时空变化空间分布的主动控制
公开(公告)号：WO2008134021A1
公开(公告)日：2008-11-06
申请号：PCT/US2008/005398
申请日：2008-04-25
申请人： HEWLETT=PACKARD DEVELOPMENT COMPANY, L. P. , STEWART, Duncan , BEAUSOLEIL, Raymond , KUEKES, Philip, J.
发明人： STEWART, Duncan , BEAUSOLEIL, Raymond , KUEKES, Philip, J.
IPC分类号： H01L23/36
CPC分类号： F27B17/0025 , F27D19/00 , H01L2924/0002 , H01L2924/00
摘要： In an embodiment, a microchip (10) includes a plurality of heat-producing electronic devices (14) and a plurality of heat-sensitive devices (16). A plurality of temperature control elements (18) are spatially distributed relative to the heat-producing electronis devices and the heat-senitive devices to enable active contoal of temperature to compensate for spatially non-uniform and temporally-varying heat emitted from the heat-producing electronic devices.
摘要翻译：在一个实施例中，微芯片（10）包括多个发热电子器件（14）和多个热敏器件（16）。多个温度控制元件（18）相对于发热电子装置和热传递装置在空间上分布，以使得能够有效地调节温度以补偿从发热产生的空间上不均匀和时间变化的热量电子设备。

6. 发明申请

WO2008008419A2 DEFECT-AND-FAILURE-TOLERANT DEMULTIPLEXER USING SERIES REPLICATION AND ERROR-CONTROL ENCODING 审中-公开
标题翻译：使用串行复制和错误控制编码的缺陷 - 容错解扩器
公开(公告)号：WO2008008419A2
公开(公告)日：2008-01-17
申请号：PCT/US2007/015861
申请日：2007-07-11
申请人： HEWLETT-PACKARD DEVELOPMENT COMPANY, L. P. , ROBINETT, Warren , KUEKES, Philip, J. , WILLIAMS, Stanley, R.
发明人： ROBINETT, Warren , KUEKES, Philip, J. , WILLIAMS, Stanley, R.
CPC分类号： H03K19/007 , G06F11/1076 , H03K19/00315
摘要： One embodiment of the present invention is a method for constructing defect-and-failure-tolerant demultiplexers (figures 14 an 16). This method is applicable to nanoscale, microscal, or larger-scale demultiplexer circuits,. Demultiplexer circuits can be viewed as a set of AND gates (figures 9A-B), each including a reversibly switchable interconnection between a number of address lines (910-912 and 920-922), or address-line-derived signal lines, and an output signal line (914 and 924). Each reversibly switchable interconnection includes one ot more reversibly switchable elements (906-908 and 916-918). In certain demultiplexer embodiments, NMOS (102) and/or PMOS transistors (206) are employed as reversibly switchable elements. In the method that representd one embodiment of the present invention, two or more serially connected transistors (410, 412, and 411, 413; 1502) are employed in each reversibly switchable interconnection, so that short defects in up to one less then the number of serially interconnected transistors does not lead to failure of the reversibly switchable interconnection. In addition, error-control-encoding techniques are used to introduce additional address-line-derived signal lines (1602, 1604) and additional switchable interconnections (1610) so that the demultiplexer may function even when a number of individual, switchable interconnections are open-defective.
摘要翻译：本发明的一个实施例是一种用于构造缺陷和容错解复用器的方法（图14和16）。该方法适用于纳米级，微型或更大规模的解复用器电路。解复用器电路可被视为一组与门（图9A-B），每一个都包括多个地址线（910-912和920-922）或源自地址线的信号线之间的可逆切换的互连，以及输出信号线（914和924）。每个可逆切换的互连包括一个更可逆的可切换元件（906-908和916-918）。在某些解复用器实施例中，采用NMOS（102）和/或PMOS晶体管（206）作为可逆可切换元件。在代表本发明的一个实施例的方法中，在每个可逆可切换的互连中采用两个或更多个串联连接的晶体管（410,412和411,413; 1502），使得短至多一个的缺陷串联互连的晶体管不会导致可逆可切换互连的故障。另外，使用错误控制编码技术来引入附加的地址线导出信号线（1602,1604）和附加可切换互连（1610），使得即使当多个单独的可切换互连打开时解复用器也可以起作用缺陷型。

7. 发明申请

WO2005026957A2 DEFECT-TOLERANT AND FAULT-TOLERANT CIRCUIT INTERCONNECTIONS 审中-公开
标题翻译：缺陷容忍和容错电路互连
公开(公告)号：WO2005026957A2
公开(公告)日：2005-03-24
申请号：PCT/US2004/029333
申请日：2004-09-08
申请人： HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. , KUEKES, Philip, J. , WILLIAMS, R., Stanley , SEROUSSI, Gadiel
发明人： KUEKES, Philip, J. , WILLIAMS, R., Stanley , SEROUSSI, Gadiel
IPC分类号： G06F11/00
CPC分类号： G06F11/1016 , B82Y10/00 , G11C8/10 , G11C13/0014 , G11C2213/77 , G11C2213/81
摘要： Methods for increasing defect tolerance and fault tolerance in systems containing interconnected components, in which a signal level is classified as belonging to one of a plurality of different, distinguishable classes based on one or more thresholds separating the signal-level classes, and defect-and-fault tolerant systems embodying the methods. An electronic-device embodiment including an array of nanowire crossbars, the nanoscale memory elements within the nanowire crossbars addressed through conventional microelectronic address lines, and a method embodiment for providing fault-tolerant interconnection interfaces with electrically distinguishable signal levels are described. In the described embodiment, in order to interconnect microelectronic address lines with the nanowire crossbars within the electronic memory, an address encoding technique is employed to generate a number of redundant, parity-check address lines to supplement a minimally required set of address signal lines needed to access the nanoscale memory elements.
摘要翻译：用于增加包含相互连接的部件的系统中的缺陷容忍度和容错性的方法，其中根据分离信号级别类别的一个或多个阈值将信号级别分类为多个不同的可区分类别之一，以及缺陷和体现这种方法的容错系统。描述了一种电子器件实施例，其包括纳米线交叉杆阵列，通过常规微电子地址线寻址的纳米线交叉管内的纳米级存储元件，以及用于提供具有电可区分信号电平的容错互连接口的方法实施例。在所描述的实施例中，为了将微电子地址线与电子存储器内的纳米线交叉点互连，采用地址编码技术来生成多个冗余的奇偶校验地址线，以补充所需的最低要求的地址信号线组以访问纳米尺度的存储元件。

8. 发明申请

WO2007078317A2 AUTONOMOUS EVANESCENT OPTICAL NANOSENSOR 审中-公开
标题翻译：自动光纤光学传感器
公开(公告)号：WO2007078317A2
公开(公告)日：2007-07-12
申请号：PCT/US2006/018158
申请日：2006-05-10
申请人： HEWLETT-PACKARD DEVELOPMEMT COMPANY, L.P. , BEAUSOLEIL, Raymond, G. , KUEKES, Philip, J. , WILLIAMS, R., Stanley
发明人： BEAUSOLEIL, Raymond, G. , KUEKES, Philip, J. , WILLIAMS, R., Stanley
IPC分类号： G01N21/55
CPC分类号： G01N21/7703 , G01N21/648 , G01N21/65 , G01N21/94 , G01N33/569 , G01N35/00871 , G01N2021/7786 , G01N2035/00881
摘要： A sensor (100) includes traps (130) that are adjacent to a waveguide (120) and capable of holding a contaminant for an interaction with an evanescent field surrounding the waveguide (120). When held in a trap (130), a particle of the contaminant, which may be an atom, a molecule, a virus, or a microbe, scatters light from the waveguide (120), and the scattered light can be measured to detect the presence or concentration of the contaminant. Holding of the particles permits sensing of the contaminant in a gas where movement of the particles might otherwise be too fast to permit measurement of the interaction with the evanescent field. The waveguide (120), a lighting system (140), a photosensor (150), and a communications interface (160) can all be fabricated on a semiconductor die (110) to permit fabrication of an autonomous nanosensor capable of suspension in the air or a gas being sensed.
摘要翻译：传感器（100）包括与波导（120）相邻并且能够保持用于与围绕波导（120）的ev逝场的相互作用的污染物的阱（130）。当保持在捕获器（130）中时，可以是原子，分子，病毒或微生物的污染物的颗粒从波导（120）散射光，并且可以测量散射光以检测污染物的存在或集中。保持颗粒允许感测气体中的污染物，其中颗粒的移动可能太快以至于不能测量与渐逝场的相互作用。波导管120，照明系统140，光电传感器150以及通信接口160均可制造在半导体管芯110上，以制造能够在空气中悬浮的自主纳米传感器或被感测的气体。

9. 发明申请

WO2010120298A1 THERMOELECTRIC DEVICE HAVING A VARIABLE CROSS-SECTION CONNECTING STRUCTURE 审中-公开
标题翻译：具有可变交叉部分连接结构的热电装置
公开(公告)号：WO2010120298A1
公开(公告)日：2010-10-21
申请号：PCT/US2009/040690
申请日：2009-04-15
申请人： HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P , KUEKES, Philip, J. , BRATKOVSKI, Alexandre, M. , CHO, Hans, S. , QUITORIANO, Nathaniel, J. , KAMINS, Theodore, I. , WILLIAMS, R, Stanley
发明人： KUEKES, Philip, J. , BRATKOVSKI, Alexandre, M. , CHO, Hans, S. , QUITORIANO, Nathaniel, J. , KAMINS, Theodore, I. , WILLIAMS, R, Stanley
IPC分类号： H01L35/04 , H01L35/28
CPC分类号： H01L35/32
摘要： A thermoelectric device having a variable cross-section connecting structure includes a first electrode, a second electrode, and a connecting structure connecting the first electrode and the second electrode. The connecting structure has a first section and a second section. The width of the second section is greater than the width of the first section, and the width of the first section is less than a width that is approximately equivalent to a phonon mean free path through the first section.
摘要翻译：具有可变横截面连接结构的热电装置包括第一电极，第二电极和连接第一电极和第二电极的连接结构。连接结构具有第一部分和第二部分。第二部分的宽度大于第一部分的宽度，并且第一部分的宽度小于大致等于通过第一部分的声子平均自由程的宽度。

10. 发明申请

WO2004021443A1 CONFIGURABLE MOLECULAR SWITCH ARRAY 审中-公开
标题翻译：可配置分子开关阵列
公开(公告)号：WO2004021443A1
公开(公告)日：2004-03-11
申请号：PCT/US2003/027280
申请日：2003-08-29
申请人： HEWLETT-PACKARD DEVELOPMENT COMPANY, L. P.
发明人： SNIDER, Gregory, S. , KUEKES, Philip, J. , WILLIAMS, R., Stanley
IPC分类号： H01L27/12
CPC分类号： H01L27/285 , B82Y10/00 , G11C13/0009 , G11C13/0014 , G11C2213/14 , G11C2213/34 , G11C2213/77 , G11C2213/81
摘要： A computing system (74) for implementing at least one electronic circuit with gain comprises at least one two-dimensional molecular switch array (50, 120). The molecular switch array (50, 120) is formed by assembling two or more crossed planes of wires (10) into a configuration of devices. Each device comprises a junction (16) formed by a pair of crossed wires (20, 22) and at least one connector species (24) that connects the pair of crossed wires (20, 22) in the junction (16). The junction (16) has a functional dimension in nanometers, and includes a switching capability provided by both one or more connector species (24) and the pair of crossed wires (20, 22) and a configurable nanoscale wire transistor having a first state that functions as a transistor (38) and a second state that functions as a conducting semiconductor wire (44). Specific connections are made to interconnect the devices and connect the devices to two structures (60, 62, 130, 132) that provide high and low voltages.
摘要翻译：用于实现具有增益的至少一个电子电路的计算系统（74）包括至少一个二维分子开关阵列（50,120）。分子开关阵列（50,120）通过将两个或更多个交叉的导线平面（10）组装成装置的构造而形成。每个装置包括由一对交叉线（20,22）形成的接点（16）和连接该接合部（16）中的该对交叉线（20,22）的至少一个连接器种类（24）。结（16）具有纳米的功能尺寸，并且包括由一个或多个连接器种类（24）和一对交叉导线（20,22）提供的切换能力以及具有第一状态的可配置纳米级线晶体管，用作晶体管（38）和用作导电半导体线（44）的第二状态。进行具体的连接以将设备互连并将设备连接到提供高和低电压的两个结构（60,62,130,132）。

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