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    • 1. 发明授权
    • Power control circuitry for a TDMA radio frequency transmitter
    • TDMA射频发射机的功率控制电路
    • US5287555A
    • 1994-02-15
    • US733797
    • 1991-07-22
    • Gregory P. WilsonDonald B. Lemersal, Jr.Rashid M. OsmaniDale G. SchwentJohn C. Johnson
    • Gregory P. WilsonDonald B. Lemersal, Jr.Rashid M. OsmaniDale G. SchwentJohn C. Johnson
    • H03G3/20H04B1/036H04B1/04H04B1/40H04B7/005
    • H04W52/30H03G3/3042H03G3/3047H04B1/036H04B1/40H04W52/36H04B2001/0416
    • A transmitter (604) of a TDMA cellular telephone (600) includes power control circuitry (100) comprised of variable gain stage (104), mixer (106), bandpass filter (109), RF amplifier (110), and directional coupler (112) in a forward path, and two detectors (116 and 117), four A/D converters (118, 119, 121 and 123), digital controller (120), and D/A converter (126) in a feedback path. In operation, the variable gain stage (104) is responsive to a gain control signal AOCCNT (128) for adjusting a modulated IF signal, which is then mixed in mixer (106) with an RF reference signal to produce the transmit RF signal. The temperature and supply voltage are sampled by controller (120) at the beginning of each time slot. Adjustments in the gain control signal (128) dictated by the sampled temperature and supply voltage are made by controller (120) in each time slot prior to keying the RF amplifier (110). The transmit RF signal is amplified by the RF amplifier (110) to produce the transmit output signal which is coupled by the directional coupler (112) and transmit filter (618) to an antenna (620) for transmission. The forward power and reverse power of the transmit output signal are sampled by controller (120) at the end of each time slot. The sampled forward power is used by controller (120) in calculating the value of the gain control signal for the next time slot. If the sampled reverse power or supply voltage exceed respective maximum values, the RF amplifier (110) is dekeyed by controller (120).
    • TDMA蜂窝电话(600)的发射机(604)包括具有可变增益级(104)的功率控制电路。 在操作中,可变增益级(104)响应用于调整调制IF信号的增益控制信号(128)。 在每个时隙开始时,控制器(120)对温度和电源电压进行采样。 控制器(120)在对RF放大器(110)进行键控之前的每个时隙中由采样的温度和电源电压进行的增益控制信号(128)的调整。 发射RF信号由RF放大器(110)放大以产生发射输出信号。 发射输出信号的正向功率和反向功率在每个时隙结束时由控制器(120)进行采样。 在计算下一个时隙的增益控制信号的值时,控制器(120)使用采样的正向功率。 如果采样的反向功率或电源电压超过相应的最大值,则RF放大器(110)由控制器(120)键入。
    • 3. 发明授权
    • Digital modulation circuit
    • 数字调制电路
    • US5157693A
    • 1992-10-20
    • US678518
    • 1991-04-01
    • Donald B. Lemersal, Jr.Thomas J. WalczakRobert J. Greene
    • Donald B. Lemersal, Jr.Thomas J. WalczakRobert J. Greene
    • H04L27/20
    • H04L27/2092
    • A modulator circuit for generating a modulated, DQPSK signal. The modulator circuit includes an encoder for receiving a binary bit stream comprised of bit pairs defining differential phase changes. An encoder receives a bit stream of which bit pairs thereof define differential phase changes. The encoder encodes the bit pairs into codewords which are stored and then supplied to an I-accumulator, a Q-accumulator, and a memory element. The memory element contains pre-multiplied values which are supplied to the I- and the Q-accumulators which add terms of the pre-multiplied values to form I-portions and Q-portions of a DQPSK-modulated signal. The I- and Q-portions may then be supplied to a quadrature modulator.
    • 一种用于产生调制的DQPSK信号的调制器电路。 调制器电路包括用于接收由定义差分相位变化的位对组成的二进制比特流的编码器。 编码器接收其比特对限定差分相位变化的比特流。 编码器将比特对编码到存储然后提供给I累加器,Q累加器和存储器元件的码字中。 存储器元件包含预加倍值,其被提供给I和Q累加器,其加上预乘数值的项以形成DQPSK调制信号的I部分和Q部分。 然后可以将I和Q部分提供给正交调制器。