专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US07934077B2 Semiconductor device and data processing system selectively operating as one of a big endian or little endian system 有权
标题翻译：半导体器件和数据处理系统选择性地作为大端或小端系统之一运行
公开(公告)号：US07934077B2
公开(公告)日：2011-04-26
申请号：US12708805
申请日：2010-02-19
申请人： Goro Sakamaki , Yuri Azuma
发明人： Goro Sakamaki , Yuri Azuma
IPC分类号： G06F9/30 , G06F13/12
CPC分类号： G09G5/39 , G06F7/768 , G06F9/4806 , G06F13/10 , G06F13/102 , G06F13/20 , G06F13/4013 , G06F13/4022 , G06F13/4063 , G06F13/4221 , G09G3/2096 , G09G3/36 , G09G3/3648 , G09G3/3674 , G09G2310/08 , G09G2360/10
摘要： The present invention is to provide a semiconductor device that can correctly switch endians on the outside even if the endian of a parallel interface is not recognized on the outside. The semiconductor device includes a switching circuit and a first register. The switching circuit switches between whether a parallel interface with the outside is to be used as a big endian or a little endian. A first register holds control data of the switching circuit. The switching circuit regards the parallel interface as the little endian when first predetermined control information, that is unchanged in the values of specific bit positions even if its high-order and low-order bit positions are transposed, is supplied to the first register, and regards the parallel interface as the big endian when second predetermined control information, that is unchanged in the values of specific bit positions even if its high-order and low-order bit positions are transposed, is supplied to the first register. Whatever the endian setting status, the control information can be correctly inputted without being influenced by the endian setting status.
摘要翻译：本发明是提供一种半导体装置，即使在外部不识别到并行接口的端面，也能够正确地切换外部的端子。半导体器件包括开关电路和第一寄存器。开关电路是否将与外部的并行接口用作大端或小端。第一寄存器保存开关电路的控制数据。当第一预定控制信息（即使其高位和低位比特位置被转置时在特定比特位置的值不变）的第一预定控制信息被提供给第一寄存器时，切换电路将并行接口视为小端，并且将并行接口视为大端，即使第二预定控制信息（即使其高位和低位比特位置被转置也在特定比特位置的值不变）被提供给第一寄存器。无论端点设置状态如何，控制信息都可以正确输入，而不受端序设置状态的影响。

2. 发明授权

US07889164B2 Semiconductor integrated circuit device and mobile terminal device 有权
标题翻译：半导体集成电路器件和移动终端器件
公开(公告)号：US07889164B2
公开(公告)日：2011-02-15
申请号：US11851927
申请日：2007-09-07
申请人： Tatsuya Ishii , Shin Morita , Yuri Azuma , Goro Sakamaki
发明人： Tatsuya Ishii , Shin Morita , Yuri Azuma , Goro Sakamaki
IPC分类号： G09G3/36
CPC分类号： G09G3/2096 , G09G2310/0221
摘要： In a semiconductor integrated circuit device of a liquid crystal display drive controller, the present invention is intended to suppress an increase in the number of output terminals for interface control signals for control of parallel interface to a sub liquid crystal display controller. A host interface circuit comprises a first serial interface circuit for serial data input and output in a differential manner, a parallel interface circuit, and other interface circuits. When the first serial interface circuit is selected for use as the host interface, the host interface circuit outputs in parallel predetermined information input via the first serial interface circuit from the parallel interface circuit to outside and generates interface control signals for the parallel output. External terminals for host interface assigned to the other interface circuits are used for double duty to output the interface control signals.
摘要翻译：在液晶显示驱动控制器的半导体集成电路装置中，本发明旨在抑制用于控制与副液晶显示控制器的并联接口的接口控制信号的输出端数量的增加。主机接口电路包括用于串行数据输入和差分输出的第一串行接口电路，并行接口电路和其他接口电路。当选择第一串行接口电路用作主机接口时，主机接口电路将通过第一串行接口电路输入的预定信息从并行接口电路输出到外部，并且产生用于并行输出的接口控制信号。分配给其他接口电路的主机接口的外部端子用于输出接口控制信号的双重占空比。

3. 发明授权

US07685407B2 Semiconductor device and data processing system selectively operating as one of a big endian or little endian system 有权
标题翻译：半导体器件和数据处理系统选择性地操作为大端或小端系统之一
公开(公告)号：US07685407B2
公开(公告)日：2010-03-23
申请号：US11443126
申请日：2006-05-31
申请人： Goro Sakamaki , Yuri Azuma
发明人： Goro Sakamaki , Yuri Azuma
IPC分类号： G06F9/30 , G06F13/12
CPC分类号： G09G5/39 , G06F7/768 , G06F9/4806 , G06F13/10 , G06F13/102 , G06F13/20 , G06F13/4013 , G06F13/4022 , G06F13/4063 , G06F13/4221 , G09G3/2096 , G09G3/36 , G09G3/3648 , G09G3/3674 , G09G2310/08 , G09G2360/10
摘要： The present invention is to provide a semiconductor device that can correctly switch endians on the outside even if the endian of a parallel interface is not recognized on the outside. The semiconductor device includes a switching circuit and a first register. The switching circuit switches between whether a parallel interface with the outside is to be used as a big endian or a little endian. A first register holds control data of the switching circuit. The switching circuit regards the parallel interface as the little endian when first predetermined control information, that is unchanged in the values of specific bit positions even if its high-order and low-order bit positions are transposed, is supplied to the first register, and regards the parallel interface as the big endian when second predetermined control information, that is unchanged in the values of specific bit positions even if its high-order and low-order bit positions are transposed, is supplied to the first register. Whatever the endian setting status, the control information can be correctly inputted without being influenced by the endian setting status.
摘要翻译：本发明是提供一种半导体器件，即使在外部不识别出并行接口的端面，也能正确地切换外部的端子。半导体器件包括开关电路和第一寄存器。开关电路是否将与外部的并行接口用作大端或小端。第一寄存器保存开关电路的控制数据。当第一预定控制信息（即使其高位和低位比特位置被转置时在特定比特位置的值不变）的第一预定控制信息被提供给第一寄存器时，切换电路将并行接口视为小端，并且将并行接口视为大端，即使第二预定控制信息（即使其高位和低位比特位置被转置也在特定比特位置的值不变）被提供给第一寄存器。无论端点设置状态如何，控制信息都可以正确输入，而不受端序设置状态的影响。

4. 发明授权

US08095776B2 Semiconductor device and data processing system selectively operating as one of a big endian or little endian system 有权
标题翻译：半导体器件和数据处理系统选择性地作为大端或小端系统之一运行
公开(公告)号：US08095776B2
公开(公告)日：2012-01-10
申请号：US13038237
申请日：2011-03-01
申请人： Goro Sakamaki , Yuri Azuma
发明人： Goro Sakamaki , Yuri Azuma
IPC分类号： G06F15/00
CPC分类号： G09G5/39 , G06F7/768 , G06F9/4806 , G06F13/10 , G06F13/102 , G06F13/20 , G06F13/4013 , G06F13/4022 , G06F13/4063 , G06F13/4221 , G09G3/2096 , G09G3/36 , G09G3/3648 , G09G3/3674 , G09G2310/08 , G09G2360/10
摘要： A semiconductor device correctly switches endian modes regardless of the current endian mode of an interface. The semiconductor device includes a switching circuit and a first register. The switching circuit switches an interface to be used in big endian or little endian mode. The first register holds control data of the switching circuit. The switching circuit sets the interface in little endian mode when first predetermined control information is supplied to the first register, and sets the interface in big endian mode when second predetermined control information is supplied to the first register. The control information can be correctly inputted without being influenced by the endian setting status.
摘要翻译：无论接口的当前端模式如何，半导体器件都可正确切换端模式。半导体器件包括开关电路和第一寄存器。开关电路切换用于大端或小端模式的接口。第一个寄存器保存开关电路的控制数据。当第一预定控制信息被提供给第一寄存器时，开关电路将接口设置为小端模式，并且当第二预定控制信息被提供给第一寄存器时，将接口设置为大端模式。可以正确输入控制信息，而不受端段设置状态的影响。

5. 发明申请

US20080068390A1 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND MOBILE TERMINAL DEVICE 有权
标题翻译：半导体集成电路设备和移动终端设备
公开(公告)号：US20080068390A1
公开(公告)日：2008-03-20
申请号：US11851927
申请日：2007-09-07
申请人： Tatsuya ISHII , Shin Morita , Yuri Azuma , Goro Sakamaki
发明人： Tatsuya ISHII , Shin Morita , Yuri Azuma , Goro Sakamaki
IPC分类号： G06F13/14
CPC分类号： G09G3/2096 , G09G2310/0221
摘要： In a semiconductor integrated circuit device of a liquid crystal display drive controller, the present invention is intended to suppress an increase in the number of output terminals for interface control signals for control of parallel interface to a sub liquid crystal display controller. A host interface circuit comprises a first serial interface circuit for serial data input and output in a differential manner, a parallel interface circuit, and other interface circuits. When the first serial interface circuit is selected for use as the host interface, the host interface circuit outputs in parallel predetermined information input via the first serial interface circuit from the parallel interface circuit to outside and generates interface control signals for the parallel output. External terminals for host interface assigned to the other interface circuits are used for double duty to output the interface control signals.
摘要翻译：在液晶显示驱动控制器的半导体集成电路器件中，本发明旨在抑制用于控制与副液晶显示控制器的并联接口的接口控制信号的输出端数量的增加。主机接口电路包括用于串行数据输入和差分输出的第一串行接口电路，并行接口电路和其他接口电路。当选择第一串行接口电路用作主机接口时，主机接口电路将通过第一串行接口电路输入的预定信息从并行接口电路输出到外部，并且产生用于并行输出的接口控制信号。分配给其他接口电路的主机接口的外部端子用于输出接口控制信号的双重占空比。

6. 发明申请

US20100153598A1 SEMICONDUCTOR DEVICE AND DATA PROCESSING SYSTEM 有权
标题翻译：半导体器件和数据处理系统
公开(公告)号：US20100153598A1
公开(公告)日：2010-06-17
申请号：US12708805
申请日：2010-02-19
申请人： Goro Sakamaki , Yuri Azuma
发明人： Goro Sakamaki , Yuri Azuma
IPC分类号： G06F13/12
CPC分类号： G09G5/39 , G06F7/768 , G06F9/4806 , G06F13/10 , G06F13/102 , G06F13/20 , G06F13/4013 , G06F13/4022 , G06F13/4063 , G06F13/4221 , G09G3/2096 , G09G3/36 , G09G3/3648 , G09G3/3674 , G09G2310/08 , G09G2360/10
摘要： The present invention is to provide a semiconductor device that can correctly switch endians on the outside even if the endian of a parallel interface is not recognized on the outside. The semiconductor device includes a switching circuit and a first register. The switching circuit switches between whether a parallel interface with the outside is to be used as a big endian or a little endian. A first register holds control data of the switching circuit. The switching circuit regards the parallel interface as the little endian when first predetermined control information, that is unchanged in the values of specific bit positions even if its high-order and low-order bit positions are transposed, is supplied to the first register, and regards the parallel interface as the big endian when second predetermined control information, that is unchanged in the values of specific bit positions even if its high-order and low-order bit positions are transposed, is supplied to the first register. Whatever the endian setting status, the control information can be correctly inputted without being influenced by the endian setting status.
摘要翻译：本发明是提供一种半导体装置，即使在外部不识别到并行接口的端面，也能够正确地切换外部的端子。半导体器件包括开关电路和第一寄存器。开关电路是否将与外部的并行接口用作大端或小端。第一寄存器保存开关电路的控制数据。当第一预定控制信息（即使其高位和低位比特位置被转置时在特定比特位置的值不变）的第一预定控制信息被提供给第一寄存器时，切换电路将并行接口视为小端，并且将并行接口视为大端，即使第二预定控制信息（即使其高位和低位比特位置被转置也在特定比特位置的值不变）被提供给第一寄存器。无论端点设置状态如何，控制信息都可以正确输入，而不受端序设置状态的影响。

7. 发明申请

US20060277399A1 Semiconductor device and data processing system 有权
标题翻译：半导体器件和数据处理系统
公开(公告)号：US20060277399A1
公开(公告)日：2006-12-07
申请号：US11443126
申请日：2006-05-31
申请人： Goro Sakamaki , Yuri Azuma
发明人： Goro Sakamaki , Yuri Azuma
IPC分类号： G06F15/00
CPC分类号： G09G5/39 , G06F7/768 , G06F9/4806 , G06F13/10 , G06F13/102 , G06F13/20 , G06F13/4013 , G06F13/4022 , G06F13/4063 , G06F13/4221 , G09G3/2096 , G09G3/36 , G09G3/3648 , G09G3/3674 , G09G2310/08 , G09G2360/10
摘要： The present invention is to provide a semiconductor device that can correctly switch endians on the outside even if the endian of a parallel interface is not recognized on the outside. The semiconductor device includes a switching circuit and a first register. The switching circuit switches between whether a parallel interface with the outside is to be used as a big endian or a little endian. A first register holds control data of the switching circuit. The switching circuit regards the parallel interface as the little endian when first predetermined control information, that is unchanged in the values of specific bit positions even if its high-order and low-order bit positions are transposed, is supplied to the first register, and regards the parallel interface as the big endian when second predetermined control information, that is unchanged in the values of specific bit positions even if its high-order and low-order bit positions are transposed, is supplied to the first register. Whatever the endian setting status, the control information can be correctly inputted without being influenced by the endian setting status.
摘要翻译：本发明是提供一种半导体装置，即使在外部不识别到并行接口的端面，也能够正确地切换外部的端子。半导体器件包括开关电路和第一寄存器。开关电路是否将与外部的并行接口用作大端或小端。第一寄存器保存开关电路的控制数据。当第一预定控制信息（即使其高位和低位比特位置被转置时在特定比特位置的值不变）的第一预定控制信息被提供给第一寄存器时，切换电路将并行接口视为小端，并且将并行接口视为大端，即使第二预定控制信息（即使其高位和低位比特位置被转置也在特定比特位置的值不变）被提供给第一寄存器。无论端点设置状态如何，控制信息都可以正确输入，而不受端序设置状态的影响。

8. 发明授权

US08316217B2 Semiconductor device and data processing system selectively operating as one of a big endian or little endian system 有权
公开(公告)号：US08316217B2
公开(公告)日：2012-11-20
申请号：US13327757
申请日：2011-12-16
申请人： Goro Sakamaki , Yuri Azuma
发明人： Goro Sakamaki , Yuri Azuma
IPC分类号： G06F9/30
CPC分类号： G09G5/39 , G06F7/768 , G06F9/4806 , G06F13/10 , G06F13/102 , G06F13/20 , G06F13/4013 , G06F13/4022 , G06F13/4063 , G06F13/4221 , G09G3/2096 , G09G3/36 , G09G3/3648 , G09G3/3674 , G09G2310/08 , G09G2360/10
摘要： A semiconductor device correctly switches endian modes regardless of the current endian mode of an interface. The semiconductor device includes a switching circuit and a first register. The switching circuit switches an interface to be used in big endian or little endian mode. The first register holds control data of the switching circuit. The switching circuit sets the interface in little endian mode when first predetermined control information is supplied to the first register, and sets the interface in big endian mode when second predetermined control information is supplied to the first register. The control information can be correctly inputted without being influenced by the endian setting status.

9. 发明申请

US20120154347A1 SEMICONDUCTOR DEVICE AND DATA PROCESSING SYSTEM 有权
标题翻译：半导体器件和数据处理系统
公开(公告)号：US20120154347A1
公开(公告)日：2012-06-21
申请号：US13327757
申请日：2011-12-16
申请人： Goro Sakamaki , Yuri Azuma
发明人： Goro Sakamaki , Yuri Azuma
IPC分类号： G09G5/00
CPC分类号： G09G5/39 , G06F7/768 , G06F9/4806 , G06F13/10 , G06F13/102 , G06F13/20 , G06F13/4013 , G06F13/4022 , G06F13/4063 , G06F13/4221 , G09G3/2096 , G09G3/36 , G09G3/3648 , G09G3/3674 , G09G2310/08 , G09G2360/10
摘要： A semiconductor device correctly switches endian modes regardless of the current endian mode of an interface. The semiconductor device includes a switching circuit and a first register. The switching circuit switches an interface to be used in big endian or little endian mode. The first register holds control data of the switching circuit. The switching circuit sets the interface in little endian mode when first predetermined control information is supplied to the first register, and sets the interface in big endian mode when second predetermined control information is supplied to the first register. The control information can be correctly inputted without being influenced by the endian setting status.
摘要翻译：无论接口的当前端模式如何，半导体器件都可正确切换端模式。半导体器件包括开关电路和第一寄存器。开关电路切换用于大端或小端模式的接口。第一个寄存器保存开关电路的控制数据。当第一预定控制信息被提供给第一寄存器时，开关电路将接口设置为小端模式，并且当第二预定控制信息被提供给第一寄存器时，将接口设置为大端模式。可以正确输入控制信息，而不受端段设置状态的影响。

10. 发明授权

US08325128B2 Display device and driving circuit thereof 失效
标题翻译：显示装置及其驱动电路
公开(公告)号：US08325128B2
公开(公告)日：2012-12-04
申请号：US12170518
申请日：2008-07-10
申请人： Yukari Katayama , Yoshiki Kurokawa , Akihito Akai , Goro Sakamaki
发明人： Yukari Katayama , Yoshiki Kurokawa , Akihito Akai , Goro Sakamaki
IPC分类号： G09G3/36
CPC分类号： G09G3/3611 , G09G3/3406 , G09G3/3688 , G09G3/3696 , G09G2310/027 , G09G2320/0252 , G09G2320/0271 , G09G2320/041 , G09G2320/0646 , G09G2320/0673 , G09G2340/16 , G09G2360/18
摘要： In a display device such as a liquid crystal display, a processing for compressing a range of display data (grayscale) to a low grayscale side (a grayscale range where response is fast) except for a high grayscale side (a grayscale range where response is slow) at a predetermined compression ratio to conduct display according to response characteristic of transition between grayscales and a temperature state and a processing for increasing a light amount of a backlight to compensate for luminance change due to the compression are performed, for example, in a liquid crystal panel of TN liquid crystal. Thereby, response can be made fast even at a low temperature time.
摘要翻译：在诸如液晶显示器的显示装置中，除了高灰阶侧（响应为灰度等级的灰度级范围）之外，将显示数据（灰度级）的范围压缩到低灰度级（响应快的灰度范围）慢），以根据灰阶和温度状态之间的转变的响应特性进行显示，并且例如在一个例如在一个例子中执行用于增加背光的光量以补偿由于压缩引起的亮度变化的处理 TN液晶液晶面板。因此即使在低温时也可以做出快速响应。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式