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    • 1. 发明授权
    • Microprocessor bus structure
    • 微处理器总线结构
    • US06457089B1
    • 2002-09-24
    • US09422368
    • 1999-10-21
    • Gordon J. RobbinsDonald Norman Senzig
    • Gordon J. RobbinsDonald Norman Senzig
    • G06F1300
    • G06F13/4217
    • The present invention discloses a microprocessor bus structure that enables a processor chip to be designed with optional unidirectional or bi-directional I/O buses. The processor is designed with separate input and output bus internal to the chip. A gating network is coupled to these processor uni-directional busses that allows the chip to have an alternate externally wired bus structure. For the lowest cost and lowest performance only one set of bidirectional bus lines are wired external to the chip. These lines have a parallel driver and receiver with appropriate gating to allow the bus to be either in the send or receive mode. The signals from the processor uni-directional input and output buses are wired via appropriate gating to create a single bi-directional bus. For high performance operation where higher cost for higher bandwidth is justified, the bidirectional bus is gated to be a device output only bus and the alternate device input bus is gated to the processor input bus creating a true uni-directional bus structure. The bus enable line is wired to the appropriated stated depending on the wired microprocessor bus structure.
    • 本发明公开了一种微处理器总线结构,其使处理器芯片能够被设计成具有可选的单向或双向I / O总线。 处理器设计有独立的输入和输出总线内部的芯片。 选通网络耦合到这些处理器单向总线,其允许芯片具有替代的外部有线总线结构。 对于最低成本和最低性能,只有一组双向总线线路连接到芯片的外部。 这些线路具有并行驱动器和接收器,具有适当的门控,以允许总线处于发送或接收模式。 来自处理器单向输入和输出总线的信号通过适当的门控进行连接,以创建单个双向总线。 对于高性能操作,为更高的带宽提供更高的成本,双向总线被门控为仅器件输出总线,并且备用器件输入总线选通处理器输入总线,从而创建一个真正的单向总线结构。 总线使能线根据有线微处理器总线结构连接到适当的状态。
    • 2. 发明授权
    • High accuracy estimates of elementary functions
    • 基本功能的高精度估计
    • US06240433B1
    • 2001-05-29
    • US09532801
    • 2000-03-21
    • Martin Stanley SchmooklerDonald Norman Senzig
    • Martin Stanley SchmooklerDonald Norman Senzig
    • G06F102
    • G06F7/535G06F7/5525
    • An improved method of estimating the square root, reciprocal square root, and reciprocal of an input value in a computer system. The input value, after being normalized, is used to select a pair of constants from a table. The constants are based on a linear approximation of the function for each interval of the input value, offset to reduce a maximum error value for a given interval. The estimated function is calculated by adding or subtracting the product of a part of the normalized input value and the first constant from the second constant. In one implementation, the input value is normalized within the range 1≦×
    • 在计算机系统中估计输入值的平方根,倒数平方根和倒数的改进方法。 标准化后的输入值用于从表中选择一对常数。 这些常数基于输入值的每个间隔的函数的线性近似,偏移以减小给定间隔的最大误差值。 通过将归一化输入值的一部分的乘积与第二常数的第一常数相加或相加来计算估计函数。 在一个实现中,输入值在1 <= x <2的范围内被归一化,并且使用一个查找表,间隔大小为{fraction(1/32)}。 在另一优选实施例中,在乘法运算中仅使用尾数的较低阶部分,以减少所需位数(尾数的高阶部分用于从表中选择常数)。 在另一个实现中,输入值在0.5 <= x <2的范围内被归一化,并且使用两个查找表,对于范围0.5 <= x <1的间隔大小为{fraction(1/32)}的第一表) 1,以及范围1 <= x <2的间隔大小为{fraction(1/16)}的第二表。