专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

2. 发明授权

US07318214B1 System and method for reducing patterning variability in integrated circuit manufacturing through mask layout corrections 有权
标题翻译：通过掩模布局校正减少集成电路制造中的图形变化的系统和方法
公开(公告)号：US07318214B1
公开(公告)日：2008-01-08
申请号：US10841079
申请日：2004-05-07
申请人： Roy V. Prasad , Chi-Song Horng , Ram S. Ramanujam
发明人： Roy V. Prasad , Chi-Song Horng , Ram S. Ramanujam
IPC分类号： G06F17/50
CPC分类号： G03F7/70441 , G03F1/36 , G03F1/68 , G03F1/70 , G03F1/76
摘要： The present invention provides a system and method of modifying the mask layout shapes of an integrated circuit layout design to compensate for reticle field location-specific systematic CD variations resulting from mask writing process variations, lens imperfections in lithographic patterning, and photoresist process variations. Called PLC (Process-optimized Layout Compensation), each set of compensation rules according to the present invention is specifically tailored for a particular mask-writer-patterning-tools-and-resist-process combination, and are performed on a reticle-wide basis. Furthermore, for each geometric shape in the mask layout, the amount of modification is determined based on a categorization of the type of the shape, the specific location in the reticle field the particular shape falls in, its context (i.e., surrounding patterns, orientation, etc.), as well as certain photoresist parameters to be used in the patterning process.
摘要翻译：本发明提供了一种修改集成电路布局设计的掩模布局形状的系统和方法，以补偿由掩模写入过程变化，平版印刷图案中的晶体缺陷和光致抗蚀剂工艺变化导致的标线片位置特定系统CD变化。被称为PLC（过程优化布局补偿），根据本发明的每组补偿规则是针对特定的掩模 - 写入器 - 图案形成 - 工具和 - 抗蚀剂 - 处理组合而专门设计的，并且在掩模版宽度的基础上执行。此外，对于掩模布局中的每个几何形状，修改量基于形状的类型的分类，特定形状所在的标线场中的特定位置，其上下文（即，周围图案，取向等），以及在图案化工艺中使用的某些光刻胶参数。

IPRDB

热门服务

关于我们

友情链接

联系方式