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1. 发明授权

US06358809B1 Method of modifying properties of deposited thin film material 有权
标题翻译：改善沉积薄膜材料性能的方法
公开(公告)号：US06358809B1
公开(公告)日：2002-03-19
申请号：US09764812
申请日：2001-01-16
申请人： Glenn Nobinger , Alexander Kalnitsky , Melvin Schmidt , Jonathan Herman , Viktor Zekeriya , Vijaykumar Ullal , Daniel H. Rosenblatt , Joseph P. Ellul
发明人： Glenn Nobinger , Alexander Kalnitsky , Melvin Schmidt , Jonathan Herman , Viktor Zekeriya , Vijaykumar Ullal , Daniel H. Rosenblatt , Joseph P. Ellul
IPC分类号： H01L2120
CPC分类号： H01L28/24 , H01L21/265
摘要： A method of modifying a layer of thin film composite material to achieve one or more desired properties for the thin film layer which cannot be achieved by heat treatment at all practical temperatures of operation allowable by particular integrated circuit processes. In particular, the thin film composite material is subjected to an ion implantation process. Depending on the doping species, the doping concentration, the doping energy, and other ion implantation parameters, one or more properties of the deposited thin film resistive layer can be modified. Such properties may include electrical, optical, thermal and physical properties. For instance, the sheet resistance and/or the temperature coefficient of resistance of the thin film composite material may be increased or decreased by appropriately implanting ions into the material. The ion implantation can be applied globally in order to modify one or more properties of the entire deposited thin film composite layer. Alternatively, the ion implantation can be applied regionally in order to modify the thin film composite material at a first region, not modify the thin film composite material at a second region, and/or modify the thin film composite material in another way at a third region.
摘要翻译：一种改变薄膜复合材料层的方法，以实现薄膜层的一个或多个期望的性能，这在特定集成电路工艺允许的所有实际操作温度下都不能通过热处理实现。特别地，对薄膜复合材料进行离子注入工艺。根据掺杂种类，掺杂浓度，掺杂能和其它离子注入参数，可以修改沉积的薄膜电阻层的一个或多个特性。这些性质可以包括电，光，热和物理性质。例如，通过将离子适当地注入到材料中，薄膜复合材料的薄层电阻和/或电阻温度系数可以增加或减少。可以全局地应用离子注入，以便修饰整个沉积的薄膜复合层的一个或多个特性。或者，可以区域地施加离子注入，以便在第一区域改性薄膜复合材料，而不是在第二区域改变薄膜复合材料，和/或以另一种方式在第三区域改性薄膜复合材料地区。

2. 发明授权

US06855585B1 Integrating multiple thin film resistors 有权
标题翻译：集成多个薄膜电阻
公开(公告)号：US06855585B1
公开(公告)日：2005-02-15
申请号：US10002429
申请日：2001-10-31
申请人： Alexander Kalnitsky , Joseph Paul Elull , Ralph Wall , Robert F. Scheer , Jonathan Herman , Glenn Nobinger , Viktor Zekeriya
发明人： Alexander Kalnitsky , Joseph Paul Elull , Ralph Wall , Robert F. Scheer , Jonathan Herman , Glenn Nobinger , Viktor Zekeriya
IPC分类号： H01L27/01 , H01L27/08 , H01L21/302
CPC分类号： H01L27/0802 , H01L27/016
摘要： A method for forming multiple resistors on a substrate. The method initially includes providing a first resistor on the substrate. A first dielectric layer is deposited, patterned, and selectively etched over the first resistor. Second resistor material is provided over the first dielectric layer. Furthermore, landing pad material is provided over the second resistor material. The landing pad material and the second resistor material are then selectively etched. The selective etching forms contacts for the first resistor in a first region, and forms a second resistor and associated contacts in a second region.
摘要翻译：一种在衬底上形成多个电阻器的方法。该方法最初包括在衬底上提供第一电阻器。在第一电阻器上沉积，图案化和选择性蚀刻第一电介质层。第二电阻材料设置在第一介电层上。此外，着陆垫材料设置在第二电阻材料上。然后选择性地蚀刻着陆焊盘材料和第二电阻材料。选择性蚀刻在第一区域中形成用于第一电阻器的触点，并且在第二区域中形成第二电阻器和相关联的触点。

3. 发明授权

US06962842B1 Method of removing a sacrificial emitter feature in a BICMOS process with a super self-aligned BJT 有权
标题翻译：使用超自对准BJT去除BICMOS工艺中的牺牲发射器特征的方法
公开(公告)号：US06962842B1
公开(公告)日：2005-11-08
申请号：US10382597
申请日：2003-03-06
申请人： Alexander Kalnitsky , Sang H. Park , Viktor Zekeriya , Larry Wang
发明人： Alexander Kalnitsky , Sang H. Park , Viktor Zekeriya , Larry Wang
IPC分类号： H01L21/331 , H01L21/8238 , H01L21/8249 , H01L29/00
CPC分类号： H01L29/66287 , H01L21/8249
摘要： A method of removing a sacrificial emitter feature in a bipolar complementary metal oxide semiconductor (BICMOS) process with a super self-aligned bipolar junction transistor (BJT) is disclosed. According to the new method, a mask layer, such as an oxide deposited using high density plasma (HDP) techniques, is deposited over an extrinsic base layer and over a sacrificial emitter structure. Because of the particular characteristic of the HDP oxide, the deposition of HDP oxide forms a triangular-like structure over the sacrificial emitter structure having a maximum thickness less than the thickness of the HDP oxide over the extrinsic base layer. This facilitates the complete removal of the HDP oxide above the sacrificial emitter layer without the complete removal of the HDP oxide above the extrinsic base layer. This allows the removal of the sacrificial emitter structure while the remaining HDP oxide, serving as a mask, protects the underlying extrinsic base layer.
摘要翻译：公开了一种利用超自对准双极结型晶体管（BJT）去除双极互补金属氧化物半导体（BICMOS）工艺中的牺牲发射极特征的方法。根据新方法，掩模层，例如使用高密度等离子体（HDP）技术沉积的氧化物沉积在非本征基层上和牺牲发射极结构上。由于HDP氧化物的特殊特性，HDP氧化物的沉积在牺牲发射极结构上形成三角形结构，其最大厚度小于HDP氧化物在外部基极层上的厚度。这有助于完全去除牺牲发射极层上方的HDP氧化物，而不会完全去除外部基极层之上的HDP氧化物。这允许去除牺牲发射器结构，而用作掩模的剩余HDP氧化物保护底层的外在基极层。

4. 发明申请

US20070246354A1 Plasma systems with magnetic filter devices to alter film deposition/etching characteristics 审中-公开
标题翻译：具有磁性过滤器装置的等离子体系统，以改变膜沉积/蚀刻特性
公开(公告)号：US20070246354A1
公开(公告)日：2007-10-25
申请号：US11407441
申请日：2006-04-19
申请人： Joseph Ellul , Melvin Schmidt , Viktor Zekeriya , Rajiv Patel , Jack Kelly
发明人： Joseph Ellul , Melvin Schmidt , Viktor Zekeriya , Rajiv Patel , Jack Kelly
IPC分类号： C23C14/00
CPC分类号： C23C14/35 , H01J37/32431 , H01J37/32623 , H01J37/3266 , H01J37/3408
摘要： Plasma systems with magnetic filter devices to alter film deposition/etching characteristics by altering the effective magnetic field distribution. The magnetic filter devices are placed between the magnet or magnets and a target, typically a semiconductor wafer, and selected and configured to alter the magnetic field to obtain the desired processing results. For deposition, the magnetic filter may be chosen to provide more uniform deposition, to provide increased deposition rates at or adjacent the edges of a wafer to compensate for increased etching rates at the edges of a wafer in a subsequent etching or polishing process. For annealing and doping, the magnetic field may be altered to provide more uniform equivalent annealing or doping across the wafer. Various applications are disclosed.
摘要翻译：具有磁性过滤装置的等离子体系统，通过改变有效磁场分布来改变成膜/蚀刻特性。磁性过滤器装置被放置在磁体或磁体与目标（通常为半导体晶片）之间，并被选择和配置成改变磁场以获得所需的处理结果。为了沉积，可以选择磁性过滤器以提供更均匀的沉积，以在晶片的边缘处或附近提供增加的沉积速率，以补偿在随后的蚀刻或抛光工艺中晶片边缘处的增加的蚀刻速率。对于退火和掺杂，可以改变磁场以提供跨晶片更均匀的等效退火或掺杂。公开了各种应用。

5. 发明申请

US20080296143A1 Plasma Systems with Magnetic Filter Devices to Alter Film Deposition/Etching Characteristics 审中-公开
标题翻译：具有磁性过滤装置的等离子体系统以改变膜沉积/蚀刻特性
公开(公告)号：US20080296143A1
公开(公告)日：2008-12-04
申请号：US12191505
申请日：2008-08-14
申请人： Joseph Paul Ellul , Melvin C. Schmidt , Viktor Zekeriya , Rajiv L. Patel , Jack Kelly
发明人： Joseph Paul Ellul , Melvin C. Schmidt , Viktor Zekeriya , Rajiv L. Patel , Jack Kelly
IPC分类号： C23C14/34 , H05H1/46
CPC分类号： C23C14/35 , H01J37/32431 , H01J37/32623 , H01J37/3266 , H01J37/3408
摘要： Plasma systems with magnetic filter devices to alter film deposition/etching characteristics by altering the effective magnetic field distribution. The magnetic filter devices are placed between the magnet or magnets and a target, typically a semiconductor wafer, and selected and configured to alter the magnetic field to obtain the desired processing results. For deposition, the magnetic filter may be chosen to provide more uniform deposition, to provide increased deposition rates at or adjacent the edges of a wafer to compensate for increased etching rates at the edges of a wafer in a subsequent etching or polishing process. For annealing and doping, the magnetic field may be altered to provide more uniform equivalent annealing or doping across the wafer. Various applications are disclosed.
摘要翻译：具有磁性过滤装置的等离子体系统，通过改变有效磁场分布来改变成膜/蚀刻特性。磁性过滤器装置被放置在磁体或磁体与目标（通常为半导体晶片）之间，并被选择和配置成改变磁场以获得所需的处理结果。为了沉积，可以选择磁性过滤器以提供更均匀的沉积，以在晶片的边缘处或附近提供增加的沉积速率，以补偿随后的蚀刻或抛光工艺中在晶片边缘处的增加的蚀刻速率。对于退火和掺杂，可以改变磁场以提供跨晶片更均匀的等效退火或掺杂。公开了各种应用。

6. 发明授权

US06607962B2 Globally planarized backend compatible thin film resistor contact/interconnect process 有权
标题翻译：全局平面化后端兼容薄膜电阻接触/互连过程
公开(公告)号：US06607962B2
公开(公告)日：2003-08-19
申请号：US09925945
申请日：2001-08-09
申请人： Viktor Zekeriya , Khanh Tran
发明人： Viktor Zekeriya , Khanh Tran
IPC分类号： H01L2120
CPC分类号： H01L24/05 , H01L23/5228 , H01L24/03 , H01L24/11 , H01L2224/0231 , H01L2224/0401 , H01L2224/05558 , H01L2224/1147 , H01L2224/13007 , H01L2224/13099 , H01L2924/01013 , H01L2924/01014 , H01L2924/01022 , H01L2924/01024 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01082 , H01L2924/04941 , H01L2924/04953 , H01L2924/05042 , H01L2924/12042 , H01L2924/14 , H01L2924/19043 , H01L2924/3011 , H01L2924/00
摘要： A method of forming a thin film resistor contact incorporates an etch-stop material to protect the underlying thin film resistor from a subsequent dry etching process to form a contact opening to the thin film resistor. More specifically, the method includes forming a thin film resistor, forming a first dielectric layer over the thin film resistor, forming a first opening through the first dielectric layer to expose an underlying portion of the thin film resistor, forming an etch-stop within the first opening of the first dielectric layer, forming a second dielectric layer over the etch-stop and the first dielectric layer, forming a second opening through the second dielectric layer to expose the underlying portion of the etch-stop, and forming a metal plug within the second contact opening, wherein the metal plug is in electrical contact with the thin film resistor by way of the etch-stop. Alternatively, in the case of an insulating etch-stop, the second opening through the dielectric layer is through the etch-stop, and forming a metal plug within the second contact opening, wherein the metal plug is in direct electrical contact with the thin film resistor.
摘要翻译：形成薄膜电阻器触点的方法包括蚀刻停止材料，以保护下面的薄膜电阻器免受后来的干蚀刻工艺以形成对薄膜电阻器的接触开口。更具体地，该方法包括形成薄膜电阻器，在薄膜电阻器上形成第一电介质层，形成穿过第一电介质层的第一开口以暴露薄膜电阻器的下面部分，在该薄膜电阻器的内部形成蚀刻停止第一介电层的第一开口，在蚀刻停止层和第一介电层上方形成第二介电层，形成通过第二介电层的第二开口以暴露蚀刻停止层的下面部分，并在其内形成金属塞第二接触开口，其中金属插塞通过蚀刻停止与薄膜电阻器电接触。或者，在绝缘蚀刻停止的情况下，穿过介电层的第二开口通过蚀刻停止，并且在第二接触开口内形成金属插塞，其中金属插塞与薄膜直接电接触电阻。

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