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1. 发明申请

US20110235423A1 VERIFICATION PROCESS FOR NON-VOLATILE STORAGE 有权
标题翻译：非易失性存储的验证过程
公开(公告)号：US20110235423A1
公开(公告)日：2011-09-29
申请号：US13154810
申请日：2011-06-07
申请人： Gerrit Jan Hemink , Shih-Chung Lee , Toru Miwa , Yupin Fong , Jun Wan , Ken Oowada
发明人： Gerrit Jan Hemink , Shih-Chung Lee , Toru Miwa , Yupin Fong , Jun Wan , Ken Oowada
IPC分类号： G11C16/04 , G11C16/06
CPC分类号： G11C16/3418
摘要： When erasing non-volatile storage, a verification process is used between erase operations to determine whether the non-volatile storage has been successfully erased. The verification process includes separately performing verification for different subsets of the non-volatile storage elements.
摘要翻译：当擦除非易失性存储时，在擦除操作之间使用验证过程来确定非易失性存储器是否已被成功擦除。验证过程包括对非易失性存储元件的不同子集进行单独执行验证。

2. 发明授权

US07978527B2 Verification process for non-volatile storage 有权
标题翻译：非易失性存储的验证过程
公开(公告)号：US07978527B2
公开(公告)日：2011-07-12
申请号：US12132452
申请日：2008-06-03
申请人： Gerrit Jan Hemink , Shih-Chung Lee , Toru Miwa , Yupin Fong , Jun Wan , Ken Oowada
发明人： Gerrit Jan Hemink , Shih-Chung Lee , Toru Miwa , Yupin Fong , Jun Wan , Ken Oowada
IPC分类号： G11C16/06
CPC分类号： G11C16/3418
摘要： When erasing non-volatile storage, a verification process is used between erase operations to determine whether the non-volatile storage has been successfully erased. The verification process includes separately performing verification for different subsets of the non-volatile storage elements.
摘要翻译：当擦除非易失性存储时，在擦除操作之间使用验证过程来确定非易失性存储器是否已被成功擦除。验证过程包括对非易失性存储元件的不同子集进行单独执行验证。

3. 发明申请

US20090296475A1 VERIFICATION PROCESS FOR NON-VOLATILE STORAGE 有权
标题翻译：非易失性存储的验证过程
公开(公告)号：US20090296475A1
公开(公告)日：2009-12-03
申请号：US12132452
申请日：2008-06-03
申请人： Gerrit Jan Hemink , Shih-Chung Lee , Toru Miwa , Yupin Fong , Jun Wan , Ken Oowada
发明人： Gerrit Jan Hemink , Shih-Chung Lee , Toru Miwa , Yupin Fong , Jun Wan , Ken Oowada
IPC分类号： G11C16/06 , G11C7/00
CPC分类号： G11C16/3418
摘要： When erasing non-volatile storage, a verification process is used between erase operations to determine whether the non-volatile storage has been successfully erased. The verification process includes separately performing verification for different subsets of the non-volatile storage elements.
摘要翻译：当擦除非易失性存储时，在擦除操作之间使用验证过程来确定非易失性存储器是否已被成功擦除。验证过程包括对非易失性存储元件的不同子集进行单独执行验证。

4. 发明授权

US08218367B2 Verification process for non-volatile storage 有权
标题翻译：非易失性存储的验证过程
公开(公告)号：US08218367B2
公开(公告)日：2012-07-10
申请号：US13154810
申请日：2011-06-07
申请人： Gerrit Jan Hemink , Shih-Chung Lee , Toru Miwa , Yupin Fong , Jun Wan , Ken Oowada
发明人： Gerrit Jan Hemink , Shih-Chung Lee , Toru Miwa , Yupin Fong , Jun Wan , Ken Oowada
IPC分类号： G11C16/06
CPC分类号： G11C16/3418
摘要： When erasing non-volatile storage, a verification process is used between erase operations to determine whether the non-volatile storage has been successfully erased. The verification process includes separately performing verification for different subsets of the non-volatile storage elements.
摘要翻译：当擦除非易失性存储时，在擦除操作之间使用验证过程来确定非易失性存储器是否已被成功擦除。验证过程包括对非易失性存储元件的不同子集进行单独执行验证。

5. 发明授权

US07447086B2 Selective program voltage ramp rates in non-volatile memory 有权
标题翻译：非易失性存储器中的选择性编程电压斜坡率
公开(公告)号：US07447086B2
公开(公告)日：2008-11-04
申请号：US11866261
申请日：2007-10-02
申请人： Jun Wan , Jeffrey Lutze , Masaaki Higashitani , Gerrit Jan Hemink , Ken Oowada , Jian Chen , Geoffrey S Gongwer
发明人： Jun Wan , Jeffrey Lutze , Masaaki Higashitani , Gerrit Jan Hemink , Ken Oowada , Jian Chen , Geoffrey S Gongwer
IPC分类号： G11C7/00
CPC分类号： G11C16/3418
摘要： A non-volatile memory system is programmed so as to reduce or avoid program disturb. In accordance with one embodiment, multiple program inhibit schemes are employed for a single non-volatile memory system. Program inhibit schemes are selected based on the word line being programmed. Certain program inhibit schemes have been discovered to better minimize or eliminate program disturb at select word lines. In one embodiment, selecting a program inhibit scheme includes selecting a program voltage pulse ramp rate. Different ramp rates have been discovered to better minimize program disturb when applied to select word lines. In another embodiment, the temperature of a memory system is detected before or during a program operation. A program inhibit scheme can be selected based on the temperature of the system.
摘要翻译：编程非易失性存储器系统以减少或避免编程干扰。根据一个实施例，对于单个非易失性存储器系统采用多个程序禁止方案。基于正在编程的字线选择程序禁止方案。已经发现某些程序禁止方案能够更好地最小化或消除选择字线上的程序干扰。在一个实施例中，选择编程禁止方案包括选择编程电压脉冲斜率。在应用于选择字线时，已经发现了不同的斜率以更好地最小化程序干扰。在另一个实施例中，在程序操作之前或期间检测存储器系统的温度。可以基于系统的温度来选择程序禁止方案。

6. 发明授权

US07295478B2 Selective application of program inhibit schemes in non-volatile memory 有权
标题翻译：在非易失性存储器中选择性地应用程序抑制方案
公开(公告)号：US07295478B2
公开(公告)日：2007-11-13
申请号：US11127743
申请日：2005-05-12
申请人： Jun Wan , Jeffrey Lutze , Masaaki Higashitani , Gerrit Jan Hemink , Ken Oowada , Jian Chen , Geoffrey S. Gongwer
发明人： Jun Wan , Jeffrey Lutze , Masaaki Higashitani , Gerrit Jan Hemink , Ken Oowada , Jian Chen , Geoffrey S. Gongwer
IPC分类号： G11C7/00
CPC分类号： G11C16/3418
摘要： A non-volatile memory system is programmed so as to reduce or avoid program disturb. In accordance with one embodiment, multiple program inhibit schemes are employed for a single non-volatile memory system. Program inhibit schemes are selected based on the word line being programmed. Certain program inhibit schemes have been discovered to better minimize or eliminate program disturb at select word lines. In one embodiment, selecting a program inhibit scheme includes selecting a program voltage pulse ramp rate. Different ramp rates have been discovered to better minimize program disturb when applied to select word lines. In another embodiment, the temperature of a memory system is detected before or during a program operation. A program inhibit scheme can be selected based on the temperature of the system.
摘要翻译：编程非易失性存储器系统以减少或避免编程干扰。根据一个实施例，对于单个非易失性存储器系统采用多个程序禁止方案。基于正在编程的字线选择程序禁止方案。已经发现某些程序禁止方案能够更好地最小化或消除选择字线上的程序干扰。在一个实施例中，选择编程禁止方案包括选择编程电压脉冲斜率。在应用于选择字线时，已经发现了不同的斜率以更好地最小化程序干扰。在另一个实施例中，在程序操作之前或期间检测存储器系统的温度。可以基于系统的温度来选择程序禁止方案。

7. 发明申请

US20100046301A1 INTELLIGENT CONTROL OF PROGRAM PULSE FOR NON-VOLATILE STORAGE 有权
标题翻译：智能控制非挥发性存储的程序脉冲
公开(公告)号：US20100046301A1
公开(公告)日：2010-02-25
申请号：US12607329
申请日：2009-10-28
申请人： Yupin Fong , Jun Wan
发明人： Yupin Fong , Jun Wan
IPC分类号： G11C16/04
CPC分类号： G11C16/0483 , G11C11/5628 , G11C16/10 , G11C16/3454 , G11C16/3459 , G11C2211/5621
摘要： To program a set of non-volatile storage elements, a set of programming pulses are applied to the control gates (or other terminals) of the non-volatile storage elements. The programming pulses have a constant pulse width and increasing magnitudes until a maximum voltage is reached. At that point, the magnitude of the programming pulses stops increasing and the programming pulses are applied in a manner to provide varying time duration of the programming signal between verification operations. In one embodiment, for example, after the pulses reach the maximum magnitude the pulse widths are increased. In another embodiment, after the pulses reach the maximum magnitude multiple program pulses are applied between verification operations.
摘要翻译：为了对一组非易失性存储元件进行编程，将一组编程脉冲施加到非易失性存储元件的控制门（或其它终端）。编程脉冲具有恒定的脉冲宽度和增加的幅度，直到达到最大电压。在这一点上，编程脉冲的幅度停止增加，编程脉冲以一种方式施加，以便在验证操作之间提供编程信号的变化的持续时间。在一个实施例中，例如，在脉冲达到最大幅度之后，脉冲宽度增加。在另一个实施例中，在脉冲达到最大幅度之后，在验证操作之间施加多个编程脉冲。

8. 发明授权

US07447065B2 Reducing read disturb for non-volatile storage 有权
公开(公告)号：US07447065B2
公开(公告)日：2008-11-04
申请号：US12021741
申请日：2008-01-29
申请人： Yupin Fong , Jun Wan , Jeffrey Lutze
发明人： Yupin Fong , Jun Wan , Jeffrey Lutze
IPC分类号： G11C11/34
CPC分类号： G11C16/3418 , G11C16/3427
摘要： A system is disclosed for reducing or removing a form of read disturb in a non-volatile storage device. One embodiment seeks to prevent read disturb by eliminating or minimizing boosting of the channel of the memory elements. For example, one implementation prevents or reduces boosting of the source side of the NAND string channel during a read process. Because the source side of the NAND string channel is not boosted, at least one form of read disturb is minimized or does not occur.

9. 发明授权

US07262994B2 System for reducing read disturb for non-volatile storage 有权
公开(公告)号：US07262994B2
公开(公告)日：2007-08-28
申请号：US11296087
申请日：2005-12-06
申请人： Yupin Fong , Jun Wan , Jeffrey Lutze
发明人： Yupin Fong , Jun Wan , Jeffrey Lutze
IPC分类号： G11C11/34
CPC分类号： G11C16/3418 , G11C11/5628 , G11C11/5642 , G11C16/0483 , G11C16/3427
摘要： A system for reducing or removing a form of read disturb in a non-volatile storage device. One embodiment seeks to prevent read disturb by eliminating or minimizing boosting of the channel of the memory elements. For example, one implementation prevents or reduces boosting of the source side of the NAND string channel during a read process. Because the source side of the NAND string channel is not boosted, at least one form of read disturb is minimized or does not occur.

10. 发明申请

US20080137411A1 REDUCING READ DISTURB FOR NON-VOLATILE STORAGE 有权
公开(公告)号：US20080137411A1
公开(公告)日：2008-06-12
申请号：US12021761
申请日：2008-01-29
申请人： Yupin Fong , Jun Wan , Jeffrey Lutze
发明人： Yupin Fong , Jun Wan , Jeffrey Lutze
IPC分类号： G11C16/26
CPC分类号： G11C16/3418 , G11C16/3427
摘要： A system is disclosed for reducing or removing a form of read disturb in a non-volatile storage device. One embodiment seeks to prevent read disturb by eliminating or minimizing boosting of the channel of the memory elements. For example, one implementation prevents or reduces boosting of the source side of the NAND string channel during a read process. Because the source side of the NAND string channel is not boosted, at least one form of read disturb is minimized or does not occur.

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