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    • 5. 发明申请
    • Two-Stage Class AB Operational Amplifier
    • US20140035665A1
    • 2014-02-06
    • US14002416
    • 2012-02-27
    • Germano NicolliniCarlo Pinna
    • Germano NicolliniCarlo Pinna
    • H03F3/45H03H11/12
    • H03F3/45264H03F3/3028H03F3/45H03F3/4565H03F3/45663H03F2200/297H03F2200/453H03F2200/456H03F2203/30015H03F2203/30021H03F2203/30081H03F2203/30114H03F2203/45311H03F2203/45626H03F2203/45648H03F2203/45674H03F2203/45696H03F2203/45702H03H11/1213
    • The invention relates to a two stage class AB operational amplifier (200) for driving a load (L), comprising at least an input stage (201) comprising differential input terminals (IN+, IN−) and an output terminal (N) to provide a driving signal (VN). In addition, the operational amplifier comprises an output stage (202) comprising a first (A) and second (B) input terminals operatively associated to the input stage (201) to be driven on the basis of said driving signal (VN) and a driving circuit (203) operatively interposed between said input stage (201) and the output stage (202). The operational amplifier is characterised in that the driving circuit (203) comprises a first portion (204) comprising at least one resistor (R1) operatively connected between a first reference potential (Vcc) via a first circuitry block (MT, M11) comprising a PMOS transistor (MT) and a second reference potential (GND) via a second circuitry block (M12, MS) comprising a NMOS transistor (MS). The voltage drop (VR1) on said at least a first resistor (R1) is fixed to a value depending on said first (Vcc) and second (GND) reference potentials and the gate-source voltages of said PMOS (MT) and NMOS (MS) transistors, respectively. The driving circuit further comprises a second portion (205) comprising a first resistor (R2) and a second resistor (R2′) having first terminals connected one another in a common terminal (P) which is connected to the output terminal (N) of the input stage. Said first resistor (R2) has a second terminal connected the first input terminal (A) of the output stage and said second resistor (R2′) has a second terminal connected to the second input terminal (B) of the output stage. Said second terminals (A, B) of the first (R2) and second resistors (R2′) are connected to the first reference potential (Vcc) via a third circuitry block (MW, M9) and to the second reference potential (GND) via a fourth circuitry block (M10, MX), respectively. Said third (MW, M9) and fourth (M10, MX) circuitry blocks are arranged to be operatively connected to said first (MT, M11) and second (M12, MS) circuitry blocks, respectively, so that the voltage drop (VR2) between the second terminals (A, B) is substantially equal to the value of the voltage drop (VR1) across said at least one resistor (R1).
    • 6. 发明授权
    • Electric circuit with protection against overvoltages
    • 具有防过电压的电路
    • US07864493B2
    • 2011-01-04
    • US11943424
    • 2007-11-20
    • Carlo PinnaGermano Nicollini
    • Carlo PinnaGermano Nicollini
    • H02H9/00
    • H02H9/046
    • An electric circuit includes a supply terminal to receive an outer supply voltage and a voltage regulator coupled to the supply terminal and to provide supply and resting voltages. A lock-out circuit is switchable between active and inactive states and receives the supply voltage at a supply node to generate, in the active state, an output voltage on a output terminal thereof. A protection circuit protects against electrostatic discharge, having at least one first diode coupled between the supply node and the output terminal. A cut-off electronic lock couples, in the inactive state, the supply node to the supply terminal by reverse biasing the at least one first diode to make a voltage of the output terminal float.
    • 电路包括用于接收外部电源电压的电源端子和耦合到电源端子的电压调节器,并提供电源和静止电压。 锁定电路可在有源和非活动状态之间切换,并且在电源节点处接收电源电压,以在激活状态下产生其输出端上的输出电压。 保护电路防止静电放电,具有耦合在电源节点和输出端之间的至少一个第一二极管。 截止电子锁通过反向偏置所述至少一个第一二极管以使输出端子的电压浮动而将处于非活动状态的电源节点耦合到电源端子。
    • 8. 发明授权
    • Digital filter
    • 数字滤波器
    • US06501406B1
    • 2002-12-31
    • US09905675
    • 2001-07-13
    • Alessandro MecchiaGermano NicolliniCarlo Pinna
    • Alessandro MecchiaGermano NicolliniCarlo Pinna
    • H03M300
    • H03H7/0115H03H2001/0085
    • A digital decimation filter includes a set of cascaded integrator stages for generating a first signal comprised of bit words including a first number of bits as well as a set of cascaded derivative stages for receiving said first signal and generating therefrom an output comprised of bit words including a second number of bits. The second number of bits is smaller than said first number of bits and a bit discarding unit is located downstream of the integrator stages and upstream of the derivative stages for discarding a given number of least significant bits from the bit words of the first signal before this is received by the derivative stages. Said given number is defined as the difference between said first and said second number of bits.
    • 数字抽取滤波器包括一组级联积分器级,用于产生由包括第一位数的位字组成的第一信号以及用于接收所述第一信号的一组级联导数级,并从其产生包括位字的输出,包括 第二位数。 第二比特数小于所述第一比特数,并且比特丢弃单元位于积分器级的下游和导数级的上游,用于从该第一信号之前的第一信号的比特字中丢弃给定数量的最低有效比特 被衍生阶段接收。 所述给定数量被定义为所述第一和第二位数之间的差。
    • 9. 发明授权
    • Two-stage class AB operational amplifier
    • US08791752B2
    • 2014-07-29
    • US14002416
    • 2012-02-27
    • Germano NicolliniCarlo Pinna
    • Germano NicolliniCarlo Pinna
    • H03F3/45
    • H03F3/45264H03F3/3028H03F3/45H03F3/4565H03F3/45663H03F2200/297H03F2200/453H03F2200/456H03F2203/30015H03F2203/30021H03F2203/30081H03F2203/30114H03F2203/45311H03F2203/45626H03F2203/45648H03F2203/45674H03F2203/45696H03F2203/45702H03H11/1213
    • The invention relates to a two stage class AB operational amplifier for driving a load, comprising at least an input stage comprising differential input terminals and an output terminal to provide a driving signal. In addition, the operational amplifier comprises an output stage comprising a first and second input terminals operatively associated to the input stage to be driven on the basis of said driving signal and a driving circuit operatively interposed between said input stage and the output stage. The operational amplifier is characterized in that the driving circuit comprises a first portion comprising at least one resistor operatively connected between a first reference potential via a first circuitry block comprising a PMOS transistor and a second reference potential via a second circuitry block comprising a NMOS transistor. The voltage drop on said at least a first resistor is fixed to a value depending on said first and second reference potentials and the gate-source voltages of said PMOS and NMOS transistors, respectively. The driving circuit further comprises a second portion comprising a first resistor and a second resistor having first terminals connected one another in a common terminal which is connected to the output terminal of the input stage. Said first resistor has a second terminal connected the first input terminal of the output stage and said second resistor has a second terminal connected to the second input terminal of the output stage. Said second terminals of the first and second resistors (R2′) are connected to the first reference potential via a third circuitry block and to the second reference potential (GND) via a fourth circuitry block, respectively. Said third (MW, M9) and fourth (M10, MX) circuitry blocks are arranged to be operatively connected to said first and second circuitry blocks, respectively, so that the voltage drop between the second terminals is substantially equal to the value of the voltage drop (VR1) across said at least one resistor.
    • 10. 发明申请
    • Electric circuit with protection against overvoltages
    • 具有防过电压的电路
    • US20080130181A1
    • 2008-06-05
    • US11943424
    • 2007-11-20
    • Carlo PinnaGermano Nicollini
    • Carlo PinnaGermano Nicollini
    • H02H3/20
    • H02H9/046
    • An electric circuit includes a supply terminal to receive an outer supply voltage and a voltage regulator coupled to the supply terminal and to provide supply and resting voltages. A lock-out circuit is switchable between active and inactive states and receives the supply voltage at a supply node to generate, in the active state, an output voltage on a output terminal thereof. A protection circuit protects against electrostatic discharge, having at least one first diode coupled between the supply node and the output terminal. A cut-off electronic lock couples, in the inactive state, the supply node to the supply terminal by reverse biasing the at least one first diode to make a voltage of the output terminal float.
    • 电路包括用于接收外部电源电压的电源端子和耦合到电源端子的电压调节器,并提供电源和静止电压。 锁定电路可在有源和非活动状态之间切换,并且在电源节点处接收电源电压,以在激活状态下产生其输出端上的输出电压。 保护电路防止静电放电,具有耦合在电源节点和输出端之间的至少一个第一二极管。 截止电子锁通过反向偏置所述至少一个第一二极管以使输出端子的电压浮动而将处于非活动状态的电源节点耦合到电源端子。