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1. 发明申请

US20070006172A1 METHOD AND SYSTEM OF IDENTIFYING OVERLAYS USED BY A PROGRAM 有权
标题翻译：识别程序使用覆盖的方法和系统
公开(公告)号：US20070006172A1
公开(公告)日：2007-01-04
申请号：US11383424
申请日：2006-05-15
申请人： Gary Swoboda , Oliver Sohm , Brian Cruickshank , Manisha Agarwala
发明人： Gary Swoboda , Oliver Sohm , Brian Cruickshank , Manisha Agarwala
IPC分类号： G06F9/44
CPC分类号： G06F9/445 , G06F11/3636
摘要： A method and system of identifying overlays used by a program. The overlays may be executable overlays (e.g., overlay programs and dynamically linked library programs), or the overlays may be data sets. Depending on the number of overlays and/or the type of information used to identify the overlays, an indication of the identity of the overlays may be written to a register (whose contents are inserted into the trace data stream), or the indication may comprise an entry in a log buffer and an index value written to the register (again whose contents are inserted into the trace data stream, and where the index value identifies the entry in the log buffer).
摘要翻译：识别程序使用的重叠的方法和系统。覆盖可以是可执行覆盖（例如，覆盖程序和动态链接的库程序），或者覆盖可以是数据集。取决于覆盖层的数量和/或用于标识覆盖层的信息的类型，覆盖层的标识的指示可被写入寄存器（其内容被插入到跟踪数据流中），或者该指示可以包括日志缓冲区中的条目和写入寄存器的索引值（再次将其内容插入到跟踪数据流中，索引值标识日志缓冲区中的条目）。

2. 发明申请

US20060259831A1 METHOD AND SYSTEM OF INSERTING MARKING VALUES USED TO CORRELATE TRACE DATA AS BETWEEN PROCESSOR CODES 有权
标题翻译：用于将跟踪数据插入到处理器代码之间的标记值的方法和系统
公开(公告)号：US20060259831A1
公开(公告)日：2006-11-16
申请号：US11383469
申请日：2006-05-15
申请人： Oliver Sohm , Brian Cruickshank , Manisha Agarwala , Gary Swoboda
发明人： Oliver Sohm , Brian Cruickshank , Manisha Agarwala , Gary Swoboda
IPC分类号： G06F11/00
CPC分类号： G06F13/00 , G06F9/30098 , G06F9/30145 , G06F11/3471 , G06F11/3648
摘要： A method and system of inserting marker values used to correlate trace data as between processor cores. At least some of the illustrative embodiments are integrated circuit devices comprising a first processor core, a first data collection portion coupled to the first processor core and configured to gather data comprising addresses of instructions executed by the first processor core, a second processor core communicatively coupled to the first processor core, and a second data collection portion coupled to the first processor core and configured to gather data comprising addresses of instructions executed by the second processor core. The integrated circuit device is configured to insert marker values into the data of the first and second processor cores which allow correlation of the data such that contemporaneously executed instruction are identifiable.
摘要翻译：插入用于将跟踪数据相关联的标记值的方法和系统在处理器核之间。至少一些说明性实施例是集成电路设备，其包括第一处理器核心，第一数据收集部分，其耦合到第一处理器核心并且被配置为收集包括由第一处理器核心执行的指令的地址的数据;第二处理器核心，以及耦合到第一处理器核心并被配置为收集包括由第二处理器核执行的指令的地址的数据的第二数据收集部分。集成电路设备被配置为将标记值插入到第一和第二处理器核心的数据中，这允许数据相关，使得同时执行的指令是可识别的。

3. 发明申请

US20060259826A1 METHOD AND SYSTEM OF IDENTIFYING OVERLAYS 有权
标题翻译：识别覆盖的方法和系统
公开(公告)号：US20060259826A1
公开(公告)日：2006-11-16
申请号：US11383468
申请日：2006-05-15
申请人： Gary Swoboda , Oliver Sohm , Brian Cruickshank , Manisha Agarwala
发明人： Gary Swoboda , Oliver Sohm , Brian Cruickshank , Manisha Agarwala
IPC分类号： G06F11/00
CPC分类号： G06F11/3644 , G06F11/3648
摘要： A method and system of identifying overlays. At least some of the illustrative embodiments are methods comprising executing a traced program on a target system (the traced program comprising a plurality of overlay programs), obtaining values indicative of which of the plurality of overlays of the traced program has executed on the target system, and displaying on a display device an indication of a proportion of an execution time on the processor of the target system dedicated to each of the plurality of overlay programs.
摘要翻译：识别叠加层的方法和系统。示例性实施例中的至少一些是包括在目标系统（跟踪的程序包括多个覆盖程序）上执行跟踪的程序的方法，获得指示跟踪的程序的多个覆盖中哪一个在目标系统上执行的值并且在显示装置上显示专用于多个重叠程序中的每一个的目标系统的处理器上的执行时间的比例的指示。

4. 发明申请

US20070006174A1 METHOD AND SYSTEM OF INDEXING INTO TRACE DATA BASED ON ENTRIES IN A LOG BUFFER 有权
标题翻译：基于日志缓冲区中的条目的索引数据的方法和系统
公开(公告)号：US20070006174A1
公开(公告)日：2007-01-04
申请号：US11383471
申请日：2006-05-15
申请人： Oliver Sohm , Brian Cruickshank , Manisha Agarwala
发明人： Oliver Sohm , Brian Cruickshank , Manisha Agarwala
IPC分类号： G06F9/44
CPC分类号： G06F11/3636
摘要： A method and system of indexing into trace data based on entries in a log buffer. At least some of the illustrative embodiments are methods comprising executing a traced program on a target device. The traced program writes entries to a log buffer within the target device, and the traced program also contemporaneously writes an index value for each entry to a register. The index value written to the register becomes part of trace data regarding the traced program and correlates each entry to a respective portion of the trace data. Using the information one may either or both: display on a display device a portion of the trace data (the portion selected based on selecting an entry from the log buffer); or display on the display a portion of the log buffer (the portion selected based on selecting an entry from the trace data).
摘要翻译：根据日志缓冲区中的条目将索引数据进行索引的方法和系统。说明性实施例中的至少一些是包括在目标设备上执行跟踪的程序的方法。跟踪的程序将条目写入目标设备中的日志缓冲区，并且跟踪的程序同时将每个条目的索引值写入寄存器。写入寄存器的索引值成为跟踪程序的跟踪数据的一部分，并将每个条目与跟踪数据的相应部分相关联。使用该信息可以一个或两者：在显示设备上显示跟踪数据的一部分（基于从日志缓冲器中选择条目而选择的部分）; 或在显示器上显示日志缓冲区的一部分（基于从跟踪数据中选择条目而选择的部分）。

5. 发明申请

US20060259699A1 PRIORITIZING CACHES HAVING A COMMON CACHE LEVEL 有权
标题翻译：优先级高速缓存
公开(公告)号：US20060259699A1
公开(公告)日：2006-11-16
申请号：US11383454
申请日：2006-05-15
申请人： Oliver Sohm , Brian Cruickshank , Gary Swoboda
发明人： Oliver Sohm , Brian Cruickshank , Gary Swoboda
IPC分类号： G06F12/00 , G06F13/00
CPC分类号： G06F12/0804 , G06F12/0897
摘要： An information carrier medium containing software that, when executed by a processor, causes the processor to receive information from circuit logic that is adapted to collect the information from caches having a common cache level. The software also causes the processor to prioritize the caches having the common cache level such that the caches are displayable as having different cache levels.
摘要翻译：一种包含软件的信息载体介质，所述软件在由处理器执行时使所述处理器从适于从具有公共高速缓存级别的高速缓存中收集信息的电路逻辑接收信息。软件还使处理器对具有公共高速缓存级别的高速缓存进行优先级排列，使得高速缓存可显示为具有不同的高速缓存级别。

6. 发明申请

US20060259698A1 DISPLAYING CACHE INFORMATION USING MARK-UP TECHNIQUES 有权
标题翻译：使用标记技术显示缓存信息
公开(公告)号：US20060259698A1
公开(公告)日：2006-11-16
申请号：US11383448
申请日：2006-05-15
申请人： Oliver Sohm , Brian Cruickshank , Jagadeesh Sankaran , Gary Swoboda
发明人： Oliver Sohm , Brian Cruickshank , Jagadeesh Sankaran , Gary Swoboda
IPC分类号： G06F12/00 , G06F13/00
CPC分类号： G06F12/0897 , G06F12/0804
摘要： An information carrier medium containing software that, when executed by a processor, causes the processor to receive information from circuit logic that is adapted to collect the information from caches on different cache levels. At least some of the information is from caches on different cache levels associated with a common address. The processor also displays the information by way of a graphical user interface (GUI). The GUI displays a portion of the information using a mark-up technique different from that used to display remaining portions of the information.
摘要翻译：一种包含软件的信息载体介质，所述软件在由处理器执行时使所述处理器从适于从不同缓存级别上的高速缓存收集信息的电路逻辑接收信息。至少一些信息来自与公共地址相关联的不同缓存级别上的缓存。处理器还通过图形用户界面（GUI）显示信息。 GUI使用不同于用于显示信息的剩余部分的标记技术来显示信息的一部分。

7. 发明申请

US20060259696A1 DETERMINING DIFFERENCES BETWEEN CACHED COPIES OF AN ADDRESS 审中-公开
标题翻译：确定地址的高速缓存副本之间的差异
公开(公告)号：US20060259696A1
公开(公告)日：2006-11-16
申请号：US11383385
申请日：2006-05-15
申请人： Oliver Sohm , Brian Cruickshank , Gary Swoboda , Jagadeesh Sankaran , Bradley Caldwell
发明人： Oliver Sohm , Brian Cruickshank , Gary Swoboda , Jagadeesh Sankaran , Bradley Caldwell
IPC分类号： G06F12/00 , G06F13/00
CPC分类号： G06F12/0897 , G06F12/0804 , G06F12/0859
摘要： An information carrier medium containing software that, when executed by a processor, causes the processor to receive information from caches on different cache levels, at least some of the information from caches on different cache levels associated with a common address. The software also causes the processor to determine a difference between the information from caches on different cache levels associated with the common address and to provide the difference to a user of the software.
摘要翻译：一种包含软件的信息载体介质，所述软件在由处理器执行时使所述处理器从不同高速缓存级别的高速缓存中接收来自与公共地址相关联的不同缓存级别上的高速缓存中的信息中的至少一些信息。该软件还使得处理器确定来自与公共地址相关联的不同高速缓存级别上的高速缓存的信息之间的差异，并且向软件的用户提供差异。

8. 发明申请

US20060259702A1 VISUALIZING CONTENTS AND STATES OF HIERARCHICAL STORAGE SYSTEMS 有权
标题翻译：可视化分层存储系统的内容和状态
公开(公告)号：US20060259702A1
公开(公告)日：2006-11-16
申请号：US11383462
申请日：2006-05-15
申请人： Oliver Sohm , Brian Cruickshank , Gary Swoboda
发明人： Oliver Sohm , Brian Cruickshank , Gary Swoboda
IPC分类号： G06F12/00 , G06F13/00
CPC分类号： G06F11/3664 , G06F3/0601 , G06F12/0897 , G06F12/128 , G06F2003/0692
摘要： An information carrier medium containing software that, when executed by a processor, causes the processor to receive information from circuit logic that is adapted to collect the information from caches on different cache levels. At least some of the information from the caches is associated with a common address. The processor also provides the information to a user of the software.
摘要翻译：一种包含软件的信息载体介质，所述软件在由处理器执行时使所述处理器从适于从不同缓存级别上的高速缓存收集信息的电路逻辑接收信息。来自高速缓存的至少一些信息与公共地址相关联。处理器还向软件的用户提供信息。

9. 发明申请

US20060259700A1 PROVIDING INFORMATION ASSOCIATED WITH A CACHE 有权
标题翻译：提供与缓存相关的信息
公开(公告)号：US20060259700A1
公开(公告)日：2006-11-16
申请号：US11383459
申请日：2006-05-15
申请人： Oliver Sohm , Brian Cruickshank , Gary Swoboda , Jagadeesh Sankaran
发明人： Oliver Sohm , Brian Cruickshank , Gary Swoboda , Jagadeesh Sankaran
IPC分类号： G06F12/00 , G06F13/00
CPC分类号： G06F12/122 , G06F12/0897
摘要： An information carrier medium containing software that, when executed by a processor, causes the processor to receive information from circuit logic that is adapted to collect the information from caches on different cache levels, the information associated with a common address. The software also causes the processor to provide the information to a user of the software. The information comprises cache level and cache type information associated with a particular cache from one of the different cache levels.
摘要翻译：一种包含软件的信息载体介质，所述软件在由处理器执行时使所述处理器从适于从不同高速缓存级别的高速缓存收集信息的电路逻辑接收信息，所述信息与公共地址相关联。软件还使得处理器向软件的用户提供信息。信息包括来自不同高速缓存级别之一的与特定高速缓存相关联的缓存级别和高速缓存类型信息。

10. 发明申请

US20060259692A1 WRITING TO A SPECIFIED CACHE 审中-公开
标题翻译：写入指定的高速缓存
公开(公告)号：US20060259692A1
公开(公告)日：2006-11-16
申请号：US11383349
申请日：2006-05-15
申请人： Oliver Sohm , Gary Swoboda , Brian Cruickshank
发明人： Oliver Sohm , Gary Swoboda , Brian Cruickshank
IPC分类号： G06F12/00 , G06F13/00
CPC分类号： G06F11/3648 , G06F12/0802
摘要： An information carrier medium containing software that, when executed by a processor, causes the processor to receive input from a user of the software, the input comprising data and a cache identifier. The processor also transfers the data and cache identifier to a circuit logic that is adapted to write to caches in a cache system coupled to the circuit logic. The processor also causes the circuit logic to write the data to a cache in the cache system that corresponds to the cache identifier.
摘要翻译：一种包含软件的信息载体介质，所述软件在被处理器执行时使所述处理器从所述软件的用户接收输入，所述输入包括数据和高速缓存标识符。处理器还将数据和高速缓存标识符传送到适于写入耦合到电路逻辑的高速缓存系统中的高速缓存的电路逻辑。处理器还使得电路逻辑将数据写入高速缓存系统中对应于高速缓存标识符的高速缓存。

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