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1. 发明授权

US07158523B2 Multi-link segmentation and reassembly sublayer for bonding asynchronous transfer mode permanent virtual circuits 失效
标题翻译：用于绑定异步传输模式永久虚拟电路的多链路分段和重组子层
公开(公告)号：US07158523B2
公开(公告)日：2007-01-02
申请号：US10145247
申请日：2002-05-14
申请人： Gary Jacobson , Kamila Kraba , Chien-Chou Lai , Jeremy Sommer , Jining Yang , Kishan Shenoi
发明人： Gary Jacobson , Kamila Kraba , Chien-Chou Lai , Jeremy Sommer , Jining Yang , Kishan Shenoi
IPC分类号： H04L12/00
CPC分类号： H04L12/5601 , H04L2012/5652 , H04L2012/5672
摘要： Systems and methods are described for bonding asynchronous transfer mode permanent virtual circuits using a multi-link segmentation and reassembly sublayer. A method includes: transforming a stream of asynchronous transfer mode cells into a stream of bonded asynchronous transfer mode cells; demultiplexing the stream of bonded asynchronous transfer mode cells into a plurality of streams of inverse multiplexed bonded asynchronous transfer mode cells; and transmitting the plurality of streams of inverse multiplexed bonded asynchronous transfer mode cells to a remote location via a plurality of permanent virtual circuits, characterized in that the transmitted plurality of streams of inverse multiplexed bonded asynchronized transfer mode cells can be multiplexed into a multiplexed stream of asynchronized transfer mode cells after transmission via at least two permanent virtual circuits, which compose the plurality of permanent virtual circuits, that do not have an identical bit-rate.
摘要翻译：描述了使用多链路分段和重组子层来绑定异步传输模式永久虚拟电路的系统和方法。一种方法包括：将异步传输模式信元流转换成绑定异步传输模式信元流; 将接合的异步传输模式小区的流解复用为多个反向复用的并联异步传输模式小区的多个流; 并且经由多个永久虚拟电路将多个逆向多路复用的接合异步传输模式小区的多个流发送到远程位置，其特征在于，所发送的多个反向多路复用的非同步传输模式小区的多个流可以被多路复用为通过构成多个永久虚拟电路的至少两个永久虚拟电路在不具有相同比特率的传输之后的非同步传输模式信元。

2. 发明授权

US06490296B2 Multi-link segmentation and reassembly for bonding multiple PVC's in an inverse multiplexing arrangement 失效
标题翻译：多链路分段和重新组装，用于以反向多路复用布置绑定多个PVC
公开(公告)号：US06490296B2
公开(公告)日：2002-12-03
申请号：US09974177
申请日：2001-10-10
申请人： Kishan Shenoi , Gary Jacobsen , Kamila Kraba , Chien-Chou Lai , Jeremy Sommer , Jining Yang
发明人： Kishan Shenoi , Gary Jacobsen , Kamila Kraba , Chien-Chou Lai , Jeremy Sommer , Jining Yang
IPC分类号： H04J316
CPC分类号： H04L47/30 , H04L45/10 , H04L45/24 , H04L47/10 , H04L47/125 , H04L47/16 , H04L2012/5649 , H04L2012/565 , H04L2012/5653 , H04L2012/5672 , H04Q11/0478
摘要： Systems and methods are described for multi-link segmentation and reassembly for bonging multiple virtual circuits in an inverse multiplexing arrangement. A method includes: generating a plurality of multilink segmentation and reassembly sublayer cells at a first location; distributing the plurality of multilink segmentation and reassembly sublayer cells across a plurality of virtual circuits; transmitting the plurality of multilink segmentation and reassembly sublayer cells to a second location via the plurality of virtual circuits; and receiving the plurality of multilink segmentation and reassembly sublayer cells at the second location. An apparatus includes a multilink segmentation and reassembly sublayer transmitter, including: a source buffer; a multilink controller coupled to the source buffer; and a plurality of virtual circuits coupled to the multilink controller.
摘要翻译：描述了用于在反向多路复用布置中对多个虚拟电路进行多重链路分段和重组的系统和方法。一种方法包括：在第一位置处产生多个多链路分段和重组子层小区; 在多个虚拟电路之间分配多个多链路分段和重组子层单元; 经由所述多个虚拟电路将所述多个多链路分段和重组子层小区发送到第二位置; 以及在所述第二位置处接收所述多个多链路分段和重组子层小区。一种装置包括多链路分段和重组子层发射机，包括：源缓冲器; 耦合到源缓冲器的多链路控制器; 以及耦合到多链路控制器的多个虚拟电路。

3. 发明授权

US07142619B2 Long subscriber loops using automatic gain control mid-span extender unit 失效
标题翻译：使用自动增益控制中跨延伸器单元的长用户回路
公开(公告)号：US07142619B2
公开(公告)日：2006-11-28
申请号：US09843161
申请日：2001-04-25
申请人： Jeremy Sommer , Kishan Shenoi , Kamila Kraba , Sandro Squadrito , Gary Bogardus
发明人： Jeremy Sommer , Kishan Shenoi , Kamila Kraba , Sandro Squadrito , Gary Bogardus
IPC分类号： H04L27/08
CPC分类号： H04B3/06 , H04L25/24
摘要： Systems and methods are described for long subscriber loops using automatic gain control. A method includes extending a digital subscriber loop including: producing an output signal in a first direction from a variable gain amplifier at a mid-span extender unit responsive to an input signal in the first direction from the digital subscriber loop; monitoring a signal strength of said output signal in the first direction at the mid-span extender unit; generating a gain control signal responsive to the signal strength at the mid-span extender unit; controlling a gain of the variable gain amplifier at the mid-span extender unit responsive to the gain control signal; and controlling a second gain of a second variable gain amplifier at said mid-span extender unit responsive to said gain control signal to produce an output signal in a second direction from said second variable gain amplifier at said mid-span extender unit responsive to a second input signal in said second direction from said digital subscriber loop.
摘要翻译：对使用自动增益控制的长用户回路描述系统和方法。一种方法包括扩展数字用户环路，包括：响应于来自数字用户环路的第一方向上的输入信号，在中跨扩展器单元处从可变增益放大器产生在第一方向上的输出信号; 在中跨扩展器单元处监测所述输出信号在第一方向上的信号强度; 响应于中跨扩展器单元处的信号强度产生增益控制信号; 响应于增益控制信号控制中跨扩展器单元处的可变增益放大器的增益; 以及响应于所述增益控制信号，在所述中跨延伸器单元处控制第二可变增益放大器的第二增益，以在所述中跨扩展器单元处产生来自所述第二可变增益放大器的第二方向的输出信号，从所述数字用户回路在所述第二方向输入信号。

4. 发明授权

US06512803B2 Global positioning system receiver capable of functioning in the presence of interference 有权
公开(公告)号：US06512803B2
公开(公告)日：2003-01-28
申请号：US09802484
申请日：2001-03-09
申请人： Johann Heinzl , Gary Jacobsen , Jining Yang , Kishan Shenoi
发明人： Johann Heinzl , Gary Jacobsen , Jining Yang , Kishan Shenoi
IPC分类号： H04B110
CPC分类号： G01S19/37 , G01S19/21 , H03J1/0008 , H03J3/08 , H04B1/7102
摘要： Systems and methods are described for a GPS receiver capable of functioning in the presence of interference. A method includes detecting an interfering signal including: tuning a band pass filter over a frequency range; and at each of a plurality of incremental frequencies: computing a set of band pass filter coefficients; sending the set of band pass filter coefficients to a digital filter; repeatedly transforming an analog-to-digital converter output having a quantization level in excess of 2 bits into a band pass filter output with the digital filter to obtain a plurality of samples; computing an average of the plurality of samples; and comparing the average to a threshold to detect peaks that exceed a threshold. An apparatus, comprising: an analog radio frequency circuit; an analog-to-digital converter coupled to the analog radio frequency circuit, the analog-to-digital converter providing a quantization level in excess of 2 bits; a digital filter coupled to the analog-to-digital converter; and a digital circuit coupled to the digital filter.

5. 发明授权

US06842498B2 Global positioning system interference detection 有权
标题翻译：全球定位系统干扰检测
公开(公告)号：US06842498B2
公开(公告)日：2005-01-11
申请号：US10294227
申请日：2002-11-14
申请人： Johann Heinzl , Gary Jacobsen , Jining Yang , Kishan Shenoi
发明人： Johann Heinzl , Gary Jacobsen , Jining Yang , Kishan Shenoi
IPC分类号： G01S1/00 , H03J1/00 , H03J3/08 , H04B1/10
CPC分类号： G01S19/37 , G01S19/21 , H03J1/0008 , H03J3/08 , H04B1/7102
摘要： Systems and methods are described for a GPS receiver capable of functioning in the presence of interference. A method includes detecting an interfering signal including: tuning a band pass filter over a frequency range; and at each of a plurality of incremental frequencies: computing a set of band pass filter coefficients; sending the set of band pass filter coefficients to a digital filter; repeatedly transforming an analog-to-digital converter output having a quantization level in excess of 2 bits into a band pass filter output with the digital filter to obtain a plurality of samples; computing an average of the plurality of samples; and comparing the average to a threshold to detect peaks that exceed a threshold. An apparatus includes: an analog radio frequency circuit; an analog-to-digital converter coupled to the analog radio frequency circuit, the analog-to-digital converter providing a quantization level in excess of 2 bits; a digital filter coupled to the analog-to-digital converter; and a digital circuit coupled to the digital filter.
摘要翻译：为能够在存在干扰的情况下起作用的GPS接收机描述系统和方法。一种方法包括检测干扰信号，包括：在频率范围上调谐带通滤波器; 并且在多个增量频率中的每一个处：计算一组带通滤波器系数; 将一组带通滤波器系数发送到数字滤波器; 将具有超过2位的量化级的模数转换器输出反复变换为与数字滤波器一起输出的带通滤波器，以获得多个采样; 计算所述多个样本的平均值; 并将平均值与阈值进行比较以检测超过阈值的峰值。一种装置包括：模拟射频电路; 耦合到所述模拟射频电路的模数转换器，所述模数转换器提供超过2位的量化级; 耦合到所述模数转换器的数字滤波器; 以及耦合到数字滤波器的数字电路。

6. 发明授权

US08385212B2 Method and apparatus for finding latency floor in packet networks 有权
标题翻译：用于在分组网络中寻找潜伏层的方法和装置
公开(公告)号：US08385212B2
公开(公告)日：2013-02-26
申请号：US12632643
申请日：2009-12-07
申请人： George P. Zampetti , Kishan Shenoi
发明人： George P. Zampetti , Kishan Shenoi
IPC分类号： H04L12/26
CPC分类号： H04L43/0852 , H04J3/0682
摘要： A latency floor between two nodes of a packet-switched network is estimated using transit times of a group of packets traversing the two nodes. In particular, a periodically generated histogram of packet transit times is used to estimate the latency floor. In some packet-switched networks, the behavior of some network elements changes drastically when the network is congested. Because latency floor cannot be accurately estimated under such conditions, packet transit times collected during a congested state of the network are discarded.
摘要翻译：使用穿过两个节点的一组分组的传送时间来估计分组交换网络的两个节点之间的延迟时间。特别地，使用周期性地产生的分组传送时间的直方图来估计延迟的底线。在一些分组交换网络中，当网络拥塞时，一些网络单元的行为发生了巨大的变化。由于在这种情况下不能准确估计延迟层次，所以在网络拥塞状态期间收集的分组传输时间被丢弃。

7. 发明申请

US20110134766A1 METHOD AND APPARATUS FOR FINDING LATENCY FLOOR IN PACKET NETWORKS 有权
标题翻译：用于在分组网络中查找延迟地板的方法和装置
公开(公告)号：US20110134766A1
公开(公告)日：2011-06-09
申请号：US12632643
申请日：2009-12-07
申请人： George P. Zampetti , Kishan Shenoi
发明人： George P. Zampetti , Kishan Shenoi
IPC分类号： H04L12/26
CPC分类号： H04L43/0852 , H04J3/0682
摘要： A latency floor between two nodes of a packet-switched network is estimated using transit times of a group of packets traversing the two nodes. In particular, a periodically generated histogram of packet transit times is used to estimate the latency floor. In some packet-switched networks, the behavior of some network elements changes drastically when the network is congested. Because latency floor cannot be accurately estimated under such conditions, packet transit times collected during a congested state of the network are discarded.
摘要翻译：使用穿过两个节点的一组分组的传送时间来估计分组交换网络的两个节点之间的延迟时间。特别地，使用周期性地产生的分组传送时间的直方图来估计延迟的底线。在一些分组交换网络中，当网络拥塞时，一些网络单元的行为发生了巨大的变化。由于在这种情况下不能准确估计延迟层次，所以在网络拥塞状态期间收集的分组传输时间被丢弃。

8. 发明授权

US07161953B2 Bonding multiple G.shdsl links 失效
标题翻译：绑定多个G.shdsl链接
公开(公告)号：US07161953B2
公开(公告)日：2007-01-09
申请号：US10156217
申请日：2002-05-28
申请人： Kishan Shenoi
发明人： Kishan Shenoi
IPC分类号： H04J3/16
CPC分类号： H04L12/5601 , H04L2012/561 , H04L2012/5624 , H04L2012/5672
摘要： Systems and methods are described for bonding multiple G.shdsl links. A method includes transporting digital data including: coupling a first end of a plurality of unbundled network elements to a first modem; coupling a second end of the plurality of unbundled network elements to a second modem; applying a single signal to the first modem; time division multiplexing the single signal into a plurality of signals at the first modem; transmitting the plurality of signals to the second modem over the plurality of unbundled network elements; receiving the plurality of signals at the second modem; and time division demultiplexing the plurality of signals to combine the plurality of signals into a single synchronous signal at the second modem. Each of the plurality of unbundled network elements includes a G.shdsl link.
摘要翻译：描述了绑定多个G.shdsl链接的系统和方法。一种方法包括传送数字数据，包括：将多个非捆绑网络元件的第一端耦合到第一调制解调器; 将所述多个非捆绑网络元件的第二端耦合到第二调制解调器; 将单个信号应用于第一调制解调器; 将第一调制解调器的单个信号时分复用为多个信号; 通过所述多个未捆绑的网络单元将所述多个信号发送到所述第二调制解调器; 在第二调制解调器处接收多个信号; 以及对所述多个信号进行时分解复用以将所述多个信号组合成在所述第二调制解调器处的单个同步信号。多个非捆绑网络元件中的每一个包括G.shdsl链路。

9. 发明授权

US07130332B1 Pilot tracking for synchronization using correlation between digital signal and locally generated version of PN signal 有权
标题翻译：使用数字信号与本地生成的PN信号之间的相关性进行同步的导频跟踪
公开(公告)号：US07130332B1
公开(公告)日：2006-10-31
申请号：US09553735
申请日：2000-04-20
申请人： Kishan Shenoi
发明人： Kishan Shenoi
IPC分类号： H04B1/69
CPC分类号： H04B1/70752 , H04B1/70754 , H04B1/70757 , H04B1/7085 , H04B2201/70701
摘要： A method of tracking a pilot channel to discipline an oscillator includes: downconverting the RF signal to a low frequency that is of the order of, but greater than the chip rate; converting the signal into digital format; computing complex correlations between the received digital signal and local replicas of the PN codes; and establishing from the correlation values what is the nominal frequency error of the local oscillator. Correlation values between the digital signal {s(n)} and at least one locally generated version of I-channel and Q-channel PN signals {IPN(n)} and {QPN(n)} are averaged over multiple periods of the PN signals. Pilot signal tracking accuracy is improved, computational load is reduced without degradation in performance, and the technique is simple enough to be incorporated in an off-the-shelf FPGA.
摘要翻译：跟踪导频信道以对振荡器进行管理的方法包括：将RF信号下变频到大于等于或大于码片速率的低频; 将信号转换成数字格式; 计算接收的数字信号与PN码的本地副本之间的复杂相关; 并从相关值建立本地振荡器的标称频率误差。数字信号{s（n）和至少一个本地生成的I信道和Q信道PN信号（I和NQ）之间的相关值（n在PN信号的多个周期上被平均，导频信号跟踪精度提高，计算负载降低而性能下降，并且该技术足够简单，可以并入到现成的FPGA中。

10. 发明授权

US06707329B2 Clock recovery or detection of rapid phase transients 失效
标题翻译：时钟恢复或检测快速相位瞬变
公开(公告)号：US06707329B2
公开(公告)日：2004-03-16
申请号：US10345600
申请日：2003-01-16
申请人： Kishan Shenoi
发明人： Kishan Shenoi
IPC分类号： H03L706
CPC分类号： H03L7/089 , H03L7/0992 , H03L7/0994 , H04L7/033 , H04L7/0331
摘要： Systems and method are described for clock recovery or detection of rapid phase transients. An apparatus includes: a numerically controlled oscillator; a phase detector coupled to the numerically controlled oscillator; and a multiplexer coupled to the phase detector and the numerically controlled oscillator, wherein a) the phase detector sets a state variable indicator to either i) a high value when an output phase of the numerically controlled oscillator lags an incoming signal phase, or ii) a low value when the output phase leads the incoming signal phase, b) the multiplexer sends either i) a high increment to the numerically controlled oscillator when the state variable indicator has been set to the high value, or ii) a low increment to the numerically controlled oscillator when the state variable indicator has been set to the low value, and c) the numerically controlled oscillator either i) advances the output phase when the high increment has been sent to the numerically controlled oscillator, or ii) retards the output phase when the low increment has been sent to the numerically controlled oscillator.
摘要翻译：描述了用于时钟恢复或快速相位瞬变检测的系统和方法。一种装置包括：数控振荡器; 耦合到数控振荡器的相位检测器; 以及耦合到相位检测器和数控振荡器的多路复用器，其中a）当数控振荡器的输出相位滞后于输入信号相位时，相位检测器将状态变量指示器设置为i）高值，或ii）当输出相位引导输入信号相位时为低值，b）当状态变量指示器被设置为高值时，多路复用器将i增加到数控振荡器，或者ii）向数值控制振荡器，当状态变量指示器被设置为低值时，和c）数控振荡器，或者i）当高增量被发送到数控振荡器时，使输出相位前进，或者ii）延迟输出相位当低增量已经发送到数控振荡器时。

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