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1. 发明授权

US07795647B2 Curled semiconductor transistor 失效
标题翻译：卷曲半导体晶体管
公开(公告)号：US07795647B2
公开(公告)日：2010-09-14
申请号：US11727955
申请日：2007-03-29
申请人： Garrett A. Storaska , Robert S. Howell , Harvey C. Nathanson , Francis William Hopwood
发明人： Garrett A. Storaska , Robert S. Howell , Harvey C. Nathanson , Francis William Hopwood
IPC分类号： H01L29/76
CPC分类号： H01L21/84 , H01L27/1203 , H01L29/0657 , H01L29/78603 , H01L29/78696
摘要： A curled transistor comprises a coiled semiconductor substrate having a plurality of concentrically curled layers. Source and drain regions are configured on a portion of the coiled semiconductor substrate, and a gate dielectric is positioned between the source and drain regions. A first set of metallic contacts electrically couple to the source region on the coiled semiconductor substrate and a second set of metallic contacts electrically couple to the drain region on the coiled semiconductor substrate.
摘要翻译：卷曲晶体管包括具有多个同心卷曲层的螺旋半导体衬底。源极和漏极区域被配置在线圈化的半导体衬底的一部分上，并且栅极电介质位于源极和漏极区域之间。第一组金属触点电耦合到卷绕的半导体衬底上的源极区域，以及第二组金属触点，电耦合到线圈化的半导体衬底上的漏极区域。

2. 发明授权

US07119942B2 Side spring micro-mirror 失效
标题翻译：侧弹微镜
公开(公告)号：US07119942B2
公开(公告)日：2006-10-10
申请号：US10879040
申请日：2004-06-30
申请人： Harvey C. Nathanson , Robert S. Howell , Garrett A. Storaska , John B. Goodell , Stephen D. Vancampen
发明人： Harvey C. Nathanson , Robert S. Howell , Garrett A. Storaska , John B. Goodell , Stephen D. Vancampen
IPC分类号： G02B26/00
CPC分类号： G02B26/0841
摘要： A micro-electrical mechanical system (MEMS) mirror assembly including an array of micro-mirrors formed on a substrate and having springs on one side and which angularly tilt between ON and OFF states in response to an electrostatic force generated by a voltage applied to an electrode located on the substrate. At least one, but preferably two springs in the form of two thin strips of metal attach to post(s) at the side edge of the mirror and act as springs which provide a restoring force when the mirror is tilted between an OFF state which occurs when the mirror is flat relative to the substrate with no voltage applied, and in the ON state when the mirror is tilted when a voltage is applied.
摘要翻译：一种微电机械系统（MEMS）反射镜组件，包括形成在基板上的微反射镜阵列，并且在一侧具有弹簧，并且响应于施加到一个电压的电压产生的静电力而在ON和OFF状态之间成角度地倾斜电极位于基板上。至少一个，但最好是两个金属条带形式的两个弹簧，在镜子的侧边缘附着到柱上，并且当弹簧在镜子在发生的关闭状态之间倾斜时提供恢复力当反射镜相对于没有施加电压的基板是平坦的，并且当施加电压时镜子倾斜时处于导通状态。

3. 发明授权

US07868358B2 Coiled circuit device with active circuitry and methods for making the same 失效
标题翻译：具有有源电路的线圈电路器件及其制造方法
公开(公告)号：US07868358B2
公开(公告)日：2011-01-11
申请号：US11653964
申请日：2007-01-17
申请人： Joseph Smith , Harvey C. Nathanson , Robert S. Howell , Christopher F. Kirby , Garrett A. Storaska
发明人： Joseph Smith , Harvey C. Nathanson , Robert S. Howell , Christopher F. Kirby , Garrett A. Storaska
IPC分类号： H01L27/10
CPC分类号： H01L21/84 , H01L27/1203 , H01L29/78603
摘要： A device includes a coiling layer, a circuit device layer and active microelectronic circuitry fabricated on the circuit device layer. The coiling layer is formed onto a surface of and coupled to the circuit device layer. The coiling layer having intrinsic stresses which cause coiling of the coiling layer and the circuit device layer including the microelectronic circuitry as the circuit device layer is released from an underlying substrate. A coiled circuit device is formed.
摘要翻译：一种器件包括卷绕层，电路器件层和在电路器件层上制造的有源微电子电路。卷绕层形成在电路器件层的表面上并耦合到电路器件层。具有引起卷绕层卷绕的固有应力的卷取层和包括作为电路器件层的微电子电路的电路器件层从下面的衬底释放。形成线圈电路装置。

4. 发明授权

US07488994B2 Coiled circuit device and method of making the same 失效
标题翻译：线圈电路装置及其制造方法
公开(公告)号：US07488994B2
公开(公告)日：2009-02-10
申请号：US10861885
申请日：2004-06-07
申请人： Harvey C. Nathanson , Robert S. Howell , Garrett A. Storaska
发明人： Harvey C. Nathanson , Robert S. Howell , Garrett A. Storaska
IPC分类号： H01L27/10
CPC分类号： H01L27/1203 , H01L21/84 , H01L29/78603
摘要： A coiled circuit device is produced by forming a circuit layer on a substrate. Optional insulator layers may be disposed above and below the circuit layer. The circuit layer, which may be memory, control, or other circuitry, is released from the substrate such that it coils into a dense, coiled device. A stressed coiling layer may be included which effects coiling when the circuit layer is released.
摘要翻译：通过在基板上形成电路层来制造线圈电路器件。可选择的绝缘体层可以布置在电路层的上方和下方。可以是存储器，控制或其他电路的电路层从衬底释放，使得其线圈成密集的盘绕器件。可以包括应力卷绕层，其在电路层被释放时产生卷绕。

5. 发明授权

US07164811B2 Pocket-pen ultra-high resolution MEMS projection display in combination with on-axis CCD image capture system including means for permitting 3-D imaging 有权
标题翻译：袖珍笔超高分辨率MEMS投影显示器与轴上CCD图像捕获系统相结合，包括允许3-D成像的装置
公开(公告)号：US07164811B2
公开(公告)日：2007-01-16
申请号：US10879041
申请日：2004-06-30
申请人： Harvey C. Nathanson , Robert S. Howell , Ragini Saxena , Garrett A. Storaska
发明人： Harvey C. Nathanson , Robert S. Howell , Ragini Saxena , Garrett A. Storaska
IPC分类号： G06K9/22
CPC分类号： G03B17/48 , G03B17/17 , G03B21/005 , H04N5/2251 , H04N9/3111 , H04N9/3176
摘要： A small portable “pocket pen size” projector/image grabber device for allowing an individual to gather, share and exploit information in a projected format in real time, day or night, with other individuals on demand. An ultra high density MEMS mirror display array provides a 1024×768 line projection display. An on-axis 512×384 color CCD imager is also included resulting in a digitally-aligned image capture and overlay display capability. A sequentially-addressed three color chip laser and low cost plastic optics provides full color high resolution bright displays for group viewing. 3-D color imaging is also provided by a binocular attachment to the device which permits the capturing of three-dimensional imagery.
摘要翻译：一个小便携式“口袋笔尺寸”投影仪/图像抓取设备，用于允许个人按需要实时收集，共享和利用实时，白天或晚上的预测格式的信息。超高密度MEMS镜面显示阵列提供1024x768线投影显示。还包括一个轴上512x384彩色CCD成像器，可实现数字对齐的图像捕获和覆盖显示功能。一个顺序寻址的三色芯片激光器和低成本塑料光学元件提供全色高分辨率亮度显示器，用于组观察。 3-D彩色成像还通过允许捕获三维图像的装置的双眼附件提供。

6. 发明授权

US07514301B2 Method for fabricating nanocoils 失效
标题翻译：制造纳米线的方法
公开(公告)号：US07514301B2
公开(公告)日：2009-04-07
申请号：US11524246
申请日：2006-09-21
申请人： Garrett A. Storaska , Robert S. Howell
发明人： Garrett A. Storaska , Robert S. Howell
IPC分类号： H01L21/00 , H01L21/84
CPC分类号： H01L27/1203 , B81C1/0019 , B82Y10/00 , B82Y30/00 , H01F41/041 , H01L21/84 , H01L27/10
摘要： A method for fabricating nanocoils and improved nanocoils fabricated therefrom. Embodiments of the method utilizing deep reactive ion etching (DRIE). A method for fabricating nanocoils includes providing a silicon-on-insulator (SOI) wafer, in which SOI wafer includes buried oxide layer, patterning one or more devices into a layer of silicon on top of the buried oxide layer, depositing tensile stressed nitride layer on the top silicon layer, patterning coiling arm structure on top silicon layer, patterning an overlapping etch window mask on bottom side of SOI wafer using, in which patterning overlapping etch window mask removes SOI wafer and exposes buried oxide layer in width greater than coiling arm structure, and releasing coiling arm structure so that coiling arm coils to form nanocoil. In embodiments, DRIE is utilized to pattern the overlapping etch window mask.
摘要翻译：一种用于制造纳米线和由其制造的改进的纳米薄膜的方法。利用深反应离子蚀刻（DRIE）的方法的实施例。制造纳米线的方法包括提供绝缘体上硅（SOI）晶片，其中SOI晶片包括掩埋氧化物层，将一个或多个器件图案化成掩埋氧化物层顶部的硅层，沉积拉应力氮化物层在顶层硅层上，在顶部硅层上图案化卷取臂结构，在SOI晶片的底侧上构图重叠的蚀刻窗口掩模，其中图案化重叠的蚀刻窗口掩模移除SOI晶片并暴露出大于卷取臂的宽度的掩埋氧化物层结构和释放卷取臂结构，使卷绕臂线圈形成纳米油。在实施例中，DRIE用于对重叠的蚀刻窗口掩模进行图案化。

7. 发明授权

US07710235B2 Inductors fabricated from spiral nanocoils and fabricated using noncoil spiral pitch control techniques 有权
标题翻译：由螺旋纳米线制造的电感器，并使用非线圈螺旋桨距控制技术制造
公开(公告)号：US07710235B2
公开(公告)日：2010-05-04
申请号：US11524245
申请日：2006-09-21
申请人： Garrett A. Storaska , Robert S. Howell
发明人： Garrett A. Storaska , Robert S. Howell
IPC分类号： H01F21/04 , H01F27/28
CPC分类号： H01L27/1203 , B81C1/0019 , B82Y10/00 , B82Y30/00 , H01F41/041 , H01L21/84 , H01L27/10
摘要： Novel applications of nanocoil technology and novel methods of fabricating nanocoils for use in such applications and others. Such applications include inductors or traveling wave tubes fabricated from spiral nanocoils. Such applications includes inductors or traveling wave tubes fabricated from a method for fabricating nanocoils with a desired pitch. Such a method includes determining a desired pitch for fabricated nanocoil, selecting coiling arm orientation in which coiling arm orientation is arm angle between coiling arm an crystalline orientation of underlying substrate, whereby coiling arm orientation affects pitch of fabricated nanocoil, patterning coiling arm structure with selected coiling arm orientation, and, releasing coiling arm, whereby fabricated nanocoil is formed.
摘要翻译：纳米线技术的新应用和制造纳米线的新方法用于这些应用和其他应用。这种应用包括由螺旋纳米线制造的电感器或行波管。这样的应用包括由用于制造具有期望间距的纳米线圈的方法制造的电感器或行波管。这种方法包括确定所制造的纳米线的期望间距，选择卷取臂取向，其中卷取臂取向是卷绕臂之间的臂角，下面的基底的结晶取向之间的夹角，由此卷取臂取向影响制造的纳米线的间距，图案化卷取臂结构与选定的卷取臂取向，以及释放卷取臂，从而形成制造的纳米油。

8. 发明申请

US20090053860A1 METHOD FOR FABRICATING NANOCOILS 失效
标题翻译：制备纳米微粒的方法
公开(公告)号：US20090053860A1
公开(公告)日：2009-02-26
申请号：US11524246
申请日：2006-09-21
申请人： Garrett A. Storaska , Robert S. Howell
发明人： Garrett A. Storaska , Robert S. Howell
IPC分类号： H01L21/00
CPC分类号： H01L27/1203 , B81C1/0019 , B82Y10/00 , B82Y30/00 , H01F41/041 , H01L21/84 , H01L27/10
摘要： A method for fabricating nanocoils and improved nanocoils fabricated therefrom. Embodiments of the method utilizing deep reactive ion etching (DRIE). A method for fabricating nanocoils includes providing a silicon-on-insulator (SOI) wafer, in which SOI wafer includes buried oxide layer, patterning one or more devices into a layer of silicon on top of the buried oxide layer, depositing tensile stressed nitride layer on the top silicon layer, patterning coiling arm structure on top silicon layer, patterning an overlapping etch window mask on bottom side of SOI wafer using, in which patterning overlapping etch window mask removes SOI wafer and exposes buried oxide layer in width greater than coiling arm structure, and releasing coiling arm structure so that coiling arm coils to form nanocoil. In embodiments, DRIE is utilized to pattern the overlapping etch window mask.
摘要翻译：一种用于制造纳米线和由其制造的改进的纳米薄膜的方法。利用深反应离子蚀刻（DRIE）的方法的实施例。制造纳米线的方法包括提供绝缘体上硅（SOI）晶片，其中SOI晶片包括掩埋氧化物层，将一个或多个器件图案化成掩埋氧化物层顶部的硅层，沉积拉应力氮化物层在顶层硅层上，在顶部硅层上图案化卷取臂结构，在SOI晶片的底侧上构图重叠的蚀刻窗口掩模，其中图案化重叠的蚀刻窗口掩模移除SOI晶片并使掩埋氧化物层的宽度大于卷取臂结构和释放卷取臂结构，使卷绕臂线圈形成纳米油。在实施例中，DRIE用于对重叠的蚀刻窗口掩模进行图案化。

9. 发明授权

US07871529B2 System for fabricating nanocoils using a wet etch technique 失效
标题翻译：使用湿蚀刻技术制造纳米线的系统
公开(公告)号：US07871529B2
公开(公告)日：2011-01-18
申请号：US12693875
申请日：2010-01-26
申请人： Garrett A. Storaska , Robert S. Howell
发明人： Garrett A. Storaska , Robert S. Howell
IPC分类号： H01L27/08
CPC分类号： H01L27/1203 , B81C1/0019 , B82Y10/00 , B82Y30/00 , H01F41/041 , H01L21/84 , H01L27/10
摘要： Novel applications of nanocoil technology and novel methods of fabricating nanocoils for use in such applications and others. Such applications include microscopic electro-mechanical systems (MEMS) devices including nanocoil mirrors, nanocoil actuators and nanocoil antenna arrays. Inductors or traveling wave tubes fabricated from nanocoils are also included. A method for fabricating nanocoils with a desired pitch includes determining a desired pitch for fabricated nanocoil, selecting coiling arm orientation in which coiling arm orientation is arm angle between coiling arm an crystalline orientation of underlying substrate, whereby coiling arm orientation affects pitch of fabricated nanocoil, patterning coiling arm structure with selected coiling arm orientation, and, releasing coiling arm, whereby fabricated nanocoil is formed.
摘要翻译：纳米线技术的新应用和制造纳米线的新方法用于这些应用和其他应用。这样的应用包括微观机电系统（MEMS）装置，包括纳米油镜，纳米线驱动器和纳米线圈天线阵列。还包括由纳米体系制造的电感器或行波管。用于制造具有期望间距的纳米线圈的方法包括确定制造的纳米线圈的期望间距，选择卷取臂取向，其中卷取臂取向是卷绕臂之间的臂角，下面基底的结晶取向，由此卷取臂取向影响制造的纳米线的间距，以选定的卷取臂取向构图卷取臂结构，以及释放卷取臂，从而形成制造的纳米油。

10. 发明授权

US07601620B2 Methods for fabricating nanocoils 有权
标题翻译：制造纳米线的方法
公开(公告)号：US07601620B2
公开(公告)日：2009-10-13
申请号：US11524244
申请日：2006-09-21
申请人： Garrett A. Storaska , Robert S. Howell
发明人： Garrett A. Storaska , Robert S. Howell
IPC分类号： H01L21/00
CPC分类号： H01L27/1203 , B81C1/0019 , B82Y10/00 , B82Y30/00 , H01F41/041 , H01L21/84 , H01L27/10
摘要： Improved nanocoils, systems and methods for fabricating nanocoils. Embodiments enable wet etching techniques for releasing coiling arm structures and forming nanocoils. A method for fabricating nanocoils includes providing a silicon-on-insulator (SOI) wafer in which SOI wafer includes a buried oxide layer, patterning one or more devices onto a silicon device layer on top of the buried oxide layer, depositing a tensile stressed layer on the silicon device layer so that stressed layer and silicon device layer form a stressed coiling bi-layer, patterning a coiling arm structure on the stressed coiling bi-layer, depositing a metal encapsulation layer on the stressed coiling bi-layer, and releasing the coiling arm structure so that coiling arm coils to form nanocoil. A system for fabricating nanocoils includes a substrate, a coiling arm structure including, a buried oxide layer deposited on the substrate, a stressed coiling bi-layer attached to the buried oxide layer including a silicon device layer that includes one or more devices defined thereon and a stressed nitride layer that provides a tensile coiling stress, and a metal encapsulation layer that protects stressed nitride layer from hydrofluoric (HF) acid used to release the coiling arm structure from the substrate during the wet etch technique so that coiling arm structure coils into nanocoil when released. Improved nanocoils may be fabricated according to these and other methods and systems.
摘要翻译：改进的纳米体系，制备纳米线的系统和方法。实施例可以实现用于释放卷取臂结构和形成纳米油的湿蚀刻技术。一种制造纳米薄膜的方法包括提供绝缘体上硅（SOI）晶片，其中SOI晶片包括掩埋氧化物层，将一个或多个器件图案化到掩埋氧化物层顶部的硅器件层上，沉积拉伸应力层在硅器件层上，使得应力层和硅器件层形成应力卷绕双层，在应力卷绕双层上构图卷绕臂结构，在应力卷绕双层上沉积金属封装层，并释放卷取臂结构，使卷绕臂线圈形成纳米线。一种用于制造纳米线的系统包括基底，包括沉积在基底上的掩埋氧化物层的卷取臂结构，附着到掩埋氧化物层的应力卷绕双层，包括硅器件层，该硅器件层包括一个或多个在其上限定的器件，提供拉伸卷取应力的应力氮化物层和在湿法蚀刻技术期间保护应力氮化物层免受氢氟酸（HF）酸从衬底释放卷取臂结构的金属封装层，使得卷取臂结构卷材成纳米油释放时根据这些和其他方法和系统可以制造改进的纳米薄膜。

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