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1. 发明申请

US20050181242A1 Battery pack and method for manufacturing the same 有权
标题翻译：电池组及其制造方法
公开(公告)号：US20050181242A1
公开(公告)日：2005-08-18
申请号：US10987756
申请日：2004-11-11
申请人： Fumihiko Suzuki , Takayuki Aita , Hiroaki Kanno , Kouji Watanabe
发明人： Fumihiko Suzuki , Takayuki Aita , Hiroaki Kanno , Kouji Watanabe
IPC分类号： H01M2/02 , H01M2/04 , H01M2/06 , H01M2/10 , H01M2/20 , H01M2/22 , H01M2/34 , H01M10/04 , H01M10/42
CPC分类号： H01M10/425 , H01M2/0212 , H01M2/0404 , H01M2/22 , H01M10/0436 , H01M10/0525 , H01M10/0565 , H01M10/0587 , Y10T29/49108
摘要： A battery pack and method of manufacturing same are provided. The battery pack can stabilize bending of a lead housed in a space defined by an external package. Leads 2, 3 of a battery element are bonded to a circuit board housed in a top cover 6. A holder 11 is mechanically fitted to the top cover 6, made of resin molded material and produced by injection molding, for example. The edge faces of ribs 12a, 12b, 12c formed on the holder 11 serve as planes which receive the circuit board 4 in the top cover 6. The top cover 6 and the holder 11 fitted to each other are turned 90°, and moved toward the opening in the edge face of the cell 1 while bending the leads 2, 3, which are bent along the contours of both the sidewalls and bottom surface of the holder 11 and housed in a space defined by the external package. The circumferential surface of the top cover 6 is bonded by heat to the inner surface of the external package.
摘要翻译：提供一种电池组及其制造方法。电池组可以稳定由外部封装限定的空间中容纳的引线的弯曲。电池元件的引线2,3被接合到容纳在顶盖6中的电路板上。例如，通过注射成型机械地将保持件11机械地配合到由树脂模制材料制成的顶盖6上。形成在保持器11上的肋12a，12b，12c的边缘面用作在顶盖6中容纳电路板4的平面。顶盖6和彼此嵌合的保持器11转动90°，并向着同时弯曲电池1的边缘面的开口，同时弯曲引线2,3，引线2,3沿着保持器11的侧壁和底表面的轮廓弯曲并容纳在由外包装限定的空间中。顶盖6的周面通过加热结合到外包装的内表面。

2. 发明授权

US07262956B2 Battery pack and method for manufacturing the same 有权
标题翻译：电池组及其制造方法
公开(公告)号：US07262956B2
公开(公告)日：2007-08-28
申请号：US10987756
申请日：2004-11-11
申请人： Fumihiko Suzuki , Takayuki Aita , Hiroaki Kanno , Kouji Watanabe
发明人： Fumihiko Suzuki , Takayuki Aita , Hiroaki Kanno , Kouji Watanabe
IPC分类号： H05K5/00
CPC分类号： H01M10/425 , H01M2/0212 , H01M2/0404 , H01M2/22 , H01M10/0436 , H01M10/0525 , H01M10/0565 , H01M10/0587 , Y10T29/49108
摘要： A battery pack and method of manufacturing same are provided. The battery pack can stabilize bending of a lead housed in a space defined by an external package. Leads 2, 3 of a battery element are bonded to a circuit board housed in a top cover 6. A holder 11 is mechanically fitted to the top cover 6, made of resin molded material and produced by injection molding, for example. The edge faces of ribs 12a, 12b, 12c formed on the holder 11 serve as planes which receive the circuit board 4 in the top cover 6. The top cover 6 and the holder 11 fitted to each other are turned 90°, and moved toward the opening in the edge face of the cell 1 while bending the leads 2, 3, which are bent along the contours of both the sidewalls and bottom surface of the holder 11 and housed in a space defined by the external package. The circumferential surface of the top cover 6 is bonded by heat to the inner surface of the external package.
摘要翻译：提供一种电池组及其制造方法。电池组可以稳定由外部封装限定的空间中容纳的引线的弯曲。电池元件的引线2,3被接合到容纳在顶盖6中的电路板上。例如，通过注射成型机械地将保持件11机械地配合到由树脂模制材料制成的顶盖6上。形成在保持器11上的肋条12a，12b，12c的边缘面用作接收顶盖6中的电路板4的平面。彼此相配合的顶盖6和保持器11转动90°，并朝着电池单元1的边缘面的开口移动，同时弯曲沿着两个侧壁和底部的轮廓弯曲的引线2,3 保持器11的表面并且容纳在由外部封装限定的空间中。顶盖6的周面通过加热结合到外包装的内表面。

3. 发明授权

US5708615A Semiconductor memory device with reduced current consumption during precharge and reading periods 失效
标题翻译：半导体存储器件在预充电和读取期间具有降低的电流消耗
公开(公告)号：US5708615A
公开(公告)日：1998-01-13
申请号：US708733
申请日：1996-09-05
申请人： Fumihiro Ryoho , Hiroaki Kanno
发明人： Fumihiro Ryoho , Hiroaki Kanno
IPC分类号： G11C17/00 , G11C7/06 , G11C7/12 , G11C16/06 , G11C7/00
CPC分类号： G11C7/12 , G11C7/067
摘要： A semiconductor memory device with low current consumption is disclosed. A bit line selecting circuit (3) establishes electrical connection between a bit line (BL) selected during a read period and a node (N2) in response to bit line connection/selection signals (SB0 to SB4). A charge-up circuit (7) includes PMOS transistors (Q29, Q30). The PMOS transistor (Q29) has a source connected to a power supply (V.sub.DD), a drain connected to a drain of a transistor (Q10) of the bit line selecting circuit (3), and a gate receiving a read control signal (SC). The PMOS transistor (Q30) has a source connected to the power supply (V.sub.DD), a drain connected to the drain of the transistor (Q10) of the bit line selecting circuit (3), and a gate fixed at a ground level.
摘要翻译：公开了一种具有低电流消耗的半导体存储器件。位线选择电路（3）响应于位线连接/选择信号（SB0至SB4）建立在读周期期间选择的位线（BL）与节点（N2）之间的电连接。充电电路（7）包括PMOS晶体管（Q29，Q30）。 PMOS晶体管（Q29）具有连接到电源（VDD）的源极，连接到位线选择电路（3）的晶体管（Q10）的漏极的漏极和接收读取控制信号（SC）的栅极）。 PMOS晶体管（Q30）具有连接到电源（VDD）的源极，连接到位线选择电路（3）的晶体管（Q10）的漏极的漏极和固定在地电平的栅极。

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