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    • 4. 发明专利
    • JPH05304248A
    • 1993-11-16
    • JP32487491
    • 1991-12-10
    • FUJI ELECTRIC CO LTD
    • MARUYAMA ATSUSHI
    • H01L23/12H01L25/07H01L25/18
    • PURPOSE:To provide a power semiconductor device, e.g. a power transistor module, in which overall downsizing is realized by reducing the required area of metallic insulating board while ensuring high heat dissipation properties and noise resistance. CONSTITUTION:A metallic insulating board 1, a semiconductor chip (power transistor) 2 mounted on the metallic insulating board 1, control circuit components 3, and external lead out terminals 4 are built in a resin case 5. An intermediate partition wall 5a covering the top surface area of the metallic insulating board 1 other than the mounting area of the semiconductor chip 2 is provided at an intermediate stage in the case 5. The external lead out terminals 4, control circuit components 3, and wiring conductors therefor are arranged on the top surface side of the intermediate partition wall 5a while being isolated from the semiconductor chip 2, which is mounted through a heat plate 6 onto the metallic insulating board 1 on the side where a metallic foil 1c is not patterned.
    • 7. 发明专利
    • SEMICONDUCTOR DEVICE
    • JPH04165653A
    • 1992-06-11
    • JP29311890
    • 1990-10-30
    • FUJI ELECTRIC CO LTD
    • MARUYAMA ATSUSHI
    • H01L23/04
    • PURPOSE:To secure a sufficiently high dielectric strength between a metallic insulating substrate and a leading-out terminal by covering the side edge of the metallic insulating substrate facing the conductor of the leading-out terminal with an insulating cover. CONSTITUTION:An insulating cover 7 forming a cleat frame is integrally form- molded with an envelope 3 on the opened end side of the envelope 3 front which a leading-out terminal 4 is drawn out. The cover 7 has an L-shaped cross section and covers the upper edge corner section of a metallic insulating substrate 1 along the side of the substrate 1 facing the conductor of the terminal 4 when the envelope 3 is fitted to the substrate 1. When such constitution is used, a creeping discharge hardly occurs from the part where electric fields tend to concentrate when a voltage is applied, since the part is covered with the cover 7, and a substantially high dielectric strength can be secured, since the creeping distance to the terminal 4 can be increased by the detouring amount when the cover 7 is made to detour. Therefore, not only the package of this semiconductor device can be reduced in thickness, but also the dielectric strength can be stabilized.
    • 8. 发明专利
    • SEMICONDUCTOR DEVICE
    • JPH0325962A
    • 1991-02-04
    • JP16134289
    • 1989-06-23
    • FUJI ELECTRIC CO LTD
    • MARUYAMA ATSUSHI
    • H01L23/40
    • PURPOSE:To enable the maintenance of good heat-dissipation characteristics by blazing a cooling member to the container of a semiconductor device. CONSTITUTION:A power transistor module container 1 containing plural power transistor elements is composed of an insulating substrate of a container bottom plate 11, a container side wall 12 fixed on the circumference of said substrate, and an upper lid 13 covering the upper part of side wall. As the insulating substrate of the container bottom plate 11, a copper-coating ceramic substrate, the so-called DBC(Direct Bonding Copper) substrate is used and that copper- coating surface is made the outside of container. The container side wall 12 and the upper lid 13 are formed of fat molded bodies. The outer surface of container bottom plate 11 is made of an aluminum material, to which a cooling fin 4 whose surface is nickel-plated is blazed by a solder 5.
    • 9. 发明专利
    • SEMICONDUCTOR DEVICE
    • JPH02126661A
    • 1990-05-15
    • JP28075588
    • 1988-11-07
    • FUJI ELECTRIC CO LTD
    • MARUYAMA ATSUSHI
    • H01L23/14H01L23/50
    • PURPOSE:To prevent a bonded part from being destroyed and to enhance a positional accuracy of an external extraction terminal by a method wherein a metal sheet and an insulating sheet are fixed and bonded, exclusing a part under a bonded part of the external extraction terminal, by using a bonding material existing between both. CONSTITUTION:A semiconductor chip 8 and an external extraction terminal 5 are brazed to a substrate for semiconductor-element mounting use by using a brazing material 6. Since a difference in a coefficient of thermal expansion between a semiconductor material and a ceramic is small, a bonded part of a Cu sheet 1 and of a ceramic sheet 2 under the semiconductor chip is not destroyed even by a heat cycle. Since the Cu sheet 1 and the ceramic sheet 2 are not bonded under the terminal whose coefficient of thermal expansion is larger than that of the semiconductor material, the bonded part is not destroyed. A deformation of the Cu sheet 1 during a brazing operation of the external extraction terminal 5 to the Cu sheet 1 by using the brazing material 6 is slight; its influence on a positional accuracy of the terminal 5 and an irregularity in a thickness of the brazing material are hardly caused. An upper-part electrode of the semiconductor chip 8 is connected to the external extraction terminal bonded to the Cu sheet 1 via an insulating sheet by a bonding operation of a conductor.