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1. 发明授权

US07824962B2 Method of integrated circuit fabrication 有权
标题翻译：集成电路制造方法
公开(公告)号：US07824962B2
公开(公告)日：2010-11-02
申请号：US12021806
申请日：2008-01-29
申请人： Franco Mariani , Werner Kroeninger
发明人： Franco Mariani , Werner Kroeninger
IPC分类号： H01L21/44
CPC分类号： H01L21/78 , H01L2924/10155
摘要： A method for fabricating an integrated circuit including forming a first trench in a rear side of a semiconductor wafer, wherein the first trench has a depth extending partially through a thickness of the semiconductor wafer, coating the rear side with a layer of coating material, including filling the first trench with the coating material, and forming a second trench in a front side of the semiconductor wafer, wherein the second trench is aligned with and has a width less than a width of the first trench, and wherein the second trench has a depth extending at least through a remaining portion of the semiconductor wafer so as to be in communication with the coating material filling the first trench.
摘要翻译：一种用于制造集成电路的方法，包括在半导体晶片的后侧形成第一沟槽，其中第一沟槽具有部分延伸穿过半导体晶片的厚度的深度，用一层涂层材料涂覆后侧，包括用所述涂覆材料填充所述第一沟槽，以及在所述半导体晶片的前侧形成第二沟槽，其中所述第二沟槽对准并具有小于所述第一沟槽的宽度的宽度，并且其中所述第二沟槽具有深度延伸至少穿过半导体晶片的剩余部分，以便与填充第一沟槽的涂层材料连通。

2. 发明申请

US20080224316A1 Electronic device and method for producing electronic devices 有权
标题翻译：电子装置及其制造方法
公开(公告)号：US20080224316A1
公开(公告)日：2008-09-18
申请号：US11865177
申请日：2007-10-01
申请人： Werner Kroeninger , Franco Mariani
发明人： Werner Kroeninger , Franco Mariani
IPC分类号： H01L23/14 , H01L21/60
CPC分类号： H01L23/49513 , H01L21/6835 , H01L21/6836 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/33 , H01L24/45 , H01L24/48 , H01L24/83 , H01L2221/68318 , H01L2221/68327 , H01L2221/68368 , H01L2224/16 , H01L2224/27436 , H01L2224/32014 , H01L2224/32245 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48247 , H01L2224/73265 , H01L2224/83191 , H01L2224/83801 , H01L2224/83825 , H01L2224/92247 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01073 , H01L2924/01079 , H01L2924/01082 , H01L2924/04941 , H01L2924/04953 , H01L2924/10253 , H01L2924/1305 , H01L2924/13055 , H01L2924/14 , H01L2924/181 , H01L2924/00014 , H01L2924/00 , H01L2924/3512 , H01L2924/00012
摘要： An explanation is given of, inter alia, an electronic device (10), comprising:an integrated component (12) with a substrate,an electrically conductive first layer region (14), arranged at the substrate, wherein the layer thickness of the first layer region is greater than 10 micrometres or greater than 50 micrometres.
摘要翻译：具体地说，给出了一种电子设备（10），其包括：具有衬底的集成组件（12），布置在衬底处的导电第一层区域（14），其中第一层区域大于10微米或大于50微米。

3. 发明授权

US08017942B2 Semiconductor device and method 有权
标题翻译：半导体器件及方法
公开(公告)号：US08017942B2
公开(公告)日：2011-09-13
申请号：US12277894
申请日：2008-11-25
申请人： Franco Mariani , Werner Kroeninger , Adolf Koller , Horst Theuss , Jens Arkenau
发明人： Franco Mariani , Werner Kroeninger , Adolf Koller , Horst Theuss , Jens Arkenau
IPC分类号： H01L23/58 , H01L29/10
CPC分类号： H01L21/78 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device and method. One embodiment provides a semiconductor substrate having a plurality of cut regions. A metal layer is located within a cut region. The metal layer includes a recess, the recess having a slit-like shape.
摘要翻译：半导体器件和方法。一个实施例提供了具有多个切割区域的半导体衬底。金属层位于切割区域内。金属层包括凹部，凹部具有狭缝状。

4. 发明申请

US20100127355A1 SEMICONDUCTOR DEVICE AND METHOD 有权
标题翻译：半导体器件和方法
公开(公告)号：US20100127355A1
公开(公告)日：2010-05-27
申请号：US12277894
申请日：2008-11-25
申请人： Franco Mariani , Werner Kroeninger , Adolf Koller , Horst Theuss , Jens Arkenau
发明人： Franco Mariani , Werner Kroeninger , Adolf Koller , Horst Theuss , Jens Arkenau
IPC分类号： H01L23/544 , H01L21/304
CPC分类号： H01L21/78 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device and method. One embodiment provides a semiconductor substrate having a plurality of cut regions. A metal layer is located within a cut region. The metal layer includes a recess, the recess having a slit-like shape.
摘要翻译：半导体器件和方法。一个实施例提供了具有多个切割区域的半导体衬底。金属层位于切割区域内。金属层包括凹部，凹部具有狭缝状。

5. 发明授权

US07582513B2 Electronic device and method for producing electronic devices 有权
标题翻译：电子装置及其制造方法
公开(公告)号：US07582513B2
公开(公告)日：2009-09-01
申请号：US11865177
申请日：2007-10-01
申请人： Werner Kroeninger , Franco Mariani
发明人： Werner Kroeninger , Franco Mariani
IPC分类号： H01L21/00
CPC分类号： H01L23/49513 , H01L21/6835 , H01L21/6836 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/33 , H01L24/45 , H01L24/48 , H01L24/83 , H01L2221/68318 , H01L2221/68327 , H01L2221/68368 , H01L2224/16 , H01L2224/27436 , H01L2224/32014 , H01L2224/32245 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48247 , H01L2224/73265 , H01L2224/83191 , H01L2224/83801 , H01L2224/83825 , H01L2224/92247 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01073 , H01L2924/01079 , H01L2924/01082 , H01L2924/04941 , H01L2924/04953 , H01L2924/10253 , H01L2924/1305 , H01L2924/13055 , H01L2924/14 , H01L2924/181 , H01L2924/00014 , H01L2924/00 , H01L2924/3512 , H01L2924/00012
摘要： One aspect includes an electronic device including an integrated component with a substrate. An electrically conductive first layer region is arranged at the substrate, wherein the layer thickness of the first layer region is greater than 10 micrometers or greater than 50 micrometers.
摘要翻译：一个方面包括一种包括具有基板的集成部件的电子设备。导电的第一层区域布置在衬底处，其中第一层区域的层厚度大于10微米或大于50微米。

6. 发明申请

US20090189258A1 METHOD OF INTEGRATED CIRCUIT FABRICATION 有权
标题翻译：集成电路制造方法
公开(公告)号：US20090189258A1
公开(公告)日：2009-07-30
申请号：US12021806
申请日：2008-01-29
申请人： Franco Mariani , Werner Kroeninger
发明人： Franco Mariani , Werner Kroeninger
IPC分类号： H01L23/58 , H01L21/311 , H01L21/00
CPC分类号： H01L21/78 , H01L2924/10155
摘要： A method for fabricating an integrated circuit including forming a first trench in a rear side of a semiconductor wafer, wherein the first trench has a depth extending partially through a thickness of the semiconductor wafer, coating the rear side with a layer of coating material, including filling the first trench with the coating material, and forming a second trench in a front side of the semiconductor wafer, wherein the second trench is aligned with and has a width less than a width of the first trench, and wherein the second trench has a depth extending at least through a remaining portion of the semiconductor wafer so as to be in communication with the coating material filling the first trench.
摘要翻译：一种用于制造集成电路的方法，包括在半导体晶片的后侧形成第一沟槽，其中第一沟槽具有部分延伸穿过半导体晶片的厚度的深度，用一层涂层材料涂覆后侧，包括用所述涂覆材料填充所述第一沟槽，以及在所述半导体晶片的前侧形成第二沟槽，其中所述第二沟槽对准并具有小于所述第一沟槽的宽度的宽度，并且其中所述第二沟槽具有深度延伸至少穿过半导体晶片的剩余部分，以便与填充第一沟槽的涂层材料连通。

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