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    • 1. 发明申请
    • Carbon nanotube interconnect contacts
    • 碳纳米管互连触点
    • US20060281306A1
    • 2006-12-14
    • US11148614
    • 2005-06-08
    • Florian GstreinAdrien LavoieValery DubinJuan Dominguez
    • Florian GstreinAdrien LavoieValery DubinJuan Dominguez
    • H01L21/44
    • H01L23/53276H01L21/76877H01L2221/1094H01L2924/0002H01L2924/00
    • A method for forming an interconnect on a semiconductor substrate comprises providing at least one carbon nanotube within a trench, etching at least one portion of the carbon nanotube to create an opening, conformally depositing a metal layer on the carbon nanotube through the opening, and forming a metallized contact at the opening that is substantially coupled to the carbon nanotube. The metal layer may be conformally deposited on the carbon nanotube using an atomic layer deposition process or an electroless plating process. Multiple metal layers may be deposited to substantially fill voids within the carbon nanotube. The electroless plating process may use a supercritical liquid as the medium for the plating solution. The wetting behavior of the carbon nanotube may be modified prior to the electroless plating process to increase the hydrophilicity of the carbon nanotube.
    • 一种用于在半导体衬底上形成互连的方法包括在沟槽内提供至少一个碳纳米管,蚀刻碳纳米管的至少一部分以形成开口,通过开口在碳纳米管上共形沉积金属层,并形成 在开口处的金属化接触基本上与碳纳米管耦合。 可以使用原子层沉积工艺或无电镀工艺将金属层共形沉积在碳纳米管上。 可以沉积多个金属层以基本上填充碳纳米管内的空隙。 化学镀处理可以使用超临界液体作为电镀溶液的介质。 可以在化学镀处理之前改变碳纳米管的润湿性能,以增加碳纳米管的亲水性。
    • 2. 发明申请
    • Carbon nanotube interconnect structures
    • 碳纳米管互连结构
    • US20070155158A1
    • 2007-07-05
    • US11325774
    • 2005-12-30
    • Florian GstreinValery DubinJuan DominguezAdrien Lavoie
    • Florian GstreinValery DubinJuan DominguezAdrien Lavoie
    • H01L21/4763
    • H01L21/76877H01L21/76838H01L23/53276H01L2221/1094H01L2924/0002Y10S977/742Y10S977/75H01L2924/00
    • A method including forming an interconnect of single-walled carbon nanotubes on a sacrificial substrate; transferring the interconnect from the sacrificial substrate to a circuit substrate; and coupling the interconnect to a contact point on the circuit substrate. A method including forming a nanotube bundle on a circuit substrate between a first contact point and a second contact point, the nanotube defining a lumen therethrough; filling a portion of a length of the lumen of the nanotube bundle with an electrically conductive material; and coupling the electrically conductive material to the second contact point. A system including a computing device comprising a microprocessor, the microprocessor coupled to a printed circuit board, the microprocessor including a substrate having a plurality of circuit devices with electrical connections made to the plurality of circuit devices through interconnect structures including carbon nanotube bundles.
    • 一种包括在牺牲衬底上形成单层碳纳米管的互连的方法; 将所述互连件从所述牺牲衬底转移到电路衬底; 以及将所述互连件耦合到所述电路基板上的接触点。 一种方法,包括在第一接触点和第二接触点之间的电路基板上形成纳米管束,所述纳米管限定通过其的腔; 用导电材料填充纳米管束管腔长度的一部分; 以及将所述导电材料耦合到所述第二接触点。 一种包括计算设备的系统,包括微处理器,微处理器耦合到印刷电路板,微处理器包括具有多个电路器件的衬底,该电路器件具有通过包括碳纳米管束的互连结构与多个电路器件形成的电连接。
    • 9. 发明申请
    • Noble metal precursors for copper barrier and seed layer
    • 铜屏障和种子层的贵金属前体
    • US20070207611A1
    • 2007-09-06
    • US11367160
    • 2006-03-03
    • Adrien LavoieJuan DominguezAaron Budrevich
    • Adrien LavoieJuan DominguezAaron Budrevich
    • H01L21/44
    • C23C28/00C23C28/322C23C28/34C23C28/36
    • A copper interconnect oh a semiconductor substrate comprises a dielectric layer having a trench, a noble metal layer on the dielectric layer within the trench, and a copper interconnect on the noble metal layer. The noble metal layer has a thickness that is between 3 Å and 100 Å and a density that is greater than or equal to 5 g/cm3. The copper interconnect may be formed by etching a trench into the dielectric layer, pulsing a noble metal containing precursor proximate to the semiconductor substrate, and pulsing a reactive gas proximate to the semiconductor substrate, wherein the reactive gas reacts with the precursor to form a noble metal layer on the dielectric layer. A copper layer may then be deposited atop the noble metal layer and planarized. The noble metal layer functions as a barrier to copper diffusion and provides a surface upon which the copper metal can nucleate.
    • 半导体衬底的铜互连包括具有沟槽的电介质层,沟槽内介电层上的贵金属层和贵金属层上的铜互连。 贵金属层的厚度在3埃至100埃之间,密度大于或等于5克/平方厘米。 铜互连可以通过将沟槽蚀刻到电介质层中,使靠近半导体衬底的含贵金属的前体脉冲,并且使靠近半导体衬底的反应性气体脉冲,其中反应气体与前体反应形成贵金属 电介质层上的金属层。 然后可以将铜层沉积在贵金属层上方并平坦化。 贵金属层用作铜扩散的阻挡层,并提供铜金属可以在其上成核的表面。