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1. 发明授权

US09244983B2 Platform for continuous graph update and computation 有权
标题翻译：用于连续图更新和计算的平台
公开(公告)号：US09244983B2
公开(公告)日：2016-01-26
申请号：US13520628
申请日：2012-04-05
申请人： Fan Yang , Lidong Zhou , Ming Wu , Aapo Kyrola , Raymond Cheng , Youshan Miao , Xuetian Weng , Ji Hong
发明人： Fan Yang , Lidong Zhou , Ming Wu , Aapo Kyrola , Raymond Cheng , Youshan Miao , Xuetian Weng , Ji Hong
IPC分类号： G06F17/30 , G06F11/14
CPC分类号： G06F17/30958 , G06F11/1451 , G06F17/30368 , G06F17/30516 , G06F17/30578 , G06F2201/84
摘要： A continuous stream data (e.g., messages, tweets) is received by ingest nodes of a platform. The ingest nodes may analyze the data to create a transaction of graph updates, assign a sequence number to the transaction, and distribute the graph updates with the sequence number to graph nodes of the platform. The graph nodes may store graph updates from ingest nodes, and then the ingest nodes may report graph update progresses in a progress table. A snapshot may be taken based on the progress table, and then graph-mining computation may be implemented. Tolerate failures and decaying may be supported and incremental expansion may be allowed to cope with increasing update rates and computation needs.
摘要翻译：通过平台的摄取节点接收连续流数据（例如，消息，推文）。摄取节点可以分析数据以创建图更新的事务，为事务分配序列号，并将具有序列号的图更新分发到平台的图形节点。图形节点可以存储来自摄取节点的图更新，然后，摄取节点可以在进度表中报告图更新进度。可以基于进度表进行快照，然后可以实现图形挖掘计算。可以支持容忍故障和衰减，并且可以允许增量扩展来应对增加的更新速率和计算需求。

2. 发明申请

US20150154262A1 Platform for Continuous Graph Update and Computation 有权
标题翻译：连续图更新和计算平台
公开(公告)号：US20150154262A1
公开(公告)日：2015-06-04
申请号：US13520628
申请日：2012-04-05
申请人： Fan Yang , Lidong Zhou , Ming Wu , Aapo Kyrola , Raymond Cheng , Youshan Miao , Xuetian Weng , Ji Hong
发明人： Fan Yang , Lidong Zhou , Ming Wu , Aapo Kyrola , Raymond Cheng , Youshan Miao , Xuetian Weng , Ji Hong
IPC分类号： G06F17/30 , G06F11/14
CPC分类号： G06F17/30958 , G06F11/1451 , G06F17/30368 , G06F17/30516 , G06F17/30578 , G06F2201/84
摘要： A continuous stream data (e.g., messages, tweets) is received by ingest nodes of a platform. The ingest nodes may analyze the data to create a transaction of graph updates, assign a sequence number to the transaction, and distribute the graph updates with the sequence number to graph nodes of the platform. The graph nodes may store graph updates from ingest nodes, and then the ingest nodes may report graph update progresses in a progress table. A snapshot may be taken based on the progress table, and then graph-mining computation may be implemented. Tolerate failures and decaying may be supported and incremental expansion may be allowed to cope with increasing update rates and computation needs.
摘要翻译：通过平台的摄取节点接收连续流数据（例如，消息，推文）。摄取节点可以分析数据以创建图更新的事务，为事务分配序列号，并将具有序列号的图更新分发到平台的图形节点。图形节点可以存储来自摄取节点的图更新，然后，摄取节点可以在进度表中报告图更新进度。可以基于进度表进行快照，然后可以实现图形挖掘计算。可以支持容忍故障和衰减，并且可以允许增量扩展来应对增加的更新速率和计算需求。

3. 发明申请

US20070173061A1 COPPER METAL INTERCONNECTION WITH A LOCAL BARRIER METAL LAYER 有权
标题翻译：铜金属互连与本地障碍金属层
公开(公告)号：US20070173061A1
公开(公告)日：2007-07-26
申请号：US11616737
申请日：2006-12-27
申请人： Ji Hong
发明人： Ji Hong
IPC分类号： H01L21/44
CPC分类号： H01L21/76877 , H01L21/2885 , H01L21/76849
摘要： Embodiments relate to a method of forming a copper metal interconnection in a semiconductor device using a damascene process. In embodiments, the method may include forming a damascene pattern in an interlayer dielectric layer on a semiconductor substrate, burying a copper plating layer in the damascene pattern using an ECP method, forming a recess on the copper plating layer buried in the damascene pattern, and forming a barrier metal layer in the recess. Since the barrier metal layer may be locally formed on the copper metal interconnection, it may be possible to prevent the diffusion of the copper although the size of the pattern is small.
摘要翻译：实施例涉及使用镶嵌工艺在半导体器件中形成铜金属互连的方法。在实施例中，该方法可以包括在半导体衬底上的层间电介质层中形成镶嵌图案，使用ECP法在铜版图案中埋设铜镀层，在埋藏在镶嵌图案中的铜镀层上形成凹陷，以及在凹部中形成阻挡金属层。由于阻挡金属层可以局部地形成在铜金属互连上，所以尽管图案的尺寸小，也可以防止铜的扩散。

4. 发明申请

US20070151946A1 Method for monitoring edge bead removal process of copper metal interconnection 失效
标题翻译：监测铜金属互连边缘焊道清除过程的方法
公开(公告)号：US20070151946A1
公开(公告)日：2007-07-05
申请号：US11646836
申请日：2006-12-27
申请人： Ji Hong
发明人： Ji Hong
IPC分类号： G01L21/30 , H01L21/302 , B08B6/00 , C23F1/00 , C23G1/02
CPC分类号： C23F1/02 , H01L21/02068 , H01L21/02087 , H01L21/32134 , H01L22/26
摘要： Disclosed is a method for monitoring an edge bead removal process for a copper metal interconnection. The method includes the steps of (a) forming a copper metal layer on a semiconductor wafer, (b) performing the edge bead removal (EBR) process of removing the copper metal layer formed in an edge area of the semiconductor wafer, and (c) determining whether copper residues exist by measuring a reflection coefficient Rc of the copper metal layer formed in a center area of the semiconductor wafer and a reflection coefficient (Rb) in the edge area of the semiconductor wafer which is subject to the edge bead removal (EBR) process.
摘要翻译：公开了一种用于监测铜金属互连的边缘珠去除工艺的方法。该方法包括以下步骤：（a）在半导体晶片上形成铜金属层，（b）进行除去形成在半导体晶片的边缘区域中的铜金属层的边缘珠去除（EBR）工序，（c ）通过测量形成在半导体晶片的中心区域中的铜金属层的反射系数Rc和经受边缘珠去除的半导体晶片的边缘区域中的反射系数（Rb）来确定铜残留物是否存在 EBR）过程。

5. 发明申请

US20050153545A1 Methods of forming copper interconnections using electrochemical plating processes 审中-公开
标题翻译：使用电化学电镀工艺形成铜互连的方法
公开(公告)号：US20050153545A1
公开(公告)日：2005-07-14
申请号：US11027514
申请日：2004-12-30
申请人： Ji Hong
发明人： Ji Hong
IPC分类号： H01L21/28 , H01L21/44 , H01L21/4763 , H01L21/768 , H01L23/532
CPC分类号： H01L21/76843 , H01L21/76873 , H01L21/76877 , H01L23/53238 , H01L2924/0002 , H01L2924/00
摘要： Methods of forming a copper interconnect using an ECP process is disclosed. One disclosed method includes forming a barrier metal layer on the surface of a single or dual damascene structure; forming a silver layer as a seed layer on the surface of the barrier metal layer; forming a Cu layer on the silver layer by performing an ECP process using the silver layer as the seed layer; and performing an annealing process and a chemical mechanical polishing process for the Cu layer to form a Cu interconnect.
摘要翻译：公开了使用ECP工艺形成铜互连的方法。一种公开的方法包括在单一或双重镶嵌结构的表面上形成阻挡金属层; 在阻挡金属层的表面上形成作为种子层的银层; 通过使用银层作为种子层进行ECP处理，在银层上形成Cu层; 并对Cu层进行退火处理和化学机械抛光工艺以形成Cu互连。

6. 发明申请

US20060154157A1 Photo mask and method of manufacturing the same, and method of forming photosensitive film pattern of using the photo mask 有权
公开(公告)号：US20060154157A1
公开(公告)日：2006-07-13
申请号：US11372202
申请日：2006-03-10
申请人： Ji Hong
发明人： Ji Hong
IPC分类号： G03C5/00 , G03F1/00
CPC分类号： G03F1/32 , G03F1/36
摘要： The present invention relates to a photo mask and a method of manufacturing the same, and a method of forming a photosensitive film pattern using the photo mask. A photo mask pattern having an exposure region, a phase-inverse region and a photosensitive region is provided. The predetermined size and shape of the patterns on the photo mask are formed. Through this manner, distortions of the photosensitive film pattern upon development are compensated and a target photosensitive film pattern can be more accurately acquired. Furthermore, the depth of focus of a photolithography process can be increased.

7. 发明申请

US20060137714A1 Apparatus for removing edge bead in plating process for fabricating semiconductor device 审中-公开
标题翻译：用于在电镀工艺中去除边缘珠的装置用于制造半导体器件
公开(公告)号：US20060137714A1
公开(公告)日：2006-06-29
申请号：US11302061
申请日：2005-12-12
申请人： Ji Hong
发明人： Ji Hong
IPC分类号： C23G1/00 , B08B7/00 , B08B3/00 , C03C23/00
CPC分类号： C23F1/02 , B08B3/02 , C23F1/08 , H01L21/6708
摘要： An apparatus for removing an edge bead in, e.g., a plating process for fabricating a semiconductor device is provided, by which a wafer surface may be prevented from being oxidized by a chemical used in an edge bead removal (EBR) process. The apparatus may includes a spin chuck; a wafer on the spin chuck having a metal layer thereon; a nozzle for spraying a chemical on an edge of the wafer; and a cover shield having a bent (or curved) portion opposing a lateral side of the wafer. Accordingly, the bent or curved portion of the sidewall of the cover shield prevents or reduces the incidence of back splash of the chemical spun off the wafer in EBR process, thereby preventing or reducing the occurrence of defects such as the stripe pattern (or other surface oxidation) due to the wafer's contact with the chemical other than at the edge.
摘要翻译：提供了用于在例如用于制造半导体器件的电镀工艺中去除边缘焊道的装置，通过该装置可以防止晶片表面被用于边缘珠去除（EBR）工艺中的化学品氧化。该装置可以包括旋转卡盘; 旋转卡盘上的晶片在其上具有金属层; 用于在晶片的边缘上喷涂化学品的喷嘴; 以及具有与晶片的横向侧相对的弯曲（或弯曲）部分的盖罩。因此，盖罩的侧壁的弯曲或弯曲部分防止或减少在EBR工艺中从晶片脱离的化学物质的飞溅反应的发生，从而防止或减少诸如条纹图案（或其他表面氧化）由于晶片与化学品的接触而不是在边缘。

8. 发明申请

US20070077755A1 Method of forming metal wiring in a semiconductor device 审中-公开
标题翻译：在半导体器件中形成金属布线的方法
公开(公告)号：US20070077755A1
公开(公告)日：2007-04-05
申请号：US11320705
申请日：2005-12-30
申请人： Ji Hong
发明人： Ji Hong
IPC分类号： H01L21/44
CPC分类号： H01L21/76871 , H01L21/76807 , H01L21/76814 , H01L21/76831 , H01L21/76877 , H01L2221/1057
摘要： A method for forming metal wiring in a semiconductor device includes forming a first metal wiring, an etch stopping layer, and an interlayer insulation film on a semiconductor substrate. A via-hole and a trench are respectively formed by selectively removing a portion of the interlayer insulation film. The etch stopping layer is selectively removed to expose a surface of the first metal wiring. An oxidation film is formed on an entire surface of the semiconductor substrate. A de-gas process is performed on the semiconductor substrate and the oxidation film is removed. A metal diffusion barrier film is provided on an entire surface of the semiconductor substrate. A second metal wiring is formed on a metal seed layer, which has a thickness in a range of 750 to 850 Å on the metal diffusion barrier film.
摘要翻译：在半导体器件中形成金属布线的方法包括在半导体衬底上形成第一金属布线，蚀刻停止层和层间绝缘膜。通过选择性地去除层间绝缘膜的一部分分别形成通孔和沟槽。选择性地去除蚀刻停止层以暴露第一金属布线的表面。在半导体基板的整个表面上形成氧化膜。在半导体基板上进行脱气处理，除去氧化膜。在半导体基板的整个表面上设置金属扩散阻挡膜。第二金属布线形成在金属种子层上，该金属种子层的厚度在金属扩散阻挡膜上为750〜

9. 发明申请

US20070056856A1 Apparatus and method for electrically contacting wafer in electronic chemical plating cell 审中-公开
标题翻译：电子化学镀电池中晶片电接触的装置和方法
公开(公告)号：US20070056856A1
公开(公告)日：2007-03-15
申请号：US11320621
申请日：2005-12-30
申请人： Ji Hong
发明人： Ji Hong
IPC分类号： C25D7/12
CPC分类号： C25D17/001 , C25D17/005 , H01L21/2885
摘要： An apparatus and method for electrically contacting a wafer in an electronic chemical plating cell includes a plating bath containing an electrolytic solution therein, an anode member arranged at a lower portion in the plating bath, a support member for arranging a wafer at an upper portion in the plating bath to face the anode member, a first cathode contact member electrically contacting an edge of the wafer, a second cathode contact member electrically contacting the center of the wafer, and a power supply electrically connected among the anode member, the first cathode contact member and the second cathode contact member to supply the power. Since resistance of a seed layer is reduced, it is possible to improve uniformity of the plating layer.
摘要翻译：用于电接触电子化学镀电池中的晶片的装置和方法包括其中包含电解液的镀浴，布置在镀浴中的下部的阳极构件，用于在上部设置晶片的支撑构件所述电镀浴面对所述阳极部件，与所述晶片的边缘电接触的第一阴极接触部件，与所述晶片的中心电接触的第二阴极接触部件与所述阳极部件，所述第一阴极接触部构件和第二阴极接触构件供电。由于种子层的电阻降低，可以提高镀层的均匀性。

10. 发明申请

US20050153548A1 Method for fabricating semiconductor device to minimize terminal effect in ECP process 失效
标题翻译：制造半导体器件以最小化ECP工艺中的端子效应的方法
公开(公告)号：US20050153548A1
公开(公告)日：2005-07-14
申请号：US11026882
申请日：2004-12-30
申请人： Ji Hong
发明人： Ji Hong
IPC分类号： H01L21/28 , H01L21/288 , H01L21/44 , H01L21/768
CPC分类号： H01L21/76843 , H01L21/288 , H01L21/76873
摘要： A method for fabricating a semiconductor device to minimize a terminal effect in an ECP process is disclosed. The method for fabricating a semiconductor device to minimize a terminal effect in an ECP process, comprises depositing a barrier metallic layer on the top of a damascene pattern formed through an etching process, forming an Ag seed layer by employing a heating process for the reaction of the surface of the barrier metallic layer and a NH3 solution of AgNO3 and reductive materials in a reactor, plating a Cu layer by using the Ag seed layer through an ECP process and forming a Cu interconnect through an annealing process and a Cu CMP process. The method for fabricating a semiconductor device according to the present invention provides the improvement of uniformity by forming a seed layer with low-resistivity regardless of a thin thickness in order to avoid a terminal effect in an ECP process.
摘要翻译：公开了一种用于制造半导体器件以最小化ECP工艺中的端子效应的方法。用于制造半导体器件以最小化ECP工艺中的端子效应的方法包括在通过蚀刻工艺形成的镶嵌图案的顶部沉积阻挡金属层，通过采用用于反应的加热工艺形成Ag种子层阻挡金属层的表面和AgNO 3 N 3 NH 3溶液和还原材料在反应器中，通过使用Ag种子层通过ECP方法电镀Cu层以及通过退火工艺和Cu CMP工艺形成Cu互连。根据本发明的制造半导体器件的方法通过形成具有低电阻率的种子层而不管薄厚度来提供均匀性，以避免在ECP工艺中的终端效应。

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