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    • 8. 发明申请
    • METHOD FOR THE PRODUCTION OF AN INTEGRATED CIRCUIT AND INTEGRATED CIRCUIT WITH A BIPOLAR TRANSISTOR AND A HETERO BIPOLAR TRANSISTOR
    • METHOD FOR制造集成电路与集成电路具有双极晶体管和杂
    • WO03096412A2
    • 2003-11-20
    • PCT/EP0305001
    • 2003-05-13
    • INFINEON TECHNOLOGIES AGDAHL CLAUSMUELLER KARLHEINZWAGNER CAJETAN
    • DAHL CLAUSMUELLER KARLHEINZWAGNER CAJETAN
    • H01L21/8222H01L21/8249H01L27/06H01L27/082
    • H01L27/0623H01L21/8222H01L21/8249H01L27/0825
    • In order to integrate an npn bipolar transistor with a hetero bipolar transistor, a placeholder layer is produced (322) in a base area of the hetero bipolar transistor after structuring (320) a collector structure for both types of transistors, wherein the placeholder layer is not present in a base area of the bipolar transistor. The base of the bipolar transistor is covered (326) once the base of the bipolar transistor has been produced (324), whereupon the placeholder layer is removed and the base (328) of the hetero bipolar transistor is then produced on the site from which the placeholder layer has been removed. The emitter structure is then equally produced (330) for both types of transistors so that an integrated circuit comprising the bipolar transistors and the hetero bipolar transistors is obtained, the collector structures and/or the emitter structures of which consist of identical production layers. This makes it possible to produce space-saving and economical integrated circuits profiting from the advantages of both transistor types.
    • 用于根据图案化(320)的集电极结构两种晶体管类型的具有异质结双极晶体管的npn双极晶体管的集成是在异质(322),其中所述占位符层不存在于所述双极晶体管的基区的基极区中产生的占位符层。 双极晶体管的基极的生成(324)后,将双极晶体管的基极被覆盖(326),于是在牺牲层被去除,异质结双极型晶体管的基极(328)产生,其中该占位符层已被移除。 其中的发射极结构被同时产生这两种类型的晶体管(330),使得存在一种集成电路,其包括双极晶体管和异质其集电极结构和/或发射器的结构相同的底涂层组成。 因此节省空间和成本效益的集成电路可以由从两种类型的晶体管的优点在于益处。