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1. 发明申请

WO2008041064A2 IMPROVEMENTS IN OR RELATING TO HEADSETS 审中-公开
标题翻译：改进或相关头盔
公开(公告)号：WO2008041064A2
公开(公告)日：2008-04-10
申请号：PCT/IB2006/054679
申请日：2006-10-06
申请人： FREESCALE SEMICONDUCTOR, INC. , ENJALBERT, Jerome
发明人： ENJALBERT, Jerome
IPC分类号： H04R3/00 , H04M1/725 , H04M1/60 , H04B1/38 , G06F13/14
CPC分类号： H04R3/00 , H04M1/6058 , H04R1/1041 , H04R2410/00
摘要： A detector for detecting the connection of an accessory including a microphone and/or the state of a switch associated with the microphone for a mobile device, wherein the detector comprises a first flag generator for time multiplexing the detection of a signal above a predetermined threshold for each of two comparators, such that for one time period one comparator output is detected and for a second time period the second comparator output is detected to thereby form a first flag; a second flag generator for determining the connection of microphone to thereby generate a second flag; a lookup table for determining the connection of the accessory and/or the state of the microphone switch from the first and second flags.
摘要翻译：一种检测器，用于检测包括麦克风的附件和/或与用于移动设备的麦克风相关联的开关的状态的连接，其中所述检测器包括第一标志发生器，用于将高于预定阈值的信号的检测时间复用两个比较器中的每一个，使得在一个时间段中检测到一个比较器输出，并且在第二时间段中检测到第二比较器输出，从而形成第一标志; 第二标志发生器，用于确定麦克风的连接，从而产生第二标志; 用于确定附件的连接和/或麦克风开关的状态与第一和第二标志的查找表。

2. 发明申请

WO2014191787A1 VOLTAGE REGULATOR, APPLICATION-SPECIFIC INTEGRATED CIRCUIT AND METHOD FOR PROVIDING A LOAD WITH A REGULATED VOLTAGE 审中-公开
标题翻译：电压调节器，应用特定集成电路和用于提供具有调节电压的负载的方法
公开(公告)号：WO2014191787A1
公开(公告)日：2014-12-04
申请号：PCT/IB2013/001452
申请日：2013-05-29
申请人： FREESCALE SEMICONDUCTOR, INC. , ENJALBERT, Jerome , KRUECKEN, Joachim , OUADDAH, Jalal
发明人： ENJALBERT, Jerome , KRUECKEN, Joachim , OUADDAH, Jalal
IPC分类号： G05F3/02
CPC分类号： G05F1/575 , G05F1/56 , G05F1/565
摘要： A voltage regulator (200) for digital loads (203) combines a closed loop regulation circuit (207,210) with an open loop topology. A (closed loop) transistor (210) and a bank of (open loop) transistors (218, 220, 221 ) share the same voltage source VDD and gate control current. Each of the bank of transistors is sized to match different current load requirements and one or more may be switched in or out as appropriate when the digital load transitions from one operating mode to another. The regulator has good DC load regulation and unconditional stability regardless of output capacitance.
摘要翻译：用于数字负载（203）的电压调节器（200）将闭环调节电路（207,210）与开环拓扑结合。（闭环）晶体管（210）和一组（开环）晶体管（218,220,221）共享相同的电压源VDD和栅极控制电流。每个晶体管组的大小可以匹配不同的电流负载要求，并且当数字负载从一个工作模式转换到另一个工作模式时，可以适当地切换或者切换一个或多个晶体管。调节器具有良好的直流负载调节和无条件的稳定性，无论输出电容如何。

3. 发明申请

WO2009063276A1 AMPLIFIER CIRCUIT 审中-公开
标题翻译：放大器电路
公开(公告)号：WO2009063276A1
公开(公告)日：2009-05-22
申请号：PCT/IB2007/055388
申请日：2007-11-15
申请人： FREESCALE SEMICONDUCTOR, INC. , ENJALBERT, Jerome , MENGAD, Zakaria
发明人： ENJALBERT, Jerome , MENGAD, Zakaria
IPC分类号： H03F1/02 , H03F3/45
CPC分类号： H03F3/45183 , H03F1/0211 , H03F1/0272 , H03F3/45726 , H03F2200/516 , H03F2203/45028 , H03F2203/45134 , H03F2203/45318 , H03F2203/45466 , H03F2203/45642 , H03F2203/45722
摘要： An amplifier circuit (230) comprises differential amplification circuitry (310) comprising an input stage having first and second differential inputs ( vip, vim ), and an output stage, having respective first and second amplifier components with first and second differential outputs ( vop, vom ). The first amplifier component of the output stage comprises a first power transistor (M8) operably coupled to the first differential output ( vop ) and driven by a first differential output (410) of the input stage, and a third power transistor (M4) operably coupled to the first differential output ( vop ) of the amplifier circuit (230) and driven by a second output (420) of the input stage. The second amplifier component comprises a second power transistor (M9) operably coupled to the second differential output ( vom ) and driven by a second output (420) of the input stage, and a fourth power transistor (M3) operably coupled to the second differential output ( vom ) and driven by the first output (410) of the input stage. Each of the first and second power transistors (M8, M9) of the first and second amplifier components is driven in a current mirror arrangement by the respective first and second output (410, 420) of the input stage.
摘要翻译：放大器电路（230）包括差分放大电路（310），差分放大电路（310）包括具有第一和第二差分输入（vip，vim）的输入级和输出级，具有具有第一和第二差分输出（vop， VOM）。输出级的第一放大器部件包括可操作地耦合到第一差分输出（vop）并由输入级的第一差分输出（410）驱动的第一功率晶体管（M8）和可操作地连接到第三功率晶体管耦合到放大器电路（230）的第一差分输出（vop）并由输入级的第二输出（420）驱动。第二放大器组件包括可操作地耦合到第二差分输出（vom）并由输入级的第二输出（420）驱动的第二功率晶体管（M9），以及可操作地耦合到第二差分输出（vom）并由输入级的第一输出（410）驱动。第一和第二放大器部件的第一和第二功率晶体管（M8，M9）中的每个通过输入级的相应的第一和第二输出（410,420）以电流反射镜布置驱动。

4. 发明申请

WO2006090203A1 CONTROL APPARATUS AND METHOD OF REGULATING POWER 审中-公开
标题翻译：控制装置和调节功率的方法
公开(公告)号：WO2006090203A1
公开(公告)日：2006-08-31
申请号：PCT/IB2005/000819
申请日：2005-02-22
申请人： FREESCALE SEMICONDUCTOR, INC , ENJALBERT, Jerome , TICO, Olivier
发明人： ENJALBERT, Jerome , TICO, Olivier
IPC分类号： H02J7/00
CPC分类号： H01M10/44 , H02J7/0052
摘要： In the field of battery charging for electronic devices, it is known to employ a number of measures to avoid excessive power dissipation by a pass device in a charging system. However, many of these measures are either incompatible with linear charging regimes or add cost to the adapter and/or charging system. The present invention provides a power dissipation measurement circuit for controlling a control device that acts in series with another, but maximum current limiting, control device to control drive current to the pass device so as to limit the power dissipated by the pass device to a maximum threshold value.
摘要翻译：在电子设备的电池充电领域中，已知采用多种措施来避免充电系统中通过装置的功率消耗过大。然而，这些措施中的许多措施与线性充电方式不兼容，或者增加适配器和/或充电系统的成本。本发明提供了一种功率耗散测量电路，用于控制与另一但是最大限流控制装置串联的控制装置，以控制到通过装置的驱动电流，以便将通过装置消耗的功率限制到最大阈值。

5. 发明申请

WO2005091100A1 LOW DROP-OUT DC VOLTAGE REGULATOR 审中-公开
标题翻译：低压降直流稳压器
公开(公告)号：WO2005091100A1
公开(公告)日：2005-09-29
申请号：PCT/EP2005/002819
申请日：2005-03-15
申请人： FREESCALE SEMICONDUCTOR, INC. , ENJALBERT, Jerome
发明人： ENJALBERT, Jerome
IPC分类号： G05F1/575
CPC分类号： G05F1/575
摘要： A low drop-out DC voltage regulator for regulating a voltage from a DC power supply (Vsupply) applied to a load (3) at an output of the regulator and comprising a pass device (T7) for controlling flow of current from the power supply to the load so as to control the output voltage (Vout) at the regulator output, and a feedback loop for controlling the pass device (T7). The feedback loop comprises a resistive (5) and a capacitive (6) feedback path and comparator means responsive to signals from the feedback paths for applying to the pass device (T7) an error signal that is a function of the value of the output voltage (Vout) relative to a reference value so as to control the output voltage (Vout). The comparator means comprises feedback current producing means (8-10) for maintaining a common point (7) of the resistive feedback path (5) and the capacitive feedback path (6) at a reference voltage (Vref) so as to produce a feedback current flowing in the resistive feedback path (5) and in the capacitive feedback path (6) and current comparison means (11) responsive to values of the feedback current and of a reference current (Vref/R1) for producing the error signal.
摘要翻译：一种用于调节在调节器的输出处施加到负载（3）的直流电源（Vsupply）的电压并包括用于控制来自电源的电流的通过装置（T7）的低压降直流电压调节器以控制调节器输出端的输出电压（Vout）和用于控制通过装置（T7）的反馈回路。反馈回路包括电阻（5）和电容（6）反馈路径，并且响应于来自反馈路径的信号的比较器装置将施加到通过装置（T7）的误差信号作为输出电压值的函数（Vout），以便控制输出电压（Vout）。比较器装置包括用于将电阻反馈路径（5）和电容反馈路径（6）的公共点（7）保持在参考电压（Vref）的反馈电流产生装置（8-10），以产生反馈响应于反馈电流的值和用于产生误差信号的参考电流（Vref / R1），在电阻反馈路径（5）和电容反馈路径（6）和电流比较装置（11）中流动的电流。

6. 发明申请

WO2015001370A1 TRIMMING CIRCUIT FOR A SENSOR AND TRIMMING METHOD 审中-公开
标题翻译：传感器和修剪方法的修正电路
公开(公告)号：WO2015001370A1
公开(公告)日：2015-01-08
申请号：PCT/IB2013/001763
申请日：2013-07-03
申请人： FREESCALE SEMICONDUCTOR, INC. , COZAC, Emil , ENJALBERT, Jerome , OUADDAH, Jalal
发明人： COZAC, Emil , ENJALBERT, Jerome , OUADDAH, Jalal
IPC分类号： G01P21/00 , G01L25/00 , G01D3/036
CPC分类号： G01P21/00 , G01D3/036
摘要： An on-board trimming circuit suitable for trimming an accelerometer (100) provides offset trim (112, 113) and gain trim (116, 115) modules for determining correct trim codes for subsequent programming into the trimming circuit. The correct trim codes may be determined by comparing sensor outputs (107,108,109) which have been adjusted by successive trim codes, with a reference voltage in a comparator (117) until the comparator toggles or by using a successive approximation technique. The reference voltage is supplied form a tap (130) of a feedback resistance divider circuit (128) which forms a part of an on-board voltage reference generator (126) which may be used to provide a full scale reference for an analog to digital converter which converts a sensor output voltage into a digital signal. Using reference voltages supplied from such a feedback circuit significantly lessens the impact of any offsets inherent in the voltage reference generator (126) on the trimming process.
摘要翻译：一种适于修整加速度计（100）的板上微调电路提供偏移微调（112,113）和增益微调（116,115）模块，用于确定用于随后编程到微调电路中的正确修剪代码。正确的修剪代码可以通过比较已经通过连续修剪代码调整的传感器输出（107,108,109）与比较器（117）中的参考电压直到比较器切换或通过使用逐次逼近技术来确定。参考电压由形成车载电压参考发生器（126）的一部分的反馈电阻分配器电路（128）的抽头（130）提供，其可用于为模数转换器提供满量程参考转换器，其将传感器输出电压转换为数字信号。使用从这种反馈电路提供的参考电压可以显着地减小电压参考发生器（126）固有的偏移对修整过程的影响。

7. 发明申请

WO2014174334A1 METHOD AND APPARATUS FOR METERING A VOLTAGE SIGNAL 审中-公开
标题翻译：测量电压信号的方法和装置
公开(公告)号：WO2014174334A1
公开(公告)日：2014-10-30
申请号：PCT/IB2013/001150
申请日：2013-04-22
申请人： FREESCALE SEMICONDUCTOR, INC. , ENJALBERT, Jerome
发明人： ENJALBERT, Jerome
IPC分类号： G01R31/36 , G01R19/25
CPC分类号： G01R19/22 , G01R19/2509 , G01R31/361 , G01R31/362
摘要： A voltage metering module for metering a voltage signal. The voltage metering module comprises at least one analogue to digital converter, ADC, component arranged to receive at an input thereof a voltage signal and to generate a digital signal representative of the received voltage signal. The at least one ADC component comprises at least one sampling network controllable to sample the received voltage signal for conversion to a digital signal representative of the received voltage signal, at least one compensation network operably coupled in parallel with the sampling network and controllable to sample the received voltage signal such that an input current of the compensation network at least partially compensates for a component of an input current of the sampling network. Figure 8 to accompany abstract.
摘要翻译：用于测量电压信号的电压计量模块。电压计量模块包括至少一个模数转换器ADC，其组件被布置成在其输入处接收电压信号并产生代表所接收的电压信号的数字信号。所述至少一个ADC组件包括至少一个采样网络，其可控制以对所接收的电压信号进行采样以转换为代表所接收的电压信号的数字信号;至少一个补偿网络，其可操作地与采样网络并联并且可控制以对采样网络进行采样接收电压信号，使得补偿网络的输入电流至少部分地补偿采样网络的输入电流的分量。图8为摘要。

8. 发明申请

WO2014023994A1 SAMPLE-AND-HOLD CIRCUIT, CAPACITIVE SENSING DEVICE, AND METHOD OF OPERATING A SAMPLE-AND-HOLD CIRCUIT 审中-公开
标题翻译：样品保持电路，电容式感测装置以及操作样品保持电路的方法
公开(公告)号：WO2014023994A1
公开(公告)日：2014-02-13
申请号：PCT/IB2012/001818
申请日：2012-08-08
申请人： FREESCALE SEMICONDUCTOR, INC. , ENJALBERT, Jerome
发明人： ENJALBERT, Jerome
IPC分类号： G11C27/02
CPC分类号： G11C27/024 , G01R27/26
摘要： A sample-and-hold circuit (10) comprising an input (12, 14), one or more dedicated capacitive elements (16, 20), one or more parasitic capacitive elements (100, 104, 108) connected to said one or more dedicated capacitive elements, an output (24, 26), a group of switches (56, 58, 60, 62, 64, 66, 80, 82, 84, 86), and a control unit (1 12) is proposed. The control unit controls said switches so as to interconnect said input (12, 14), said one or more dedicated capacitive elements (16, 18, 20, 22), and said output (24, 26) in a cyclic manner in accordance with a sample-and-hold cycle that comprises, in this chronological order: an observation phase (t2— 14) in which said one or more dedicated capacitive elements are disconnected from said output and connected to said input so as to adapt an electrical charge of said dedicated capacitive elements to an input voltage (Vip) applied at said input, a read-out phase (t5— 16) in which said one or more dedicated capacitive elements are disconnected from said input and connected to said output so as to provide an output voltage (Vop) in dependence on said electrical charge, and a sleep phase (t6— 11 ) in which said one or more dedicated capacitive elements are disconnected from both said input and said output, said sleep phase involving a forward charge transfer between said one or more dedicated capacitive elements and said one or more parasitic capacitive elements, and a restoration phase (t1— 12) in which said one or more dedicated capacitive elements are disconnected from said input and connected to said output so as to cause a reverse charge transfer between said one or more dedicated capacitive elements and said one or more parasitic capacitive elements, said reverse charge transfer canceling said forward charge transfer at least partly.
摘要翻译：一个采样和保持电路（10），包括一个输入端（12,14），一个或多个专用电容元件（16,20），一个或多个寄生电容元件（100,104,108），连接到所述一个或多个专用电容元件，输出（24,26），一组开关（56,58,60,62,64,66,80,82,84,86）和控制单元（112）。控制单元控制所述开关，以便按照循环方式将所述输入（12,14），所述一个或多个专用电容元件（16,18,20,22）和所述输出（24,26）互连一个采样保持周期，按照这个时间顺序包括一个观测阶段（t2-14），其中所述一个或多个专用电容元件与所述输出断开并连接到所述输入端，以便使所述专用电容元件被施加到所述输入处的输入电压（Vip），读出相位（t5-16），其中所述一个或多个专用电容元件与所述输入端断开并连接到所述输出端，以便提供输出电压（Vop），以及休眠阶段（t6-11），其中所述一个或多个专用电容元件与所述输入和所述输出两者断开连接，所述睡眠阶段涉及在所述电荷之间的正向电荷转移一个或多个dedica 以及所述一个或多个寄生电容元件，以及恢复阶段（t1-12），其中所述一个或多个专用电容元件与所述输入断开并连接到所述输出端，从而在所述第一电容元件之间产生反向电荷转移一个或多个专用电容元件和所述一个或多个寄生电容元件，所述反向电荷转移至少部分地抵消所述正向电荷转移。

9. 发明申请

WO2012056266A1 VOLTAGE SWITCHING CIRCUITRY, INTEGRATED DEVICE AND INTEGRATED CIRCUIT, AND METHOD OF VOLTAGE SWITCHING 审中-公开
标题翻译：电压开关电路，集成装置和集成电路以及电压开关方法
公开(公告)号：WO2012056266A1
公开(公告)日：2012-05-03
申请号：PCT/IB2010/003227
申请日：2010-10-27
申请人： FREESCALE SEMICONDUCTOR, INC. , ENJALBERT, Jerome , MALEYRAN, Marianne
发明人： ENJALBERT, Jerome , MALEYRAN, Marianne
IPC分类号： H03K17/10
CPC分类号： H03K17/102 , G05F3/02
摘要： A voltage switching circuitry comprises a switching arrangement (142) with a given number N of switches (MPsw1,MPsw2,MPsw3) in series between a first terminal (15) receiving a first voltage (VPP_ext) and a second terminal (16) receiving a second voltage (VREGJ-V). The first voltage level is higher than the second voltage level, and N is at least equal to 2. A voltage-by-N divider (40), having N-1 output taps, is arranged to divide the first voltage by N to a scaled down version of the first voltage having a voltage level (VPP1/3) below voltage max ratings of the switches. The N-1 output taps of the divider are arranged to respectively output N-1 third voltages having respective levels (VPP1/3,VPP2/3) staged below the first voltage level. N-1 max voltage generators (50,50a) generate N-1 fourth voltages (VMAX1/3,VMAX2/3), respectively equal to the maximum of the second voltage (VREGJ-V) and of each of the N-1 third voltages. A switch control unit (140) generates N control signals using the N-1 fourth voltages. These N control signals have respective voltage levels staged between the first voltage level and the second voltage level. In addition, each of the N control signals controls one of the switches of the switching arrangement (142), respectively.
摘要翻译：电压切换电路包括具有给定数量N个开关（MPsw1，MPsw2，MPsw3）的开关装置（142），串联连接在接收第一电压（VPP_ext）的第一端子（15）和接收第一电压第二电压（VREGJ-V）。第一电压电平高于第二电压电平，并且N至少等于2.具有N-1个输出抽头的逐电压N分压器（40）被布置成将第一电压除以N至具有低于开关电压最大额定值的电压电平（VPP1 / 3）的第一电压的缩小版本。分配器的N-1个输出抽头被布置成分别输出具有分级低于第一电压电平的各个电平（VPP1 / 3，VPP2 / 3）的N-1个第三电压。 N-1个最大电压发生器（50,50a）分别产生N-1个第四电压（VMAX1 / 3，VMAX2 / 3），分别等于第二电压（VREGJ-V）的最大值和N-1个第三电压电压。开关控制单元（140）使用N-1个第四电压产生N个控制信号。这些N个控制信号具有在第一电压电平和第二电压电平之间分级的相应电压电平。此外，N个控制信号中的每一个分别控制开关装置（142）的开关之一。

10. 发明申请

WO2009125256A1 POLY-RESISTOR, AND LINEAR AMPLIFIER 审中-公开
标题翻译：聚电阻和线性放大器
公开(公告)号：WO2009125256A1
公开(公告)日：2009-10-15
申请号：PCT/IB2008/053125
申请日：2008-04-11
申请人： FREESCALE SEMICONDUCTOR, INC. , ENJALBERT, Jerome
发明人： ENJALBERT, Jerome
IPC分类号： H01L21/02 , H01C1/06 , H01L27/01 , H01L27/08
CPC分类号： H01C7/006 , H01L27/0802 , H01L28/20
摘要： The present invention provides a poly-resistor with an improved linearity. Majority charge carrier wells are provided under the poly- strips and are biased in such way that the non-linearity of the resistor is reduced. Further, when such poly-resistors are used in amplifier circuits, the gain of the amplifier remains constant against the poly- depletion effect.
摘要翻译：本发明提供一种具有改善线性度的多电阻器。大多数电荷载体阱被提供在聚合物条下面并被偏置以使得电阻器的非线性减小。此外，当在放大器电路中使用这种多电阻时，放大器的增益保持恒定的多消耗效应。

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