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    • 8. 发明授权
    • Method of improving the quality and efficiency of Iddq testing
    • 提高Iddq测试质量和效率的方法
    • US5914615A
    • 1999-06-22
    • US841175
    • 1997-04-29
    • Brian Chess
    • Brian Chess
    • G01R31/30G01R31/26
    • G01R31/3008G01R31/3004
    • A method of detecting defects within an integrated circuit. Iddq testing for defects within integrated circuits includes measuring the quiescent (Iddq) current conducted by power supply nodes of the integrated circuit which are connected to a power supply while controlling signal levels of a plurality of inputs to the integrated circuit. The method of this invention includes calculating an upper threshold Iddq value and a lower threshold Iddq value. The input nodes are driven to a predetermined combination of input voltages and a corresponding Iddq value is measured. It is determined whether the measured Iddq value is between the upper threshold Iddq value and the lower threshold Iddq value. Another embodiment of this invention includes the upper and lower threshold values being dependent on a measured mean value of Iddq for the integrated circuit.
    • 一种检测集成电路中的缺陷的方法。 集成电路中的缺陷的Iddq测试包括测量在集成电路的电源节点传导的静态(Iddq)电流,其连接到电源,同时控制到集成电路的多个输入的信号电平。 本发明的方法包括计算上限阈值Iddq值和较低阈值Iddq值。 将输入节点驱动到输入电压的预定组合,并测量相应的Iddq值。 确定测量的Iddq值是否在上限阈值Iddq值和较低阈值Iddq值之间。 本发明的另一实施例包括上和下阈值取决于集成电路的Iddq的测量平均值。