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    • 1. 发明申请
    • SEMICONDUCTOR MEMORY DEVICE CAPABLE OF PERFORMING PAGE MODE OPERATION
    • 可执行页面模式操作的半导体存储器件
    • US20090086566A1
    • 2009-04-02
    • US12328099
    • 2008-12-04
    • Eun-Suk KANGSo-Hoe KIM
    • Eun-Suk KANGSo-Hoe KIM
    • G11C8/18
    • G11C8/04G11C7/1018G11C8/18
    • A semiconductor memory device adapted to perform a page mode operation comprises a first address transition detector adapted generate a first clock signal upon detecting a transition of a start address, a second address transition detector adapted to generate a second clock signal upon detecting transition of a lower bit of the start address and after the first clock signal is generated, and an address controller adapted to sequentially increment the start address in response to a transition of the second clock signal. The address controller sequentially accesses memory cells selected by the start address and the incremented start address in response to a transition of the second clock signal.
    • 适于执行页面模式操作的半导体存储器件包括:第一地址转换检测器,其适于在检测到起始地址的转变时产生第一时钟信号;第二地址转换检测器,适于在检测到较低的转换时产生第二时钟信号 并且在产生第一时钟信号之后,以及地址控制器,其适于响应于第二时钟信号的转变而顺序地增加开始地址。 地址控制器响应于第二时钟信号的转变,顺序地访问由起始地址和增加的开始地址选择的存储器单元。