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1. 发明授权

US06281573B1 Thermal enhancement approach using solder compositions in the liquid state 失效
标题翻译：使用焊料组合物处于液态的热增强方法
公开(公告)号：US06281573B1
公开(公告)日：2001-08-28
申请号：US09052296
申请日：1998-03-31
申请人： Eugene R. Atwood , Joseph A. Benenati , Giulio DiGiacomo , Horatio Quinones
发明人： Eugene R. Atwood , Joseph A. Benenati , Giulio DiGiacomo , Horatio Quinones
IPC分类号： H05K720
CPC分类号： H01L23/3675 , H01L23/3736 , H01L23/4275 , H01L2224/16225 , H01L2224/32225 , H01L2224/32245 , H01L2224/73204 , H01L2224/73253 , H01L2924/00013 , H01L2924/01322 , H01L2924/01327 , H01L2924/09701 , H01L2924/15311 , H01L2924/16251 , H01L2924/00 , H01L2224/29099
摘要： Solder compositions are introduced to interface between an IC chip and its associated heat exchanger cover. The solder compositions have a solidus-liquidus temperature range that encompasses the IC chip operational temperature range. The solder composition has the desired property of absorbing and rejecting heat energy by changing state or phase with each temperature rise and decline that result from temperature fluctuations associated with the thermal cycles of the integrated circuit chips. A path for high thermal conduction (low thermal resistance) from the IC chip to the heat exchanger to the ambient air is provided by an electronic module cover, configured as a cap with a heat exchanger formed or attached as a single construction, and made of the same material as the substrate, or made with materials of compatible thermal coefficients of expansion to mitigate the effects of vertical displacement during thermal cycling. The cap-heat exchanger cover is constructed to be compliant, and to contact both the IC chip and substrate.
摘要翻译：引入焊料组合物到IC芯片与其相关联的热交换器盖之间的界面。焊料组合物具有包含IC芯片工作温度范围的固相线 - 液相线温度范围。焊料组合物具有通过随着每个温度升高改变状态或相位而吸收和排除热能的性能，并且由与集成电路芯片的热循环相关的温度波动导致的下降。通过电子模块盖提供从IC芯片到热交换器到周围空气的高热传导（低热阻）的路径，该电子模块盖被构造为具有形成或附接为单个结构的热交换器的盖，并且由与基材相同的材料，或由具有相容的热膨胀系数的材料制成，以减轻热循环期间垂直位移的影响。盖 - 热交换器盖被构造成柔性，并且与IC芯片和基板接触。

2. 发明授权

US06656770B2 Thermal enhancement approach using solder compositions in the liquid state 失效
标题翻译：使用焊料组合物处于液态的热增强方法
公开(公告)号：US06656770B2
公开(公告)日：2003-12-02
申请号：US09874826
申请日：2001-06-05
申请人： Eugene R. Atwood , Joseph A. Benenati , Giulio DiGiacomo , Horatio Quinones
发明人： Eugene R. Atwood , Joseph A. Benenati , Giulio DiGiacomo , Horatio Quinones
IPC分类号： H01L2144
CPC分类号： H01L23/3675 , H01L23/3736 , H01L23/4275 , H01L2224/16225 , H01L2224/32225 , H01L2224/32245 , H01L2224/73204 , H01L2224/73253 , H01L2924/00013 , H01L2924/01322 , H01L2924/01327 , H01L2924/09701 , H01L2924/15311 , H01L2924/16251 , H01L2924/00 , H01L2224/29099
摘要： Solder compositions are introduced to interface between an IC chip and its associated heat exchanger cover. The solder compositions have a solidus-liquidus temperature range that encompasses the IC chip operational temperature range. The solder composition has the desired property of absorbing and rejecting heat energy by changing state or phase with each temperature rise and decline that result from temperature fluctuations associated with the thermal cycles of the integrated circuit chips. The electronic module cover is a cap with a heat exchanger formed or attached as a single construction, and made of the same material as the substrate, or made with materials of compatible thermal coefficients of expansion to mitigate the effects of vertical displacement during thermal cycling. The cap-heat exchanger cover is constructed to be compliant, and to contact both the IC chip and substrate in order to provide, in conjunction with the solder composition, a path of high thermal conduction (low thermal resistance) from the IC chip to the heat exchanger to the ambient air.
摘要翻译：引入焊料组合物到IC芯片与其相关联的热交换器盖之间的界面。焊料组合物具有包含IC芯片工作温度范围的固相线 - 液相线温度范围。焊料组合物具有通过由于与集成电路芯片的热循环相关的温度波动而导致的每个温度升高和降低而改变状态或相位而吸收和排除热能的所需性质。电子模块盖是具有热量的盖交换器形成或附接为单个结构，并且由与基底相同的材料制成，或由具有相容的热膨胀系数的材料制成，以减轻热循环期间垂直位移的影响。盖 - 热交换器盖被构造成柔性，并且与IC芯片和基板接触以便与焊料组合物一起提供从IC芯片到高导热（低热阻）的路径热交换器到周围空气。

3. 发明授权

US5805430A Zero force heat sink 失效
公开(公告)号：US5805430A
公开(公告)日：1998-09-08
申请号：US687103
申请日：1996-07-22
申请人： Eugene R. Atwood , Joseph A. Benenati , James J. Dankelman , Horatio Quinones , Karl J. Puttlitz , Eric J. Kastberg
发明人： Eugene R. Atwood , Joseph A. Benenati , James J. Dankelman , Horatio Quinones , Karl J. Puttlitz , Eric J. Kastberg
IPC分类号： H01L23/40 , H02B1/01 , H02B7/20
CPC分类号： H01L23/4006 , H01L2224/16225 , H01L2924/09701
摘要： A heat sink is placed in a heat transfer relationship with a substrate such as an integrated chip, chip carrier, or other electronic package, without imparting stressful forces to the substrate by connecting the heat sink to a frame which is connected to a support such as a printed circuit board or other suitable carrier on which the substrate is positioned. The heat sink extends through an aperture in the frame and is in heat transfer relationship with a surface of the substrate; however, it is mechanically decoupled from the substrate. The invention has particular application in thermally connecting large heat sinks to substrates that are surface mounted on the support using technologies such as ceramic ball or column grid arrays, plastic ball or column grid arrays, or solder balls or columns. In order to provide intimate contact between the substrate and the heat sink, the heat sink must be depressed coaxially through the aperture of the frame against a surface of the substrate and then secured by, for example, gluing while in contact with the surface. However, this downward force imparted by the heat sink is quickly reduced via relaxation of the lead/tin or other metallic elements of the surface mount. A heat sink in a heat transfer relationship with a substrate such as an integrated chip, chip carrier, or other electronic package. The heat sink is connected to a frame which is connected to a printed circuit board or other suitable support on which the substrate is positioned. The heat sink, which extends through an aperture in the frame is coupled to a surface of the substrate. The heat sink is mechanically decoupled from the substrate. Large heat sinks may be thermally connected to surface mount substrates mounted using technologies such as ceramic ball or column grid arrays, plastic ball or column grid arrays, or solder balls or columns. The heat sink is attached coaxially through the aperture to the substrate. After assembly and lead/tin or other metallic surface mount interconnects are relaxed such that the substrate and is completely supported by the frame and the heat sink imparts zero or nearly zero downward force. Because the heat sink moves freely within the aperture during assembly, the heat sink package is useful for a variety of different substrates. Preferably, the frame is a plate and a plurality of studs. The plate material are selected to match the thermal expansion of the underlying support, and the stud material matches the thermal expansion of the substrate. Thus the frame construction allows matching expansion and contraction of the assembly to the underlying substrate and support.

4. 发明授权

US06212070B1 Zero force heat sink 失效
标题翻译：零力散热器
公开(公告)号：US06212070B1
公开(公告)日：2001-04-03
申请号：US09071897
申请日：1998-05-05
申请人： Eugene R. Atwood , Joseph A. Benenati , James J. Dankelman , Horatio Quinones , Karl J. Puttlitz , Eric J. Kastberg
发明人： Eugene R. Atwood , Joseph A. Benenati , James J. Dankelman , Horatio Quinones , Karl J. Puttlitz , Eric J. Kastberg
IPC分类号： H05K720
CPC分类号： H01L23/4006 , H01L2224/16225 , H01L2924/09701
摘要： A heat sink in a heat transfer relationship with a substrate such as an integrated chip, chip carrier, or other electronic package. The heat sink is connected to a frame which is connected to a printed circuit board or other suitable support on which the substrate is positioned. The heat sink, which extends through an aperture in the frame is coupled to a surface of the substrate. The heat sink is mechanically decoupled from the substrate. Large heat sinks may be thermally connected to surface mount substrates mounted using technologies such as ceramic ball or column grid arrays, plastic ball or column grid arrays, or solder balls or columns. The heat sink is attached coaxially through the aperture to the substrate. After assembly and lead/tin or other metallic surface mount interconnects are relaxed such that the substrate and is completely supported by the frame and the heat sink imparts zero or nearly zero downward force. Because the heat sink moves freely within the aperture during assembly, the heat sink package is useful for a variety of different substrates. Preferably, the frame is a plate and a plurality of studs. The plate material are selected to match the thermal expansion of the underlying support, and the stud material matched the thermal expansion of the substrate. Thus, the frame construction allows matching expansion and contraction of the assembly to the underlying substrate and support.
摘要翻译：与诸如集成芯片，芯片载体或其它电子封装的衬底的热传递关系的散热器。散热器连接到框架，该框架连接到印刷电路板或其上放置基板的其它合适的支撑件。延伸穿过框架中的孔的散热器耦合到衬底的表面。散热器与基板机械分离。大型散热器可以热连接到使用诸如陶瓷球或列网格阵列，塑料球或列网格阵列或焊球或列的技术安装的表面安装基板。散热器同轴地穿过孔径连接到基板。组装之后，铅/锡或其他金属表面贴装互连件松弛，使得基板并被框架和散热器完全支撑，使零或接近零的向下的力。因为散热器在组装期间在孔内自由移动，所以散热器封装对于各种不同的衬底是有用的。优选地，框架是板和多个螺柱。选择板材以匹配下面的支撑件的热膨胀，并且螺柱材料与基板的热膨胀相匹配。因此，框架结构允许将组件的膨胀和收缩与下面的衬底和支撑件相匹配。

5. 发明授权

US5790384A Bare die multiple dies for direct attach 失效
标题翻译：裸死模具直接连接
公开(公告)号：US5790384A
公开(公告)日：1998-08-04
申请号：US883112
申请日：1997-06-26
申请人： Umar M. Ahmad , Eugene R. Atwood
发明人： Umar M. Ahmad , Eugene R. Atwood
IPC分类号： H01L23/498 , H01L25/065 , H01L25/18 , H05K1/00 , H01L25/00
CPC分类号： H01L23/49827 , H01L25/0652 , H01L25/18 , H01L2224/05553 , H01L2224/16145 , H01L2224/16225 , H01L2224/49175 , H01L2224/73253 , H01L2224/8592 , H01L24/48 , H01L24/49 , H01L2924/00014 , H01L2924/15311 , H01L2924/181
摘要： A chip package includes a substrate formed from a first die and its attendant wiring interconnections, having a first thermal coefficient of expansion. The first die includes primary input/output (I/O) interconnections for the chip package. Also provided is a second die that includes escape wiring formed on that die and coupled to the primary I/O interconnections through the first die. The second die has a second thermal coefficient of expansion similar to the first thermal coefficient of expansion. The chip package also includes connectors that couple the primary I/O interconnections of the first die to a second level package. An interposer may be provided to couple the primary I/O interconnections to the second level package. The second die is smaller than the first die. The peripheral area of the first die is left exposed when the second die is coupled to the first die so that sufficient I/O interconnections may be formed for the primary I/O interconnections on the first die. The second die provides and receives signals which may include the second die's primary I/O to and from the first die. Wiring may be shared between the first die and the second die in a manner optimal for design and manufacturing.
摘要翻译：芯片封装包括具有第一热膨胀系数的由第一裸片形成的衬底及其伴随的布线互连。第一个裸片包括芯片封装的主输入/输出（I / O）互连。还提供了第二管芯，其包括形成在管芯上并通过第一管芯耦合到主I / O互连的逃生引线。第二模具具有类似于第一热膨胀系数的第二热膨胀系数。芯片封装还包括将第一裸片的主I / O互连耦合到第二级封装的连接器。可以提供插入器以将主I / O互连耦合到第二级封装。第二个模具小于第一个模具。当第二管芯耦合到第一管芯时，第一管芯的外围区域被暴露，使得可以为第一管芯上的主I / O互连形成足够的I / O互连。第二管芯提供和接收信号，该信号可以包括第二管芯的第一管芯的主要I / O和/或从第一管芯的主要I / O。可以以优化设计和制造的方式在第一模具和第二模具之间共享接线。

6. 发明授权

US6147506A Wafer test fixture using a biasing bladder and methodology 失效
标题翻译：晶圆测试夹具使用偏压膀胱和方法
公开(公告)号：US6147506A
公开(公告)日：2000-11-14
申请号：US841012
申请日：1997-04-29
申请人： Umar M. U. Ahmad , Eugene R. Atwood
发明人： Umar M. U. Ahmad , Eugene R. Atwood
IPC分类号： G01R31/28 , G01R31/02
CPC分类号： G01R31/2851 , G01R31/2831
摘要： A wafer test and burn-in fixture and methodology including a wafer probe having flexible tabs and a load board coupled to the wafer probe using the flexible tabs. The fixture also includes a bladder which biases the wafer probe to contact a wafer. A temperature control apparatus is provided to control the temperature of the wafer probe and the wafer. Tests are performed on the wafer using built-in self tests or wrap wiring tests.
摘要翻译：晶片测试和老化固定装置和方法，包括具有柔性突出部的晶片探针和使用柔性突出部耦合到晶片探针的负载板。该固定装置还包括一个使晶片探针偏压接触晶片的气囊。提供温度控制装置来控制晶片探针和晶片的温度。使用内置自检或包装接线测试在晶圆上进行测试。

7. 发明授权

US5818984A Optoelectronic interconnection of integrated circuits 失效
标题翻译：集成电路的光电互连
公开(公告)号：US5818984A
公开(公告)日：1998-10-06
申请号：US751603
申请日：1996-11-18
申请人： Umar M. Ahmad , Eugene R. Atwood
发明人： Umar M. Ahmad , Eugene R. Atwood
IPC分类号： H04B10/10 , G02B6/43 , H01L25/065 , H04B10/00 , H04B10/105 , H04B10/22 , G02B6/12 , H01L27/15
CPC分类号： G02B6/43 , H01L25/0655 , H04B10/803 , H01L2924/0002
摘要： A microelectronic module comprising at least two chips mounted to a chip receiving surface. Each chip having an edge including at least one chip input and one chip output. The chips are arranged such that the edge of one chip is opposite the edge of the other chip. The chips are spaced apart by a predetermined distance. Each chip includes at least one optical transmitter attached to the edge of the chip. The transmitter has an input coupled to the chip output and a transmission portion for generating optical signals at a predetermined angle and that are representative of signals inputted to the transmitter input. The microelectronic module further includes at least one optical receiver attached to the edge of the chip. The optical receiver has an output coupled to the chip input and a receiving portion for directly receiving optical signals generated by a corresponding optical transmitter of the other chip. The optical receiver and the corresponding optical transmitter form a transmitter/receiver pair. The predetermined distance and the predetermined angle prevent overlapping of the optical signals of the transmitter/receiver pairs.
摘要翻译：一种微电子模块，包括安装到芯片接收表面的至少两个芯片。每个芯片具有包括至少一个芯片输入和一个芯片输出的边缘。芯片布置成使得一个芯片的边缘与另一个芯片的边缘相对。芯片间隔开预定距离。每个芯片包括附接到芯片边缘的至少一个光发射器。发射机具有耦合到芯片输出的输入和用于以预定角度产生光信号并且代表输入到发射机输入的信号的传输部分。微电子模块还包括附接到芯片的边缘的至少一个光学接收器。光接收器具有耦合到芯片输入的输出端和用于直接接收由另一芯片的相应光发射机产生的光信号的接收部分。光接收机和对应的光发射机形成发射机/接收机对。预定距离和预定角度防止了发射机/接收机对的光信号的重叠。

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