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1. 发明授权

US5831920A GMR device having a sense amplifier protected by a circuit for dissipating electric charges 失效
标题翻译： GMR器件具有由用于耗散电荷的电路保护的读出放大器
公开(公告)号：US5831920A
公开(公告)日：1998-11-03
申请号：US949605
申请日：1997-10-14
申请人： Eugene Chen , Saied N. Tehrani , Mark Durlam , Peter K. Naji
发明人： Eugene Chen , Saied N. Tehrani , Mark Durlam , Peter K. Naji
IPC分类号： G11C11/16 , G11C7/00
CPC分类号： G11C11/16
摘要： A new and improved magnetic device is provided for memories and sensors. A magnetic random access memory (MRAM) device (20) includes a storage element (21) for magnetically storing states and an amplifier (25) for sensing the states stored in the storage element. A circuit (27) for dissipating electrical charges are coupled to inputs (23,24) of the amplifier (25) to discharge electrical charges applied to the inputs (23,24) of the amplifier (25). The charge dissipating circuit (27) includes junctions (271-274) which are typically connected in series between power (255) and common (257) lines. Electric charges applied to the inputs (23,24) of the amplifier (25) is discharged through the junctions (271-274).
摘要翻译：为存储器和传感器提供了一种新的改进的磁性器件。磁性随机存取存储器（MRAM）装置（20）包括用于磁存储状态的存储元件（21）和用于感测存储在存储元件中的状态的放大器（25）。用于耗散电荷的电路（27）耦合到放大器（25）的输入（23,24），以放电施加到放大器（25）的输入端（23,24）的电荷。电荷消耗电路（27）包括通常在功率（255）和公共（257）线之间串联连接的结（271-274）。施加到放大器（25）的输入端（23,24）的电荷通过接点（271-274）放电。

2. 发明授权

US5861328A Method of fabricating GMR devices 失效
标题翻译：制造GMR器件的方法
公开(公告)号：US5861328A
公开(公告)日：1999-01-19
申请号：US723438
申请日：1996-10-07
申请人： Saied N. Tehrani , Eugene Chen , Mark Durlam , Xiaodong T. Zhu , Clarence J. Tracy
发明人： Saied N. Tehrani , Eugene Chen , Mark Durlam , Xiaodong T. Zhu , Clarence J. Tracy
IPC分类号： H01L27/06 , H01L43/12 , H01L21/8238
CPC分类号： H01L43/12 , H01L27/0688
摘要： A method of fabricating GMR devices on a CMOS substrate structure with a semiconductor device formed therein. The method includes forming a dielectric system with a planar surface having a roughness in a range of 1 .ANG. to 20 .ANG. RMS on the substrate; disposing and patterning films of giant magneto-resistive material on the planar surface so as to form a memory cell; disposing a dielectric cap on the cell so as to seal the cell and provide a barrier to subsequent operations; forming vias through the dielectric cap and the dielectric system to interconnects of the semiconductor device; forming vias through the dielectric cap to the magnetic memory cell; and depositing a metal system through the vias to the interconnects and to the memory cell.
摘要翻译：一种在其上形成有半导体器件的CMOS衬底结构上制造GMR器件的方法。该方法包括形成具有平坦表面的电介质系统，该平面表面在衬底上的粗糙度范围为1安培至20安培RMS; 在平坦表面上设置和构图巨磁阻材料的薄膜以形成记忆单元; 在电池上设置电介质盖，以密封电池并为后续操作提供屏障; 通过所述电介质盖和所述介电系统形成通孔以连接所述半导体器件; 通过介电盖形成通孔到磁存储单元; 以及通过所述通孔将金属系统沉积到所述互连件和所述存储器单元。

3. 发明授权

US5768183A Multi-layer magnetic memory cells with improved switching characteristics 失效
标题翻译：具有改进的开关特性的多层磁存储单元
公开(公告)号：US5768183A
公开(公告)日：1998-06-16
申请号：US723159
申请日：1996-09-25
申请人： Xiaodong T. Zhu , Saied N. Tehrani , Mark Durlam , Eugene Chen
发明人： Xiaodong T. Zhu , Saied N. Tehrani , Mark Durlam , Eugene Chen
IPC分类号： G11C11/15 , G11C11/56
CPC分类号： G11C11/5607 , G11C11/15 , G11C2211/5615
摘要： A plurality of layers of magnetic material are stacked in parallel, overlying relationship and separated by layers of non-magnetic material so as to form a multi-layer magnetic memory cell. The width of the cell is less than a width of magnetic domain walls within the magnetic layers so that magnetic vectors in the magnetic layers point along a length of the magnetic layers, and the ratio of the length to the width of the magnetic memory cell is in a range of 1.5 to 10. The magnetic layers are antiferromagnetically coupled when the ratio is less than 4 and ferromagnetically coupled when the ratio is greater than 4.
摘要翻译：多层磁性材料以平行的方式堆叠叠置，由非磁性材料层隔开，形成多层磁性存储单元。电池的宽度小于磁性层内的磁畴壁的宽度，使得磁性层中的磁矢量沿着磁性层的长度指向，并且磁性存储单元的长度与宽度的比率是在1.5至10的范围内。当该比率小于4时，磁性层反铁磁耦合，并且当该比率大于4时被磁化耦合。

4. 发明授权

US5699293A Method of operating a random access memory device having a plurality of pairs of memory cells as the memory device 失效
标题翻译：操作具有多对存储单元的随机存取存储器件作为存储器件的方法
公开(公告)号：US5699293A
公开(公告)日：1997-12-16
申请号：US728023
申请日：1996-10-09
申请人： Saied N. Tehrani , Xiaodong T. Zhu , Eugene Chen , Mark Durlam
发明人： Saied N. Tehrani , Xiaodong T. Zhu , Eugene Chen , Mark Durlam
IPC分类号： G11C11/15 , G11C11/16 , G11C11/00
CPC分类号： G11C11/15 , G11C11/16
摘要： A magnetic random access memory device (10) has a plurality of pairs of memory cells (21a,21b), a column decoder (31), a row decoder (32), and a comparator (60). The pair of memory cells (21a,21b) is designated by column decoder (31) and row decoder (32) in response to a memory address. Complementary bits ("0" and "1") are stored in the pair of memory cells (21a,21b). When the state in the pair of memory cell (21a,21b) is read, both bits in the pair of memory cells (21a,21b) are compared to produce an output at one read cycle time to a bit line (70). This memory device omits a conventional auto-zeroing step so that a high speed MRAM device can be attained.
摘要翻译：磁性随机存取存储器件（10）具有多对存储单元（21a，21b），列解码器（31），行解码器（32）和比较器（60）。响应于存储器地址，由列解码器（31）和行解码器（32）指定该对存储单元（21a，21b）。互补位（“0”和“1”）存储在一对存储单元（21a，21b）中。当读出该对存储单元（21a，21b）中的状态时，将该对存储单元（21a，21b）中的两个位进行比较，以在一个读周期时间向位线（70）产生输出。该存储器件省略了常规的自动归零步骤，从而可以获得高速MRAM器件。

5. 发明授权

US06174737B1 Magnetic random access memory and fabricating method thereof 有权
标题翻译：磁性随机存取存储器及其制造方法
公开(公告)号：US06174737B1
公开(公告)日：2001-01-16
申请号：US09339460
申请日：1999-06-24
申请人： Mark Durlam , Gloria Kerszykowski , Jon Slaughter , Theodore Zhu , Eugene Chen , Saied N. Tehrani , Kelly W. Kyler
发明人： Mark Durlam , Gloria Kerszykowski , Jon Slaughter , Theodore Zhu , Eugene Chen , Saied N. Tehrani , Kelly W. Kyler
IPC分类号： H01L2100
CPC分类号： H01L27/228 , B82Y10/00 , G11C11/15 , H01L27/224
摘要： An improved and novel MRAM device with magnetic memory elements and circuitry for controlling magnetic memory elements is provided. The circuitry, for example, transistor (12a) having a gate (17a), a drain (18) and a source (16a) is integrated on a substrate (11) and coupled to a magnetic memory element (43) on the circuitry through a plug conductor (19a) and a conductor line (45). The circuitry is fabricated first under the CMOS process and then magnetic memory elements (43, 44). Digit line (29) and bit line (48) are placed under and on top of magnetic memory element (43), respectively, and enabled to access magnetic memory element (43). These lines are enclosed by a high permeability layer (31, 56, 58) excluding a surface facing magnetic memory element (43), which shields and focuses a magnetic field toward magnetic memory element (43).
摘要翻译：提供了一种具有磁存储器元件和用于控制磁存储元件的电路的改进和新颖的MRAM器件。电路，例如具有栅极（17a），漏极（18）和源极（16a）的晶体管（12a）集成在衬底（11）上并且耦合到电路上的磁存储元件（43），通过插头导体（19a）和导线（45）。首先在CMOS工艺之下制造电路，然后制造磁存储元件（43,44）。数字线（29）和位线（48）分别放置在磁存储元件（43）的下面和顶部，并且能够访问磁存储元件（43）。这些线被除了面向磁性存储元件（43）的高磁导率层（31,56,58）包围，磁性层屏蔽并将磁场聚焦到磁性存储元件（43）。

6. 发明授权

US5940319A Magnetic random access memory and fabricating method thereof 有权
标题翻译：磁性随机存取存储器及其制造方法
公开(公告)号：US5940319A
公开(公告)日：1999-08-17
申请号：US144686
申请日：1998-08-31
申请人： Mark Durlam , Gloria Kerszykowski , Jon Slaughter , Theodore Zhu , Eugene Chen , Saied N. Tehrani , Kelly W. Kyler
发明人： Mark Durlam , Gloria Kerszykowski , Jon Slaughter , Theodore Zhu , Eugene Chen , Saied N. Tehrani , Kelly W. Kyler
IPC分类号： G11C11/15 , H01L21/8246 , H01L27/22 , G11C11/14
CPC分类号： H01L27/228 , B82Y10/00 , G11C11/15 , H01L27/224
摘要： An improved and novel MRAM device with magnetic memory elements and circuitry for controlling magnetic memory elements is provided. The circuitry, for example, transistor (12a) having a gate (17a), a drain (18) and a source (16a) is integrated on a substrate (11) and coupled to a magnetic memory element (43) on the circuitry through a plug conductor (19a) and a conductor line (45). The circuitry is fabricated first under the CMOS process and then magnetic memory elements (43, 44). Digit line (29) and bit line (48) are placed under and on top of magnetic memory element (43), respectively, and enabled to access magnetic memory element (43). These lines are enclosed by a high permeability layer (31, 56, 58) excluding a surface facing magnetic memory element (43), which shields and focuses a magnetic field toward magnetic memory element (43).
摘要翻译：提供了一种具有磁存储器元件和用于控制磁存储元件的电路的改进和新颖的MRAM器件。电路，例如具有栅极（17a），漏极（18）和源极（16a）的晶体管（12a）集成在衬底（11）上并且耦合到电路上的磁存储元件（43），通过插头导体（19a）和导线（45）。首先在CMOS工艺之下制造电路，然后制造磁存储元件（43,44）。数字线（29）和位线（48）分别放置在磁存储元件（43）的下面和顶部，并且能够访问磁存储元件（43）。这些线被除了面向磁性存储元件（43）的高磁导率层（31,56,58）包围，磁性层屏蔽并将磁场聚焦到磁性存储元件（43）。

7. 发明授权

US5838607A Spin polarized apparatus 失效
标题翻译：旋转极化装置
公开(公告)号：US5838607A
公开(公告)日：1998-11-17
申请号：US723162
申请日：1996-09-25
申请人： Xiaodong T. Zhu , Saied N. Tehrani , Eugene Chen , Mark Durlam
发明人： Xiaodong T. Zhu , Saied N. Tehrani , Eugene Chen , Mark Durlam
IPC分类号： G11C11/16 , G11C11/56 , H01F10/32 , G11C11/00 , H01L29/161
CPC分类号： B82Y25/00 , G11C11/16 , G11C11/5607 , H01F10/324
摘要： Spin polarized apparatus includes a spin polarizing section of magnetic material with an electron input port and a polarized electron port and a transport section of magnetic material with a polarized electron input port electrically coupled to the polarized electron port of the polarizing section and an electron output port. Electrons traversing the polarizing section all have similar spin directions at the output dependent upon the magnetization direction of the polarizing section. Electrons traversing the transport section all have spins in a first direction at the output. The cell has a low resistance when the magnetization direction of the polarizing section is in the first direction (electrons entering the transport section all have spins in the first direction) and a high resistance when the magnetization direction is in an opposite direction (electrons entering the transport section all have spins in the opposite direction).
摘要翻译：旋转极化装置包括具有电子输入端口和偏振电子端口的磁性材料的自旋极化部分和具有电耦合到偏振部分的偏振电子端口的偏振电子输入端口的磁性材料的传送部分和电子输出端口。穿过偏振部分的电子根据偏振部分的磁化方向在输出处都具有相似的自旋方向。穿过传送部分的电子都在输出端处沿着第一方向旋转。当偏振片的磁化方向处于第一方向（进入输送部分的电子全部在第一方向上具有自旋）时，电池具有低电阻，当磁化方向为相反方向（电子进入运输部分都沿相反方向旋转）。

8. 发明授权

US5959880A Low aspect ratio magnetoresistive tunneling junction 失效
标题翻译：低纵横比磁阻隧道结
公开(公告)号：US5959880A
公开(公告)日：1999-09-28
申请号：US993996
申请日：1997-12-18
申请人： Jing Shi , Theodore Zhu , Saied N. Tehrani , Eugene Chen , Mark Durlam
发明人： Jing Shi , Theodore Zhu , Saied N. Tehrani , Eugene Chen , Mark Durlam
IPC分类号： G11C11/15 , G11C11/16 , G11C11/56 , G11C11/00
CPC分类号： G11C11/5607 , G11C11/15 , G11C11/16 , G11C2211/5615
摘要： A low aspect ratio magnetoresistive tunneling junction memory cell includes two layers of magnetoresistive material separated by electrically insulating material so as to form a magnetoresistive tunneling junction. An exchange interaction layer is sandwiched between one layer of the junction and a third layer of magnetoresistive material so as to pin the magnetic vector of one layer of the junction anti-parallel to a magnetic vector in the third layer so that magnetostatic interaction between the junction layers is canceled and the magnetic vector of the one layer is free to move in either of the two directions parallel to the polarization axis. Antiferromagnetic material is positioned adjacent the third layer so as to fix the magnetic vector in the third layer uni-directionally parallel to the polarization axis.
摘要翻译：低纵横比磁阻隧穿结存储单元包括由电绝缘材料分开的两层磁阻材料，以形成磁阻隧道结。交换相互作用层夹在一层结和第三层磁阻材料之间，以便将一层结的磁矢量与第三层中的磁矢量平行地平行，从而使连接点之间的静磁相互作用层被取消，并且一层的磁矢量在平行于偏振轴的两个方向中的任一方向上自由移动。反铁磁材料位于第三层附近，以将磁矢量固定在与偏振轴方向平行的第三层中。

9. 发明授权

US5902690A Stray magnetic shielding for a non-volatile MRAM 失效
标题翻译：杂散磁屏蔽用于非挥发性MRAM
公开(公告)号：US5902690A
公开(公告)日：1999-05-11
申请号：US806275
申请日：1997-02-25
申请人： Clarence J. Tracy , Eugene Chen , Mark Durlam , Theodore Zhu , Saied N. Tehrani
发明人： Clarence J. Tracy , Eugene Chen , Mark Durlam , Theodore Zhu , Saied N. Tehrani
IPC分类号： G11C11/15 , H01L27/22 , B32B9/00
CPC分类号： H01L27/228 , G11C11/15 , Y10S977/838 , Y10T428/1164
摘要： A non-volatile magneto-resistive memory positioned on a semiconductor substrate is shielded from stray magnetic fields by a passivation layer partially or completely surrounding the non-volatile magneto-resistive memory. The passivation layer includes non-conductive ferrite materials, such as Mn--Zn-Ferrite, Ni--Zn-Ferrite, MnFeO, CuFeO, FeO, or NiFeO, for shielding the non-volatile magneto-resistive memory from stray magnetic fields. The non-conductive ferrite materials may also be in the form of a layer which focuses internally generated magnetic fields on the non-volatile magneto-resistive memory to reduce power requirements.
摘要翻译：定位在半导体衬底上的非易失性磁阻存储器通过部分或完全围绕非易失性磁阻存储器的钝化层与杂散磁场屏蔽。钝化层包括非导电铁氧体材料，例如Mn-Zn-铁素体，Ni-Zn-铁素体，MnFeO，CuFeO，FeO或NiFeO，用于屏蔽非易失性磁阻存储器与杂散磁场。非导电铁氧体材料也可以是将内部产生的磁场聚焦在非易失性磁阻存储器上以降低功率需求的层的形式。

10. 发明授权

US5703805A Method for detecting information stored in a MRAM cell having two magnetic layers in different thicknesses 失效
标题翻译：用于检测存储在具有不同厚度的两个磁性层的MRAM单元中的信息的方法
公开(公告)号：US5703805A
公开(公告)日：1997-12-30
申请号：US646897
申请日：1996-05-08
申请人： Saied N. Tehrani , Eugene Chen , Mark Durlam , Xiaodong T. Zhu
发明人： Saied N. Tehrani , Eugene Chen , Mark Durlam , Xiaodong T. Zhu
IPC分类号： G11C11/15 , G11C11/56 , H01L21/8246 , H01L27/105 , H01L43/08
CPC分类号： G11C11/5607 , G11C2211/5616
摘要： A method for detecting and storing four states contained in a MRAM cell having two layers (11,13) which have different thicknesses is provided. A first magnetic field is applied to the MRAM cell, which causes a magnetoresistive change in the MRAM cell. A first and second states are detected based on the magnetoresistive change. A second magnetic field is further applied to the MRAM cell. A third and fourth states are detected based on the magnetoresistive change due to the second magnetic field.
摘要翻译：提供了一种用于检测和存储包含在具有不同厚度的两层（11,13）的MRAM单元中的四种状态的方法。第一磁场被施加到MRAM单元，这导致MRAM单元中的磁阻变化。基于磁阻变化来检测第一和第二状态。第二磁场进一步应用于MRAM单元。基于由第二磁场引起的磁阻变化来检测第三和第四状态。

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