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1. 发明申请

US20060107027A1 General purpose micro-coded accelerator 审中-公开
标题翻译：通用微码加速器
公开(公告)号：US20060107027A1
公开(公告)日：2006-05-18
申请号：US10987327
申请日：2004-11-12
申请人： Inching Chen , Ernest Tsui
发明人： Inching Chen , Ernest Tsui
IPC分类号： G06F9/30
CPC分类号： G06F15/7867 , Y02D10/12 , Y02D10/13
摘要： A micro-coded accelerator may comprise multiple programmable control units, multiple special function units, a cross-bar switch to connect any of the control units to any one or more of the special function units, and a global memory to facilitate processing by these units. Each control unit may have an array of programmable logic arrays (ARPLAs), each of which may be configured in various ways, a local memory, and a switch circuit to enable the components of the control unit to perform various operations. By configuring the ARPLAs, the control units' internal switch circuitry, and the cross-bar switch, the micro-coded accelerator may be dynamically reconfigured to perform multiple types of operations.
摘要翻译：微编码加速器可以包括多个可编程控制单元，多个特殊功能单元，将任何控制单元连接到任何一个或多个特殊功能单元的交叉开关，以及一个全局存储器，以便于这些单元进行处理。每个控制单元可以具有可编程逻辑阵列（ARPLA）阵列，每个可编程逻辑阵列（ARPLA）可以以各种方式配置，本地存储器和开关电路，以使得控制单元的组件能够执行各种操作。通过配置ARPLA，控制单元的内部交换电路和交叉开关，可以动态地重新配置微编码加速器以执行多种类型的操作。

2. 发明申请

US20050262370A1 Processor timing apparatus, systems, and methods 有权
标题翻译：处理器计时装置，系统和方法
公开(公告)号：US20050262370A1
公开(公告)日：2005-11-24
申请号：US10848479
申请日：2004-05-18
申请人： Ernest Tsui , Inching Chen
发明人： Ernest Tsui , Inching Chen
IPC分类号： G06F1/26 , G06F1/32
CPC分类号： G06F1/3203
摘要： An apparatus and a system, as well as a method and article, may operate to independently adjust a plurality of processor clocks coupled to a corresponding plurality of networked processors responsive to one or more status indicators to provide scalable performance and power consumption.
摘要翻译：响应于一个或多个状态指示符，设备和系统以及方法和文章可以操作以独立地调整耦合到对应的多个联网处理器的多个处理器时钟，以提供可扩展的性能和功耗。

3. 发明申请

US20050232259A1 Method and apparatus for data routing 审中-公开
标题翻译：数据路由的方法和装置
公开(公告)号：US20050232259A1
公开(公告)日：2005-10-20
申请号：US10828134
申请日：2004-04-19
申请人： Inching Chen , Walter Snyder , Ernest Tsui
发明人： Inching Chen , Walter Snyder , Ernest Tsui
IPC分类号： H04L12/56
CPC分类号： H04L45/00 , H04L45/306 , H04L45/60 , H04W40/02
摘要： A method and apparatus for data routing is generally described. In accordance with one example embodiment of the invention, a method to read at least a portion of a data packet, the at least portion of a data packet including content to configure at least one dedicated route through at least one node of a plurality of interconnected nodes communicatively coupled by one or more communication links and selectively configuring the at least one dedicated route based, at least in part, on the content, to route data from a source to a destination.
摘要翻译：通常描述用于数据路由的方法和装置。根据本发明的一个示例实施例，一种读取数据分组的至少一部分的方法，所述数据分组的至少部分包括内容，以配置通过多个互连的至少一个节点的至少一个专用路由通过一个或多个通信链路通信耦合的节点，并且至少部分地基于所述内容选择性地配置所述至少一个专用路由，以将数据从源路由到目的地。

4. 发明授权

US07472306B2 Processor timing apparatus, systems, and methods 有权
标题翻译：处理器计时装置，系统和方法
公开(公告)号：US07472306B2
公开(公告)日：2008-12-30
申请号：US10848479
申请日：2004-05-18
申请人： Ernest Tsui , Inching Chen
发明人： Ernest Tsui , Inching Chen
IPC分类号： G06F1/10 , G06F1/12 , G06F1/32
CPC分类号： G06F1/3203
摘要： An apparatus and a system, as well as a method and article, may operate to independently adjust a plurality of processor clocks coupled to a corresponding plurality of networked processors responsive to one or more status indicators to provide scalable performance and power consumption. The status indicators may indicate the status of routers coupled to the processors. Additional apparatus, systems, and methods are disclosed.
摘要翻译：响应于一个或多个状态指示符，设备和系统以及方法和文章可以操作以独立地调整耦合到对应的多个联网处理器的多个处理器时钟，以提供可扩展的性能和功耗。状态指示器可以指示耦合到处理器的路由器的状态。公开了附加装置，系统和方法。

5. 发明申请

US20050193357A1 Allocation of combined or separate data and control planes 有权
标题翻译：组合或单独数据和控制平面的分配
公开(公告)号：US20050193357A1
公开(公告)日：2005-09-01
申请号：US10789187
申请日：2004-02-27
申请人： Hooman Honary , Inching Chen , Ernest Tsui
发明人： Hooman Honary , Inching Chen , Ernest Tsui
IPC分类号： G06F17/50 , H03K19/00
CPC分类号： G06F17/5045
摘要： A dual mesh interconnect network in a heterogeneous configurable circuit may be allocated between data communication and control communication.
摘要翻译：可以在数据通信和控制通信之间分配异构可配置电路中的双网状互连网络。

6. 发明申请

US20120076199A1 Adaptive data transmission rate control for a wireless display device 有权
标题翻译：无线显示设备的自适应数据传输速率控制
公开(公告)号：US20120076199A1
公开(公告)日：2012-03-29
申请号：US12924231
申请日：2010-09-23
申请人： Jie Gao , Xintian E. Lin , Inching Chen
发明人： Jie Gao , Xintian E. Lin , Inching Chen
IPC分类号： H04N5/38 , H04N7/12
CPC分类号： H04N19/146 , H04L65/4084 , H04L65/80 , H04N21/4122 , H04N21/4143 , H04N21/43637 , H04N21/4402 , H04N21/44227
摘要： A method, a computer readable medium and an apparatus to adaptively control a data transmission rate of a wireless display device. The method includes determining a current data transmission rate capacity of a wireless channel; and controlling a data transmission rate of a wireless transmission device based on the current data transmission rate capacity.
摘要翻译：一种方法，计算机可读介质和用于自适应地控制无线显示设备的数据传输速率的装置。该方法包括确定无线信道的当前数据传输速率容量; 以及基于当前数据传输速率容量来控制无线传输设备的数据传输速率。

7. 发明授权

US07436829B2 Methods and apparatus for reconfiguring packets to have varying sizes and latencies 失效
标题翻译：用于重配置数据包以具有不同大小和延迟的方法和装置
公开(公告)号：US07436829B2
公开(公告)日：2008-10-14
申请号：US10814096
申请日：2004-03-30
申请人： Inching Chen , Vicki W. Tsai
发明人： Inching Chen , Vicki W. Tsai
IPC分类号： H04L12/28 , H04L12/56 , H04J3/24
CPC分类号： H04L47/10 , H04L47/36 , H04L49/90 , H04L69/16 , H04L69/166
摘要： In various embodiments, a processing element (PE) includes a data router adaptor (DRA) and one or more elements that produce function packets. When the DRA receives a function packet, it generates a set of associated router packets. Each of the associated router packets includes a segment of the function packet, and has a router packet data length that is less than or equal to the function packet length. In one embodiment, the router packet data lengths are included in a table, and can be re-configured to alter system performance parameters (e.g., bandwidth usage and/or latency). The DRA sends the set of associated router packets to a router for delivery through a packet-based network. A destination DRA receives the set of associated router packets, and generates a re-assembled function packet from the set of associated router packets. The destination DRA sends the re-assembled function packet to a destination element.
摘要翻译：在各种实施例中，处理元件（PE）包括数据路由器适配器（DRA）和产生功能分组的一个或多个元件。当DRA收到功能分组时，会生成一组关联的路由器报文。每个相关联的路由器分组包括功能分组的一部分，并且具有小于或等于功能分组长度的路由器分组数据长度。在一个实施例中，路由器分组数据长度被包括在表中，并且可以被重新配置为改变系统性能参数（例如，带宽使用和/或等待时间）。 DRA将一组关联的路由器分组发送到路由器以通过基于分组的网络进行传送。目的地DRA接收一组相关联的路由器分组，并且从相关联的路由器分组集合生成重新组合的功能分组。目的地DRA将重新组合的功能分组发送到目的地元素。

8. 发明申请

US20080013495A1 RATE MATCHING APPARATUS, SYSTEMS, AND METHODS 失效
标题翻译：速率匹配装置，系统和方法
公开(公告)号：US20080013495A1
公开(公告)日：2008-01-17
申请号：US11776642
申请日：2007-07-12
申请人： Inching Chen , Anthony Chun
发明人： Inching Chen , Anthony Chun
IPC分类号： H04B7/216
CPC分类号： H04L1/0069 , H03M13/635 , H04L1/08
摘要： An apparatus and a system, as well as a method and article, may operate to include repeating first data to provide first repeated data and deleting second repeated data to provide second data according to a programmed standard included in a first apparatus and selected from a plurality of reprogrammable standards.
摘要翻译：装置和系统以及方法和物品可以操作以包括重复的第一数据以提供第一重复数据并删除第二重复数据以根据包括在第一装置中的编程标准提供第二数据，并从多个的可编程标准。

9. 发明授权

US07136987B2 Memory configuration apparatus, systems, and methods 失效
标题翻译：内存配置设备，系统和方法
公开(公告)号：US07136987B2
公开(公告)日：2006-11-14
申请号：US10815173
申请日：2004-03-30
申请人： Inching Chen
发明人： Inching Chen
IPC分类号： G06F12/00 , G06F9/34
CPC分类号： G06F12/04 , G06F12/0646 , Y02D10/13
摘要： An apparatus and a system, as well as a method and article, may operate to control a bandwidth of a memory coupled to a plurality of data processing units responsive to protocol indications, such as a number of data processing units in use. In some embodiments, apparatus and systems, as well as methods and articles, may operate to select a memory access group size of about 2N memory banks responsive to receiving an indication of a change in a protocol type, wherein the group is selected from a number B of banks, and N is associated with the protocol type.
摘要翻译：装置和系统以及方法和文章可以操作以响应于诸如使用的数据处理单元的协议指示来控制耦合到多个数据处理单元的存储器的带宽。在一些实施例中，装置和系统以及方法和物品可以操作以响应于接收到协议类型的变化的指示来选择大约2个N个存储体的存储器存取组大小，其中所述组是从数量B的组中选择的，并且N与所述协议类型相关联。

10. 发明申请

US20050220093A1 Methods and apparatus for reconfiguring packets to have varying sizes and latencies 失效
标题翻译：用于重配置数据包以具有不同大小和延迟的方法和装置
公开(公告)号：US20050220093A1
公开(公告)日：2005-10-06
申请号：US10814096
申请日：2004-03-30
申请人： Inching Chen , Vicki Tsai
发明人： Inching Chen , Vicki Tsai
IPC分类号： H04L12/56 , H04L29/06
CPC分类号： H04L47/10 , H04L47/36 , H04L49/90 , H04L69/16 , H04L69/166
摘要： In various embodiments, a processing element (PE) includes a data router adaptor (DRA) and one or more elements that produce function packets. When the DRA receives a function packet, it generates a set of associated router packets. Each of the associated router packets includes a segment of the function packet, and has a router packet data length that is less than or equal to the function packet length. In one embodiment, the router packet data lengths are included in a table, and can be re-configured to alter system performance parameters (e.g., bandwidth usage and/or latency). The DRA sends the set of associated router packets to a router for delivery through a packet-based network. A destination DRA receives the set of associated router packets, and generates a re-assembled function packet from the set of associated router packets. The destination DRA sends the re-assembled function packet to a destination element.
摘要翻译：在各种实施例中，处理元件（PE）包括数据路由器适配器（DRA）和产生功能分组的一个或多个元件。当DRA收到功能分组时，会生成一组关联的路由器报文。每个相关联的路由器分组包括功能分组的一部分，并且具有小于或等于功能分组长度的路由器分组数据长度。在一个实施例中，路由器分组数据长度被包括在表中，并且可以被重新配置为改变系统性能参数（例如，带宽使用和/或等待时间）。 DRA将一组关联的路由器分组发送到路由器以通过基于分组的网络进行传送。目的地DRA接收一组相关联的路由器分组，并且从相关联的路由器分组集合生成重新组合的功能分组。目的地DRA将重新组合的功能分组发送到目的地元素。

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