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    • 1. 发明授权
    • Memory data interface
    • 内存数据接口
    • US06894935B2
    • 2005-05-17
    • US10440855
    • 2003-05-19
    • Eric PeelQing XueSam SuStephen Eugene Holness
    • Eric PeelQing XueSam SuStephen Eugene Holness
    • G11C7/10G11C7/22G11C16/04
    • G11C7/1006G11C7/22
    • The present invention is directed to a memory data interface for transferring data between a memory device and an integrated circuit, whereby, in accordance with one aspect of the present invention, the memory data interface includes a data selector for selecting and normalizing data from memory devices operating at different data transfer timing, and, in accordance with another aspect of the present invention, the memory data interface is capable of transferring data between a memory device and an integrated circuit having a different bus width than the memory device. In accordance with yet another aspect of the present invention, the memory data interface is capable of transferring data between an integrated circuit and a variety of different memory device having different data bus widths. Finally, in accordance with yet another aspect of the present invention, the memory data interface is capable of transferring data between an integrated circuit and a variety of memory devices having different bus widths and different data transfer timing.
    • 本发明涉及一种用于在存储器件和集成电路之间传送数据的存储器数据接口,由此根据本发明的一个方面,存储器数据接口包括用于从存储器件中选择和归一化数据的数据选择器 在不同的数据传输定时操作,并且根据本发明的另一方面,存储器数据接口能够在存储器件和具有与存储器件不同的总线宽度的集成电路之间传送数据。 根据本发明的另一方面,存储器数据接口能够在集成电路和具有不同数据总线宽度的各种不同的存储器件之间传送数据。 最后,根据本发明的另一方面,存储器数据接口能够在集成电路和具有不同总线宽度和不同数据传输时序的各种存储器件之间传送数据。
    • 2. 发明授权
    • Direct memory access (DMA) transfer buffer processor
    • 直接存储器访问(DMA)传输缓冲处理器
    • US07159048B2
    • 2007-01-02
    • US10179816
    • 2002-06-24
    • Bradley RoachDavid DuckmanEric PeelQing Xue
    • Bradley RoachDavid DuckmanEric PeelQing Xue
    • G06F13/28
    • G06F13/28
    • A DMA (Direct Memory Access) Exchange Block (DXB) processor may include a receive processor for writing data from a local memory to a host memory over a bus, e.g., a Peripheral Component Interconnect Extended (PCI/X) bus, and a transmit processor for writing data retrieved from the host memory over the bus to the local memory. Each processor may include a high priority queue and a normal priority queue. A controlling program generates DXBs, each of which include a tag assigned by the controlling program and memory descriptors corresponding to a direct memory access operation. The memory descriptor may include a host memory descriptor (address/length) and one or more local memory descriptors. The controlling program writes a DXB to one of the queues in a cache line spill operation. The transfer processor may include two channel registers, enabling the processor to perform two PCI/X data transfers simultaneously.
    • DMA(直接存储器访问)交换块(DXB)处理器可以包括用于通过总线将数据从本地存储器写入主机存储器的接收处理器,例如外围部件互连扩展(PCI / X)总线和传输 处理器,用于将通过总线从主机存储器检索的数据写入本地存储器。 每个处理器可以包括高优先级队列和正常优先级队列。 控制程序生成DXB,每个DXB包括由控制程序分配的标签和对应于直接存储器访问操作的存储器描述符。 存储器描述符可以包括主机存储器描述符(地址/长度)和一个或多个本地存储器描述符。 控制程序将DXB写入高速缓存行溢出操作中的一个队列。 传送处理器可以包括两个通道寄存器,使处理器能够同时执行两个PCI / X数据传输。