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1. 发明授权

US07511365B2 Thermal enhanced low profile package structure 有权
标题翻译：热增强薄型封装结构
公开(公告)号：US07511365B2
公开(公告)日：2009-03-31
申请号：US11301903
申请日：2005-12-13
申请人： Enboa Wu , Shou-Lung Chen
发明人： Enboa Wu , Shou-Lung Chen
IPC分类号： H01L23/495 , H01L23/48 , H01L23/52 , H01L29/40 , H05K1/16
CPC分类号： H01L24/97 , H01L21/56 , H01L21/561 , H01L23/3107 , H01L23/3128 , H01L23/4334 , H01L23/49568 , H01L24/19 , H01L24/20 , H01L2224/04105 , H01L2224/20 , H01L2224/32188 , H01L2224/32245 , H01L2224/73267 , H01L2224/82039 , H01L2224/92244 , H01L2224/97 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01082 , H01L2924/14 , H01L2924/15311 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30105 , H01L2924/30107 , H01L2224/82 , H01L2224/83
摘要： A thermal enhanced low profile package structure and a method for fabricating the same are provided. The package structure typically includes a metallization layer with an electronic component thereon which is between two provided dielectric layers. The metallization layer as well as the electronic component is embedded and packaged while the substrates are laminated via a lamination process. The fabricated package structure performs not only a superior electric performance, but also an excellent enhancement in thermal dissipation.
摘要翻译：提供了一种热增强薄型封装结构及其制造方法。封装结构通常包括其上具有电子部件的金属化层，其位于两个提供的介电层之间。金属化层以及电子部件被嵌入和封装，同时通过层压工艺层压基板。制造的封装结构不仅具有优异的电性能，而且还具有优异的散热增强。

2. 发明申请

US20060237827A1 Thermal enhanced low profile package structure and method for fabricating the same 有权
标题翻译：热增强薄型封装结构及其制造方法
公开(公告)号：US20060237827A1
公开(公告)日：2006-10-26
申请号：US11301903
申请日：2005-12-13
申请人： Enboa Wu , Shou-Lung Chen
发明人： Enboa Wu , Shou-Lung Chen
IPC分类号： H01L21/50 , H01L23/495
CPC分类号： H01L24/97 , H01L21/56 , H01L21/561 , H01L23/3107 , H01L23/3128 , H01L23/4334 , H01L23/49568 , H01L24/19 , H01L24/20 , H01L2224/04105 , H01L2224/20 , H01L2224/32188 , H01L2224/32245 , H01L2224/73267 , H01L2224/82039 , H01L2224/92244 , H01L2224/97 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01082 , H01L2924/14 , H01L2924/15311 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30105 , H01L2924/30107 , H01L2224/82 , H01L2224/83
摘要： A thermal enhanced low profile package structure and a method for fabricating the same are provided. The package structure typically includes a metallization layer with an electronic component thereon which is between two provided dielectric layers. The metallization layer as well as the electronic component is embedded and packaged while the substrates are laminated via a lamination process. The fabricated package structure performs not only a superior electric performance, but also an excellent enhancement in thermal dissipation.
摘要翻译：提供了一种热增强薄型封装结构及其制造方法。封装结构通常包括其上具有电子部件的金属化层，其位于两个提供的介电层之间。金属化层以及电子部件被嵌入和封装，同时通过层压工艺层压基板。制造的封装结构不仅具有优异的电性能，而且还具有优异的散热增强。

3. 发明申请

US20060108146A1 Structure of electronic package and method for fabricating the same 审中-公开
标题翻译：电子封装的结构及其制造方法
公开(公告)号：US20060108146A1
公开(公告)日：2006-05-25
申请号：US11247506
申请日：2005-10-11
申请人： Enboa Wu , Shou-Lung Chen
发明人： Enboa Wu , Shou-Lung Chen
IPC分类号： H05K1/16
CPC分类号： H05K1/185 , H01L23/5389 , H01L24/24 , H01L24/82 , H01L24/97 , H01L2224/04105 , H01L2224/24137 , H01L2224/24227 , H01L2224/97 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/15311 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30105 , H01L2924/30107 , H05K1/16 , H01L2224/82
摘要： A structure of an electronic package and a method for fabricating the structure are provided in the present invention. The provided method includes steps of providing a first substrate, forming an electronic component thereon, providing a second substrate to cover the first substrate and the electronic component so that a sandwich structure is formed thereby, providing a lamination process for the sandwich structure so that the electronic component is embedded therein, forming plural vias which are located at the I/O pad of the electronic component and penetrate the second substrate for connecting thereto, filling the vias with a conductive material, and patterning the sandwich structure. Hence the structure of an electronic package is fabricated thereby.
摘要翻译：本发明提供一种电子封装的结构及其制造方法。所提供的方法包括以下步骤：提供第一基板，在其上形成电子部件，提供第二基板以覆盖第一基板和电子部件，从而形成夹层结构，从而为夹层结构提供层压工艺，电子部件嵌入其中，形成多个通孔，其位于电子部件的I / O焊盘处，并且穿透第二基板以连接到其上，用导电材料填充通孔，并且对夹层结构进行图案化。因此，由此制造电子封装的结构。

4. 发明授权

US07754530B2 Thermal enhanced low profile package structure and method for fabricating the same 有权
标题翻译：热增强薄型封装结构及其制造方法
公开(公告)号：US07754530B2
公开(公告)日：2010-07-13
申请号：US12388191
申请日：2009-02-18
申请人： Enboa Wu , Shou-Lung Chen
发明人： Enboa Wu , Shou-Lung Chen
IPC分类号： H01L21/44
CPC分类号： H01L24/97 , H01L21/56 , H01L21/561 , H01L23/3107 , H01L23/3128 , H01L23/4334 , H01L23/49568 , H01L24/19 , H01L24/20 , H01L2224/04105 , H01L2224/20 , H01L2224/32188 , H01L2224/32245 , H01L2224/73267 , H01L2224/82039 , H01L2224/92244 , H01L2224/97 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01082 , H01L2924/14 , H01L2924/15311 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30105 , H01L2924/30107 , H01L2224/82 , H01L2224/83
摘要： A thermal enhanced low profile package structure and a method for fabricating the same are provided. The package structure typically includes a metallization layer with an electronic component thereon which is between two provided dielectric layers. The metallization layer as well as the electronic component is embedded and packaged while the substrates are laminated via a lamination process. The fabricated package structure performs not only a superior electric performance, but also an excellent enhancement in thermal dissipation.
摘要翻译：提供了一种热增强薄型封装结构及其制造方法。封装结构通常包括其上具有电子部件的金属化层，其位于两个提供的介电层之间。金属化层以及电子部件被嵌入和封装，同时通过层压工艺层压基板。制造的封装结构不仅具有优异的电性能，而且还具有优异的散热增强。

5. 发明授权

US07474287B2 Light emitting device 有权
标题翻译：发光装置
公开(公告)号：US07474287B2
公开(公告)日：2009-01-06
申请号：US11318314
申请日：2005-12-23
申请人： Enboa Wu , Ming Lu , Geoffrey Wan Tai Shuy
发明人： Enboa Wu , Ming Lu , Geoffrey Wan Tai Shuy
IPC分类号： G09G3/32
CPC分类号： H05B33/0857 , H05B33/0818
摘要： A light emitting device includes a time delay mechanism in electrical connection with a power source for time shifting at least a portion of a power signal outputted by the power source and a plurality of light emitting units formed by at least a light emitting diode (LED)structure, each light emitting unit being driven alternately and sequentially using the power source and the time delay mechanism.
摘要翻译：一种发光器件包括与电源电连接的时间延迟机构，用于对由电源输出的功率信号的至少一部分进行时移，以及由至少一个发光二极管（LED）形成的多个发光单元，结构，每个发光单元使用电源和时间延迟机构交替地和顺序驱动。

6. 发明申请

US20070145884A1 Light emitting diode die with at least one phosphor layer and method for forming the same 审中-公开
标题翻译：具有至少一个荧光体层的发光二极管管芯及其形成方法
公开(公告)号：US20070145884A1
公开(公告)日：2007-06-28
申请号：US11509509
申请日：2006-08-22
申请人： Enboa Wu , Tun-Yen Kan
发明人： Enboa Wu , Tun-Yen Kan
IPC分类号： H01J1/62 , H01J63/04
CPC分类号： H05B33/10
摘要： The present application discloses a light emitting diode die with at least one phosphor layer, comprising a substrate having a first surface and a second surface opposing to the first surface; a light-emitting structure being formed on the first surface and emitting a primary light with a specific wavelength while being driven by a voltage wherein the primary light is capable of passing through the substrate; and, at least one phosphor layer with plate-shaped structure formed on the second surface, wherein at least one phosphor layer comprises at least one type of organic material and at least one type of phosphor substance that absorbs and converts part of the primary light to thereby emit at least a secondary light with a different wavelength from the specific wavelength. In addition, the present invention discloses methods for forming a light emitting diode die with at least one phosphor layer.
摘要翻译：本申请公开了一种具有至少一个磷光体层的发光二极管管芯，其包括具有与第一表面相对的第一表面和第二表面的衬底; 发光结构形成在第一表面上并发射具有特定波长的初级光，同时被初级光能够通过基板的电压驱动; 并且至少一个具有板状结构的磷光体层形成在第二表面上，其中至少一个磷光体层包括至少一种类型的有机材料和至少一种类型的磷光体物质，其吸收并转换部分原始光，从而发射至少具有与特定波长不同波长的二次光。此外，本发明公开了用于形成具有至少一个荧光体层的发光二极管管芯的方法。

7. 发明授权

US08672512B2 Omni reflective optics for wide angle emission LED light bulb 有权
标题翻译：全向反射光学用于广角LED灯泡
公开(公告)号：US08672512B2
公开(公告)日：2014-03-18
申请号：US13426627
申请日：2012-03-22
申请人： Li Zhou , Kai Chiu Wu , Enboa Wu
发明人： Li Zhou , Kai Chiu Wu , Enboa Wu
IPC分类号： F21V14/00
CPC分类号： F21V29/505 , F21K9/232 , F21K9/60 , F21K9/61 , F21K9/64 , F21V3/00 , F21V3/063 , F21V3/12 , F21V13/02 , F21V29/773 , F21V29/86 , F21Y2115/10
摘要： A structure is provided to create an efficient light pattern conversion from a narrow angular light beam pattern of a light emitting source to a wide angle light intensity distribution for an omnidirectional lighting assembly. A heat conductive substrate includes an LED array with at least one central and at least one surrounding LED. A hollow light diverting component is positioned over the LED array; a central LED is within the hollow component while surrounding LEDs are positioned outside. Light emitted by the central LED is reflected off inner surfaces of the hollow component to be discharged from an upper opening. The outer component surface is configured to reflect light from the surrounding LEDs in azimuthal and circumferential directions towards a region below the upper opening. In this manner, plural LEDs are used to form a wide angle emission pattern suitable for use in conventional light bulb replacement devices.
摘要翻译：提供一种结构以产生从发光源的窄角度光束图案到全向照明组件的广角光强度分布的有效的光图案转换。导热基板包括具有至少一个中心和至少一个周围LED的LED阵列。中空光转向部件位于LED阵列上方; 中央LED在中空部件内，而周围的LED位于外部。由中央LED发射的光从中空部件的内表面反射，从上部开口排出。外部部件表面被配置为将方位角和圆周方向上的周围LED的光反射到上部开口下方的区域。以这种方式，使用多个LED来形成适用于常规灯泡更换装置的广角发射图案。

8. 发明申请

US20070224728A1 Method for wafer level package of sensor chip 有权
标题翻译：传感器芯片晶圆级封装方法
公开(公告)号：US20070224728A1
公开(公告)日：2007-09-27
申请号：US11385882
申请日：2006-03-22
申请人： Enboa Wu , Rou-Ching Yang
发明人： Enboa Wu , Rou-Ching Yang
IPC分类号： H01L21/00
CPC分类号： H01L27/14618 , H01L23/3114 , H01L2924/0002 , H01L2924/00
摘要： A method for wafer level package (WLP) of sensor chips is provided, including the steps of: providing a wafer, the wafer including a plurality of die regions, each the die region on a first surface of the wafer comprising an active area and a pad surrounding the active area; bounding a transparent protective layer to the first surface of the wafer; forming a stress buffer on a second surface of the wafer; using etching or laser drill to form a via hole at the location between two neighboring die regions through the stress buffer and the wafer to expose the pad or a conductive line between two neighboring pads; and forming a plurality of bump electrodes on the stress buffer for electrical connection to the pads through the via holes. The method can prevent pollution of the die, improve the convenience of package, reduce the manufacture cost, increase the package reliability, and solve the stress problem caused by attaching the die directly to the PCB.
摘要翻译：提供了一种用于传感器芯片的晶片级封装（WLP）的方法，包括以下步骤：提供晶片，晶片包括多个管芯区域，每个管芯区域在晶片的第一表面上包括有源区和围绕活动区域的垫; 将透明保护层限定在晶片的第一表面上; 在所述晶片的第二表面上形成应力缓冲器; 使用蚀刻或激光钻孔在通过应力缓冲器和晶片的两个相邻管芯区域之间的位置处形成通孔，以暴露焊盘或两个相邻焊盘之间的导电线; 以及在所述应力缓冲器上形成多个凸起电极，以通过所述通孔与所述焊盘电连接。该方法可以防止模具污染，提高包装的便利性，降低制造成本，提高包装可靠性，解决将模具直接连接到PCB所引起的应力问题。

9. 发明授权

US08558254B1 High reliability high voltage vertical LED arrays 有权
标题翻译：高可靠性高压垂直LED阵列
公开(公告)号：US08558254B1
公开(公告)日：2013-10-15
申请号：US13688250
申请日：2012-11-29
申请人： Wing Yan Ho , Enboa Wu
发明人： Wing Yan Ho , Enboa Wu
IPC分类号： H01L29/18
CPC分类号： H01L25/0753 , H01L33/42 , H01L33/62 , H01L2924/0002 , H05B33/0824 , H01L2924/00
摘要： Improved arrays of high voltage vertical-emitting LEDs that generate substantially lower heat than conventional LED arrays are provided. In particular, the present invention provides an array of high-voltage vertical LEDs each of which includes a first electrode positioned on a light-emitting face and a second electrode. A conductive matrix surrounds each LED and electrically communicates with each of the electrodes while an electrically-insulating material is positioned between adjacent diodes such that a first electrical current path is defined between the second and first electrodes through each diode. An isolating material is positioned in the conductive matrix between adjacent LEDs to isolate the adjacent second electrodes from one another. Further positioned between adjacent diodes is a material capable of permanently lowering its resistance to provide an alternate electrical pathway following a failure of an individual LED. High reliability high voltage vertical LED arrays are thereby provided.
摘要翻译：提供了改进的高压垂直发射LED阵列，其产生比常规LED阵列显着更低的热量。特别地，本发明提供一种高压垂直LED阵列，每个高压LED包括位于发光面上的第一电极和第二电极。导电矩阵围绕每个LED并且与每个电极电连通，而电绝缘材料位于相邻二极管之间，使得通过每个二极管在第二和第一电极之间限定第一电流路径。绝缘材料位于相邻LED之间的导电矩阵中，以将相邻的第二电极彼此隔离。相邻二极管之间的进一步定位是能够永久地降低其电阻以提供单独LED的故障之后的备选电路的材料。从而提供高可靠性的高压垂直LED阵列。

10. 发明授权

US07482632B2 LED assembly and use thereof 有权
标题翻译： LED组件及其使用
公开(公告)号：US07482632B2
公开(公告)日：2009-01-27
申请号：US11492837
申请日：2006-07-26
申请人： Ming Lu , Kai Chiu Wu , Zhikuan Zhang , Enboa Wu
发明人： Ming Lu , Kai Chiu Wu , Zhikuan Zhang , Enboa Wu
IPC分类号： H01L29/18
CPC分类号： H05K1/144 , F21K9/00 , F21V29/76 , F21V29/83 , F21Y2107/60 , F21Y2115/10 , H01L2924/0002 , H05K1/0203 , H05K1/0272 , H05K2201/042 , H05K2201/09063 , H05K2201/10106 , H05K2201/10242 , H05K2201/2036 , H01L2924/00
摘要： A light emitting diode (LED) assembly includes a first substrate carrying a first plurality of LEDs mounted thereon and a second substrate spaced apart from the first substrate. The second substrate carries a second plurality of LEDs thereon. The first and second substrates are thermally connected for thermal distribution between the substrates.
摘要翻译：发光二极管（LED）组件包括承载安装在其上的第一多个LED的第一基板和与第一基板间隔开的第二基板。第二基板在其上承载第二多个LED。第一和第二基板被热连接用于基板之间的热分布。

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