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1. 发明授权

US08288835B2 Microshells with integrated getter layer 有权
标题翻译：具有集成吸气剂层的微型壳
公开(公告)号：US08288835B2
公开(公告)日：2012-10-16
申请号：US13017844
申请日：2011-01-31
申请人： Emmanuel P. Quevy , Pezhman Monadgemi , Roger T. Howe
发明人： Emmanuel P. Quevy , Pezhman Monadgemi , Roger T. Howe
IPC分类号： H01L29/84
CPC分类号： B81C1/00293 , B81B7/02 , B81C1/00246 , B81C2203/0136 , B81C2203/0145 , B81C2203/0721 , B81C2203/0735 , B81C2203/0771
摘要： Microshells including a perforated pre-sealing layer and an integrated getter layer are provided. The integrated getter layer may be disposed between other layers of a perforated pre-sealing layer. The perforated pre-sealing layer may include at least one perforation, and a sealing layer may be provided on the pre-sealing layer to close the perforation.
摘要翻译：提供了包括穿孔预密封层和集成吸气剂层的微壳。集成的吸气剂层可以设置在穿孔预密封层的其它层之间。穿孔预密封层可以包括至少一个穿孔，并且可以在预密封层上设置密封层以封闭穿孔。

2. 发明申请

US20110121412A1 PLANAR MICROSHELLS FOR VACUUM ENCAPSULATED DEVICES AND DAMASCENE METHOD OF MANUFACTURE 有权
公开(公告)号：US20110121412A1
公开(公告)日：2011-05-26
申请号：US13017844
申请日：2011-01-31
申请人： Emmanuel P. Quevy , Pezhman Monadgemi , Roger T. Howe
发明人： Emmanuel P. Quevy , Pezhman Monadgemi , Roger T. Howe
IPC分类号： H01L29/84 , H01L21/04
CPC分类号： B81C1/00293 , B81B7/02 , B81C1/00246 , B81C2203/0136 , B81C2203/0145 , B81C2203/0721 , B81C2203/0735 , B81C2203/0771
摘要： Low temperature, multi-layered, planar microshells for encapsulation of devices such as MEMS and microelectronics. The microshells include a planar perforated pre-sealing layer, below which a non-planar sacrificial layer is accessed, and a sealing layer to close the perforation in the pre-sealing layer after the sacrificial material is removed. In an embodiment, the pre-sealing layer has perforations formed with a damascene process to be self-aligned to the chamber below the microshell. The sealing layer may include a nonhermetic layer to physically occlude the perforation and a hermetic layer over the nonhermetic occluding layer to seal the perforation. In a particular embodiment, the hermetic layer is a metal which is electrically coupled to a conductive layer adjacent to the microshell to electrically ground the microshell.

3. 发明授权

US07923790B1 Planar microshells for vacuum encapsulated devices and damascene method of manufacture 有权
标题翻译：用于真空封装装置的平面微壳和大马士革制造方法
公开(公告)号：US07923790B1
公开(公告)日：2011-04-12
申请号：US11716070
申请日：2007-03-09
申请人： Emmanuel P. Quevy , Pezhman Monadgemi , Roger T. Howe
发明人： Emmanuel P. Quevy , Pezhman Monadgemi , Roger T. Howe
IPC分类号： H01L29/84
CPC分类号： B81C1/00293 , B81B7/02 , B81C1/00246 , B81C2203/0136 , B81C2203/0145 , B81C2203/0721 , B81C2203/0735 , B81C2203/0771
摘要： Low temperature, multi-layered, planar microshells for encapsulation of devices such as MEMS and microelectronics. The microshells include a planar perforated pre-sealing layer, below which a non-planar sacrificial layer is accessed, and a sealing layer to close the perforation in the pre-sealing layer after the sacrificial material is removed. In an embodiment, the pre-sealing layer has perforations formed with a damascene process to be self-aligned to the chamber below the microshell. The sealing layer may include a nonhermetic layer to physically occlude the perforation and a hermetic layer over the nonhermetic occluding layer to seal the perforation. In a particular embodiment, the hermetic layer is a metal which is electrically coupled to a conductive layer adjacent to the microshell to electrically ground the microshell.
摘要翻译：用于MEMS和微电子等器件封装的低温多层平面微型壳体。微壳包括平面穿孔的预密封层，在其下面接近非平面牺牲层，以及密封层，用于在去除牺牲材料之后封闭预密封层中的穿孔。在一个实施例中，预密封层具有形成有镶嵌工艺的穿孔，以与微壳下方的腔室自对准。密封层可以包括非密封层，以物理地封闭穿孔，并且在非密封闭塞层上方具有密封层以密封穿孔。在特定实施例中，密封层是金属，其电耦合到与微壳相邻的导电层，以电微接地微壳。

4. 发明授权

US08273594B2 Planar microshells for vacuum encapsulated devices and damascene method of manufacture 有权
公开(公告)号：US08273594B2
公开(公告)日：2012-09-25
申请号：US13017767
申请日：2011-01-31
申请人： Emmanuel P. Quevy , Pezhman Monadgemi , Roger T. Howe
发明人： Emmanuel P. Quevy , Pezhman Monadgemi , Roger T. Howe
IPC分类号： H01L21/00
CPC分类号： B81C1/00293 , B81B7/02 , B81C1/00246 , B81C2203/0136 , B81C2203/0145 , B81C2203/0721 , B81C2203/0735 , B81C2203/0771
摘要： Low temperature, multi-layered, planar microshells for encapsulation of devices such as MEMS and microelectronics. The microshells include a planar perforated pre-sealing layer, below which a non-planar sacrificial layer is accessed, and a sealing layer to close the perforation in the pre-sealing layer after the sacrificial material is removed. In an embodiment, the pre-sealing layer has perforations formed with a damascene process to be self-aligned to the chamber below the microshell. The sealing layer may include a nonhermetic layer to physically occlude the perforation and a hermetic layer over the nonhermetic occluding layer to seal the perforation. In a particular embodiment, the hermetic layer is a metal which is electrically coupled to a conductive layer adjacent to the microshell to electrically ground the microshell.

5. 发明申请

US20110121416A1 PLANAR MICROSHELLS FOR VACUUM ENCAPSULATED DEVICES AND DAMASCENE METHOD OF MANUFACTURE 有权
标题翻译：用于真空封装装置的平面微阵列和制造方法
公开(公告)号：US20110121416A1
公开(公告)日：2011-05-26
申请号：US13017892
申请日：2011-01-31
申请人： Emmanuel P. Quevy , Pezhman Monadgemi , Roger T. Howe
发明人： Emmanuel P. Quevy , Pezhman Monadgemi , Roger T. Howe
IPC分类号： H01L29/84 , H01L21/04
CPC分类号： B81C1/00293 , B81B7/02 , B81C1/00246 , B81C2203/0136 , B81C2203/0145 , B81C2203/0721 , B81C2203/0735 , B81C2203/0771
摘要： Low temperature, multi-layered, planar microshells for encapsulation of devices such as MEMS and microelectronics. The microshells include a planar perforated pre-sealing layer, below which a non-planar sacrificial layer is accessed, and a sealing layer to close the perforation in the pre-sealing layer after the sacrificial material is removed. In an embodiment, the pre-sealing layer has perforations formed with a damascene process to be self-aligned to the chamber below the microshell. The sealing layer may include a nonhermetic layer to physically occlude the perforation and a hermetic layer over the nonhermetic occluding layer to seal the perforation. In a particular embodiment, the hermetic layer is a metal which is electrically coupled to a conductive layer adjacent to the microshell to electrically ground the microshell.
摘要翻译：用于MEMS和微电子等器件封装的低温多层平面微型壳体。微壳包括平面穿孔的预密封层，在其下面接近非平面牺牲层，以及密封层，用于在去除牺牲材料之后封闭预密封层中的穿孔。在一个实施例中，预密封层具有形成有镶嵌工艺的穿孔，以与微壳下方的腔室自对准。密封层可以包括非密封层，以物理地封闭穿孔，并且在非密封闭塞层上方具有密封层以密封穿孔。在特定实施例中，密封层是金属，其电耦合到与微壳相邻的导电层，以电微接地微壳。

6. 发明申请

US20110121415A1 PLANAR MICROSHELLS FOR VACUUM ENCAPSULATED DEVICES AND DAMASCENE METHOD OF MANUFACTURE 有权
公开(公告)号：US20110121415A1
公开(公告)日：2011-05-26
申请号：US13017767
申请日：2011-01-31
申请人： Emmanuel P. Quevy , Pezhman Monadgemi , Roger T. Howe
发明人： Emmanuel P. Quevy , Pezhman Monadgemi , Roger T. Howe
IPC分类号： H01L29/84 , H01L21/04
CPC分类号： B81C1/00293 , B81B7/02 , B81C1/00246 , B81C2203/0136 , B81C2203/0145 , B81C2203/0721 , B81C2203/0735 , B81C2203/0771
摘要： Low temperature, multi-layered, planar microshells for encapsulation of devices such as MEMS and microelectronics. The microshells include a planar perforated pre-sealing layer, below which a non-planar sacrificial layer is accessed, and a sealing layer to close the perforation in the pre-sealing layer after the sacrificial material is removed. In an embodiment, the pre-sealing layer has perforations formed with a damascene process to be self-aligned to the chamber below the microshell. The sealing layer may include a nonhermetic layer to physically occlude the perforation and a hermetic layer over the nonhermetic occluding layer to seal the perforation. In a particular embodiment, the hermetic layer is a metal which is electrically coupled to a conductive layer adjacent to the microshell to electrically ground the microshell.

7. 发明授权

US07659150B1 Microshells for multi-level vacuum cavities 有权
标题翻译：用于多层真空腔的微型壳
公开(公告)号：US07659150B1
公开(公告)日：2010-02-09
申请号：US11716156
申请日：2007-03-09
申请人： Pezhman Monadgemi , Roger T. Howe , Emmanuel P. Quevy
发明人： Pezhman Monadgemi , Roger T. Howe , Emmanuel P. Quevy
IPC分类号： H01L21/00
CPC分类号： H01L23/10 , B81B2207/012 , B81C1/00293 , B81C2203/0136 , B81C2203/0145 , H01L23/26 , H01L2924/0002 , H01L2924/13091 , H01L2924/3011 , H01L2924/00
摘要： Microshells for encapsulation of devices such as MEMS and microelectronics. In an embodiment, the microshells include a planar perforated pre-sealing layer, below which a non-planar sacrificial layer is accessed, and a sealing layer to close the perforation in the pre-sealing layer after the sacrificial material is removed. The sealing layer may include a nonhermetic layer to physically occlude the perforation and a hermetic layer over the nonhermetic occluding layer to seal the perforation as a function of the dimension of the perforation to form cavities having different vacuum levels on the same substrate.
摘要翻译：用于封装MEMS和微电子等器件的微型外壳。在一个实施例中，微壳包括平面穿孔的预密封层，在其下面存取非平面牺牲层，以及密封层，用于在去除牺牲材料之后封闭预密封层中的穿孔。密封层可以包括非密封层，以物理地闭塞穿孔，并且在非密封闭塞层上方形成密封层，以密封穿孔，作为穿孔尺寸的函数，以在同一基底上形成具有不同真空度的空腔。

8. 发明授权

US07595209B1 Low stress thin film microshells 有权
标题翻译：低应力薄膜微壳
公开(公告)号：US07595209B1
公开(公告)日：2009-09-29
申请号：US11716233
申请日：2007-03-09
申请人： Pezhman Monadgemi , Emmanuel P. Quevy , Roger T. Howe
发明人： Pezhman Monadgemi , Emmanuel P. Quevy , Roger T. Howe
IPC分类号： H01L21/56 , H01L21/50
CPC分类号： B81C1/0023 , B81B7/0054 , B81C2201/0167 , B81C2203/0136 , B81C2203/0145 , H01L21/568 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： Multi-layered, planar microshells having low stress for encapsulation of devices such as MEMS and microelectronics. The microshells may include a perforated pre-sealing layer, below which a sacrificial layer is accessed, and a sealing layer to close the perforation in the pre-sealing layer after the sacrificial material is removed. The sealing layer may further include a nonhermetic layer to physically occlude the perforation and a hermetic layer over the nonhermetic occluding layer to seal the perforation. The various layers may be formed employing processes having opposing stresses to tune the residual stress of the multi-layered microshell. In an embodiment, the hermetic layer is a metal which is deposited with a process tuned to impart a tensile stress to lower the residual stress in the microshell below the magnitude of cumulative stress present in sealing layer and pre-sealing layer.
摘要翻译：具有低应力的多层平面微壳体，用于诸如MEMS和微电子器件的封装。微壳可以包括穿孔的预密封层，在其下方存取牺牲层，以及密封层，用于在去除牺牲材料之后封闭预密封层中的穿孔。密封层还可以包括非密封层，以物理地封闭穿孔，并且在非密封闭塞层上方形成密封层以密封穿孔。可以使用具有相反应力的工艺来形成各个层，以调节多层微壳的残余应力。在一个实施例中，密封层是金属，其沉积有被调整以赋予拉伸应力的工艺，以将微壳中的残余应力降低到低于存在于密封层和预密封层中的累积应力的大小。

9. 发明授权

US08313970B2 Planar microshells for vacuum encapsulated devices and damascene method of manufacture 有权
标题翻译：用于真空封装装置的平面微壳和大马士革制造方法
公开(公告)号：US08313970B2
公开(公告)日：2012-11-20
申请号：US13017892
申请日：2011-01-31
申请人： Emmanuel P. Quevy , Pezhman Monadgemi , Roger T. Howe
发明人： Emmanuel P. Quevy , Pezhman Monadgemi , Roger T. Howe
IPC分类号： H01L21/00
CPC分类号： B81C1/00293 , B81B7/02 , B81C1/00246 , B81C2203/0136 , B81C2203/0145 , B81C2203/0721 , B81C2203/0735 , B81C2203/0771
摘要： Low temperature, multi-layered, planar microshells for encapsulation of devices such as MEMS and microelectronics. The microshells include a planar perforated pre-sealing layer, below which a non-planar sacrificial layer is accessed, and a sealing layer to close the perforation in the pre-sealing layer after the sacrificial material is removed. In an embodiment, the pre-sealing layer has perforations formed with a damascene process to be self-aligned to the chamber below the microshell. The sealing layer may include a nonhermetic layer to physically occlude the perforation and a hermetic layer over the nonhermetic occluding layer to seal the perforation. In a particular embodiment, the hermetic layer is a metal which is electrically coupled to a conductive layer adjacent to the microshell to electrically ground the microshell.
摘要翻译：用于MEMS和微电子等器件封装的低温多层平面微型壳体。微壳包括平面穿孔的预密封层，在其下面接近非平面牺牲层，以及密封层，用于在去除牺牲材料之后封闭预密封层中的穿孔。在一个实施例中，预密封层具有形成有镶嵌工艺的穿孔，以与微壳下方的腔室自对准。密封层可以包括非密封层，以物理地封闭穿孔，并且在非密封闭塞层上方具有密封层以密封穿孔。在特定实施例中，密封层是金属，其电耦合到与微壳相邻的导电层，以电微接地微壳。

10. 发明授权

US07736929B1 Thin film microshells incorporating a getter layer 失效
标题翻译：包含吸气剂层的薄膜微壳
公开(公告)号：US07736929B1
公开(公告)日：2010-06-15
申请号：US11716422
申请日：2007-03-09
申请人： Pezhman Monadgemi , Emmanuel P. Quevy , Roger T. Howe
发明人： Pezhman Monadgemi , Emmanuel P. Quevy , Roger T. Howe
IPC分类号： H01L21/00 , H01L21/461 , H01L21/50 , C23F1/00 , C25F3/00
CPC分类号： B81B7/0038 , B81C2203/0136 , B81C2203/0145
摘要： Low temperature, multi-layered microshells for encapsulation of devices such as MEMS and microelectronics. The microshells may include a perforated pre-sealing layer, below which a sacrificial layer is accessed, and a sealing layer to close the perforation in the pre-sealing layer after the sacrificial material is removed. The pre-sealing layer includes a large surface area getter layer to remove contaminants from the space ultimately enclosed by the microshell to improve the pressure control and cleanliness of the microshell.
摘要翻译：用于封装MEMS和微电子等器件的低温多层微型壳体。微壳可以包括穿孔的预密封层，在其下方存取牺牲层，以及密封层，用于在去除牺牲材料之后封闭预密封层中的穿孔。预密封层包括大的表面积吸气剂层，以从最终由微壳包围的空间去除污染物，以改善微壳的压力控制和清洁度。

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