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1. 发明授权

US06780779B2 Method of fabricating semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US06780779B2
公开(公告)日：2004-08-24
申请号：US10222855
申请日：2002-08-19
申请人： Tetsuya Ueda , Eiji Tamaoka , Nobuo Aoi
发明人： Tetsuya Ueda , Eiji Tamaoka , Nobuo Aoi
IPC分类号： H01L21302
CPC分类号： H01L21/76897 , H01L21/31144 , H01L21/76801 , H01L21/76811 , H01L21/76837 , H01L21/76885 , H01L23/5226 , H01L2924/0002 , H01L2924/00
摘要： After successively depositing a first metal film and a first silicon oxide film on an insulating film formed on a semiconductor substrate, etching is carried out by using a first resist pattern as a mask, so as to form a first interlayer insulating film having openings from the first silicon oxide film and first metal interconnects from the first metal film. A third interlayer insulating film of an organic film is filled in the openings of the first interlayer insulating film, and the first interlayer insulating film is etched by using a hard mask. A second metal film is then filled in a space in the second interlayer insulating film, so as to form second metal interconnects.
摘要翻译：在形成在半导体衬底上的绝缘膜上依次沉积第一金属膜和第一氧化硅膜之后，通过使用第一抗蚀剂图案作为掩模进行蚀刻，从而形成具有开口的第一层间绝缘膜第一氧化硅膜和第一金属互连从第一金属膜。在第一层间绝缘膜的开口部填充有机膜的第三层间绝缘膜，使用硬掩模对第一层间绝缘膜进行蚀刻。然后将第二金属膜填充在第二层间绝缘膜的空间中，以形成第二金属互连。

2. 发明授权

US06545361B2 Semiconductor device having multilevel interconnection structure and method for fabricating the same 有权
标题翻译：具有多层互连结构的半导体器件及其制造方法
公开(公告)号：US06545361B2
公开(公告)日：2003-04-08
申请号：US09835169
申请日：2001-04-16
申请人： Tetsuya Ueda , Eiji Tamaoka , Nobuo Aoi
发明人： Tetsuya Ueda , Eiji Tamaoka , Nobuo Aoi
IPC分类号： H01L2348
CPC分类号： H01L21/76897 , H01L21/76801 , H01L21/7682 , H01L21/76838 , H01L21/76885 , H01L23/5222 , H01L23/5226 , H01L2924/0002 , H01L2924/00
摘要： A method for fabricating a semiconductor device having a multilevel interconnection structure according to the present invention includes the steps of: covering a surface of a substrate with an insulating film; depositing a conductive film on the insulating film; forming a first interlevel dielectric film on the conductive film; forming an interlevel contact hole in the first interlevel dielectric film so as to reach the conductive film; filling in the interlevel contact hole with an interconnecting metal; forming a masking layer, defining a pattern of a first interconnect layer, on the first interlevel dielectric film so as to cover at least part of the interconnecting metal; forming the first interconnect layer out of the conductive film by etching the first interlevel dielectric film using the masking layer as a mask and by etching the conductive film using the masking layer and the interconnecting metal as a mask; removing the masking layer; depositing a second interlevel dielectric film over the substrate so as to cover the interconnecting metal and the first interconnect layer; planarizing the second interlevel dielectric film, thereby exposing at least part of the interconnecting metal; and forming a second interconnect layer to be electrically connected to an upper part of the interconnecting metal.
摘要翻译：根据本发明的制造具有多层互连结构的半导体器件的方法包括以下步骤：用绝缘膜覆盖衬底的表面; 在绝缘膜上沉积导电膜; 在导电膜上形成第一层间电介质膜; 在所述第一层间绝缘膜中形成层间接触孔，以到达所述导电膜; 用互连金属填充层间接触孔; 在所述第一层间绝缘膜上形成限定第一互连层图案的掩模层，以便覆盖所述互连金属的至少一部分; 通过使用掩模层作为掩模蚀刻第一层间电介质膜，并且使用掩模层和互连金属作为掩模蚀刻导电膜，从导电膜形成第一互连层; 去除掩蔽层; 在所述衬底上沉积第二层间电介质膜以便覆盖所述互连金属和所述第一互连层; 平面化第二层间电介质膜，从而暴露至少部分互连金属; 以及形成与所述互连金属的上部电连接的第二互连层。

3. 发明授权

US06242336B1 Semiconductor device having multilevel interconnection structure and method for fabricating the same 失效
公开(公告)号：US06242336B1
公开(公告)日：2001-06-05
申请号：US09186067
申请日：1998-11-05
申请人： Tetsuya Ueda , Eiji Tamaoka , Nobuo Aoi
发明人： Tetsuya Ueda , Eiji Tamaoka , Nobuo Aoi
IPC分类号： H01L214763
CPC分类号： H01L21/76897 , H01L21/76801 , H01L21/7682 , H01L21/76838 , H01L21/76885 , H01L23/5222 , H01L23/5226 , H01L2924/0002 , H01L2924/00
摘要： A method for fabricating a semiconductor device having a multilevel interconnection structure according to the present invention includes the steps of: covering a surface of a substrate with an insulating film; depositing a conductive film on the insulating film; forming a first interlevel dielectric film on the conductive film; forming an interlevel contact hole in the first interlevel dielectric film so as to reach the conductive film; filling in the interlevel contact hole with an interconnecting metal; forming a masking layer, defining a pattern of a first interconnect layer, on the first interlevel dielectric film so as to cover at least part of the interconnecting metal; forming the first interconnect layer out of the conductive film by etching the first interlevel dielectric film using the masking layer as a mask and by etching the conductive film using the masking layer and the interconnecting metal as a mask; removing the masking layer; depositing a second interlevel dielectric film over the substrate so as to cover the interconnecting metal and the first interconnect layer; planarizing the second interlevel dielectric film, thereby exposing at least part of the interconnecting metal; and forming a second interconnect layer to be electrically connected to an upper part of the interconnecting metal.

4. 发明授权

US06455436B1 Method of fabricating semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US06455436B1
公开(公告)日：2002-09-24
申请号：US09479243
申请日：2000-01-07
申请人： Tetsuya Ueda , Eiji Tamaoka , Nobuo Aoi
发明人： Tetsuya Ueda , Eiji Tamaoka , Nobuo Aoi
IPC分类号： H01L21302
CPC分类号： H01L21/76897 , H01L21/31144 , H01L21/76801 , H01L21/76811 , H01L21/76837 , H01L21/76885 , H01L23/5226 , H01L2924/0002 , H01L2924/00
摘要： After successively depositing a first metal film and a first silicon oxide film on an insulating film formed on a semiconductor substrate, etching is carried out by using a first resist pattern as a mask, so as to form a first interlayer insulating film having openings from the first silicon oxide film and first metal interconnects from the first metal film. A third interlayer insulating film of an organic film is filled in the openings of the first interlayer insulating film, and the first interlayer insulating film is etched by using a hard mask. A second metal film is then filled in a space in the second interlayer insulating film, so as to form second metal interconnects.
摘要翻译：在形成在半导体衬底上的绝缘膜上依次沉积第一金属膜和第一氧化硅膜之后，通过使用第一抗蚀剂图案作为掩模进行蚀刻，从而形成具有开口的第一层间绝缘膜第一氧化硅膜和第一金属互连从第一金属膜。在第一层间绝缘膜的开口部填充有机膜的第三层间绝缘膜，使用硬掩模对第一层间绝缘膜进行蚀刻。然后将第二金属膜填充在第二层间绝缘膜的空间中，以形成第二金属互连。

5. 发明授权

US06232237B1 Method for fabricating semiconductor device 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US06232237B1
公开(公告)日：2001-05-15
申请号：US09206982
申请日：1998-12-08
申请人： Eiji Tamaoka , Nobuo Aoi , Tetsuya Ueda
发明人： Eiji Tamaoka , Nobuo Aoi , Tetsuya Ueda
IPC分类号： H01L214763
CPC分类号： H01L21/02063 , G03F7/427 , H01L21/31116 , H01L21/31138 , H01L21/76802 , H01L21/76814
摘要： A method for fabricating a semiconductor device according to the present invention includes the steps of: a) forming an insulator film having Si—H bonds; b) forming a resist mask over a selected region of the insulator film; c) etching part of the insulator film that is not covered with the resist mask, thereby forming a recess in the insulator film; and d) removing the resist mask. The step d) includes the step of e) ashing the resist mask by using plasma produced from a gas comprising water vapor as a main component.
摘要翻译：根据本发明的制造半导体器件的方法包括以下步骤：a）形成具有Si-H键的绝缘膜; b）在所述绝缘膜的选定区域上形成抗蚀剂掩模; c）蚀刻未被抗蚀剂掩模覆盖的绝缘体膜的一部分，从而在绝缘膜中形成凹部; 和d）去除抗蚀剂掩模。步骤d）包括以下步骤：e）通过使用由包含水蒸汽作为主要成分的气体产生的等离子体来蚀刻抗蚀剂掩模。

6. 发明申请

US20100087059A1 METHOD FOR FORMING INLAID INTERCONNECT 有权
标题翻译：形成互联互通的方法
公开(公告)号：US20100087059A1
公开(公告)日：2010-04-08
申请号：US12632397
申请日：2009-12-07
申请人： Nobuo Aoi
发明人： Nobuo Aoi
IPC分类号： H01L21/768
CPC分类号： H01L21/76859 , H01L21/76858 , H01L21/76864 , H01L21/76873 , H01L21/76883
摘要： After a groove is formed in an insulating layer formed on a semiconductor substrate, a barrier metal layer is formed on the insulating layer by an ALD process so as to cover the side walls and bottom of the groove, and an impurity layer is formed in or on the surface of the barrier metal layer by an ion implantation process or by an ALD process. Thereafter, the barrier metal layer and the impurity layer are alloyed, and then an inlaid interconnect layer, which is composed of a Cu seed layer and a Cu plating layer, is formed in the groove. Then, an impurity element in the alloyed barrier metal layer is thermally diffused into the inlaid interconnect layer.
摘要翻译：在形成在半导体衬底上的绝缘层中形成沟槽之后，通过ALD工艺在绝缘层上形成阻挡金属层，以覆盖沟槽的侧壁和底部，并且在其中形成杂质层通过离子注入工艺或通过ALD工艺在阻挡金属层的表面上。此后，将阻挡金属层和杂质层合金化，然后在沟槽中形成由Cu籽晶层和Cu镀层构成的嵌入式互连层。然后，合金化阻挡金属层中的杂质元素被热扩散到镶嵌互连层中。

7. 发明申请

US20090298298A1 METHOD OF FORMING INTERLAYER INSULATING FILM, PRECURSOR SOLUTION FOR FORMING OF INTERLAYER INSULATING FILM, CVD MATERIAL FOR FORMING OF INTERLAYER INSULATING FILM AND RAW MATERIAL FOR PRODUCTION OF SILOXANE OLIGOMER 有权
标题翻译：形成中间层绝缘膜的方法，用于形成中间层绝缘膜的前体溶液，用于形成中间层绝缘膜的CVD材料和用于生产硅氧烷低聚物的原料
公开(公告)号：US20090298298A1
公开(公告)日：2009-12-03
申请号：US11917375
申请日：2006-03-13
申请人： Nobuo Aoi
发明人： Nobuo Aoi
IPC分类号： H01L21/312 , C08L83/04 , C07F7/18
CPC分类号： H01L21/02126 , C08G77/045 , C08G77/70 , C08L83/04 , C09D183/04 , C23C16/401 , H01L21/02216 , H01L21/02274 , H01L21/3121
摘要： In a method of forming an interlayer insulating film by plasma CVD, an organic siloxane compound including one or more silicon atoms each having at least three or more units each represented by a general formula, —O—Si(R1R2)—OR3 (wherein R1 and R2 are the same as or different from each other and are a methyl group, an ethyl group or a propyl group, and R3 is the same as or different from R1 and R2 and is a methyl group, an ethyl group, a propyl group or a phenyl group) is used as a raw material.
摘要翻译：在通过等离子体CVD形成层间绝缘膜的方法中，包含一个或多个硅原子的有机硅氧烷化合物各自具有至少三个以上的由通式-O-Si（R 1 R 2）-OR 3表示的单元（其中R 1 和R 2相同或不同，为甲基，乙基或丙基，R 3与R 1和R 2相同或不同，为甲基，乙基，丙基或苯基）作为原料。

8. 发明申请

US20080090094A1 Interlayer dielectric film 失效
标题翻译：层间电介质膜
公开(公告)号：US20080090094A1
公开(公告)日：2008-04-17
申请号：US12000124
申请日：2007-12-10
申请人： Nobuo Aoi
发明人： Nobuo Aoi
IPC分类号： B32B3/10 , B32B5/14
CPC分类号： H01L21/02126 , C08G77/50 , H01L21/02211 , H01L21/02282 , H01L21/3122 , H01L21/3124 , H01L21/31695 , H01L21/7682 , H01L2221/1047 , Y10T428/12361 , Y10T428/12542 , Y10T428/31663
摘要： An interlayer dielectric film is made from an organic/inorganic hybrid film. The organic/inorganic hybrid film has a main chain in which a first site of siloxane and a second site of an organic molecule are alternately bonded to each other.
摘要翻译：层间绝缘膜由有机/无机混合膜制成。有机/无机杂化膜具有其中硅氧烷的第一部位和有机分子的第二位置彼此交替键合的主链。

9. 发明申请

US20050245097A1 Method for synthesizing polymeric material, method for forming polymer thin film and method for forming interlayer insulating film 失效
公开(公告)号：US20050245097A1
公开(公告)日：2005-11-03
申请号：US11177569
申请日：2005-07-11
申请人： Nobuo Aoi
发明人： Nobuo Aoi
IPC分类号： C08G73/10 , C08J5/18 , H01L21/312 , A61K9/50 , H01L21/31
CPC分类号： C08J5/18 , C08G73/10 , H01L21/02118 , H01L21/02203 , H01L21/312
摘要： A Lewis acid-base reaction is caused, in a solution, between a first monomer corresponding to a Lewis acid and a second monomer corresponding to a Lewis base, so as to generate a monomer adduct in which the first monomer and the second monomer are bonded to each other through weak electric interaction. Next, the solution including the monomer adduct is applied on a substrate so as to form a supramolecular solid thin film made of the monomer adduct. Then, the supramolecular solid thin film is heated so as to cause a polymerization reaction between the first monomer and the second monomer within the supramolecular solid thin film, thereby forming a polymer thin film.

10. 发明授权

US5989998A Method of forming interlayer insulating film 失效
标题翻译：形成层间绝缘膜的方法
公开(公告)号：US5989998A
公开(公告)日：1999-11-23
申请号：US919271
申请日：1997-08-28
申请人： Gaku Sugahara , Nobuo Aoi , Koji Arai , Kazuyuki Sawada
发明人： Gaku Sugahara , Nobuo Aoi , Koji Arai , Kazuyuki Sawada
IPC分类号： C23C16/26 , C23C16/30 , C23C16/40 , H01L21/3105 , H01L21/312 , H01L21/314 , H01L21/316 , H01L21/768 , H01L21/4763
CPC分类号： H01L21/02126 , C23C16/26 , C23C16/30 , C23C16/401 , H01L21/0212 , H01L21/02131 , H01L21/02205 , H01L21/02211 , H01L21/02214 , H01L21/02216 , H01L21/02274 , H01L21/3122 , H01L21/3127 , H01L21/314 , H01L21/31608 , H01L21/31612 , H01L21/31629 , H01L21/31633 , H01L21/76801 , H01L21/76807 , H01L21/31051 , H01L21/31058
摘要： A material containing, as a main component, an organic silicon compound represented by the following general formula:R.sup.1.sub.x Si(OR.sup.2).sub.4-x(where R.sup.1 is a phenyl group or a vinyl group; R.sup.2 is an alkyl group; and x is an integer of 1 to 3) is caused to undergo plasma polymerization or react with an oxidizing agent to form an interlayer insulating film composed of a silicon oxide film containing an organic component. As the organic silicon compound where R.sup.1 is a phenyl group, there can be listed phenyltrimethoxysilane or diphenyldimethoxysilane. As the organic silicon compound where R.sup.1 is a vinyl group, there can be listed vinyltrimethoxysilane or divinyldimethoxysilane.
摘要翻译：作为主成分的含有以下通式表示的有机硅化合物的材料：R1xSi（OR2）4-x（其中R1为苯基或乙烯基; R2为烷基; x为整数） 1〜3）进行等离子体聚合或与氧化剂反应，形成由含有有机成分的氧化硅膜构成的层间绝缘膜。作为R 1为苯基的有机硅化合物，可以列举苯基三甲氧基硅烷或二苯基二甲氧基硅烷。作为R 1为乙烯基的有机硅化合物，可列举乙烯基三甲氧基硅烷或二乙烯基二甲氧基硅烷。

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