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    • 3. 发明授权
    • Mechanism to control di/dt for a microprocessor
    • 控制微处理器的di / dt的机制
    • US06636976B1
    • 2003-10-21
    • US09608748
    • 2000-06-30
    • Edward T. GrochowskiDavid SagerVivek TiwariIan YoungDavid J. Ayers
    • Edward T. GrochowskiDavid SagerVivek TiwariIan YoungDavid J. Ayers
    • G06F132
    • G06F1/3237G06F1/28G06F1/3203Y02D10/128
    • The present invention provides a mechanism for adjusting the activity of an integrated digital circuit such as a processor to reduce voltage changes attributable to current changes triggered by clock gating. The processor includes one or more functional units and a current control circuit that monitors activity states of the processor's functional units to estimate the current consumed over n clock cycles. The current control circuit estimates the current change for a given clock cycle from the n activity states and compares the estimated current change with first and second thresholds. The processors activity is decreased if the estimated current change is greater than the first threshold, and the processor activity is decreased if the estimated current change is less than the second threshold.
    • 本发明提供一种用于调整诸如处理器的集成数字电路的活动性的机构,以减少归因于由时钟门控触发的电流变化的电压变化。 处理器包括一个或多个功能单元和电流控制电路,其监视处理器的功能单元的活动状态以估计在n个时钟周期内消耗的电流。 电流控制电路从n个活动状态估计给定时钟周期的电流变化,并将估计的电流变化与第一和第二阈值进行比较。 如果估计的电流变化大于第一阈值,则处理器活动减小,并且如果估计的电流变化小于第二阈值,则处理器活动性降低。