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1. 发明申请

WO9822774A3 SHOCK-RESISTANT ELECTRONIC CIRCUIT ASSEMBLY 审中-公开
标题翻译：抗震电子电路总成
公开(公告)号：WO9822774A3
公开(公告)日：1998-08-06
申请号：PCT/US9718484
申请日：1997-10-09
申请人： ENSIGN BICKFORD CO
发明人： MARSHALL PAUL N , TSEKA THOMAS C , WALSH BRENDAN M , FRITZ JAMES E
IPC分类号： F42C11/00 , F42B3/12 , F42C19/00 , H05K5/02 , F42D
CPC分类号： H05K5/0204 , F42B3/121 , F42C19/00
摘要： A shock-resistant electronic circuit assembly (10) is provided in which an electronic circuit is encased in an encapsulation (14) that engages a surrounding enclosure (18, 22) in shock-dispersing contact therewith. The encapsulation may have a plurality of edges (16, 16a, 16b), fins (24) or bosses (70) that bear against the enclosure. The encapsulation may include a shock-absorbing material (14f) disposed against the enclosure to protect the circuit against vibrations and a structural support material (14e) to protect the circuit against stress. The circuit assembly (10) may contain a capacitor (34) for storing an electrical signal and timing circuitry for releasing the stored energy after a predetermined delay. The circuit assembly (10) may be part of a transducer-circuit assembly (55) that includes a transducer module (58) for converting shock wave energy into electrical energy for the electronic circuit, and the released enregy may be converted into a detonation initiation signal. Assembly (55) may be part of a detonator (100) that receives a non-electric initiation signal and detonates following the delay determined by the electronic circuit. The detonator housing (112) or an optional sleeve (22) provides an enclosure for the assembly (55). 00000
摘要翻译：提供一种抗冲击电子电路组件（10），其中电子电路被封装在与周围的外壳（18,22）接触的密封件（14）中，以与其进行缓冲分散接触。封装可以具有承载在外壳上的多个边缘（16,16a，16b），翅片（24）或凸起（70）。封装可以包括抵靠外壳设置的防震材料（14f），以保护电路免受振动和结构支撑材料（14e），以保护电路免受应力。电路组件（10）可以包含用于存储电信号的电容器（34）和用于在预定延迟之后释放所存储的能量的定时电路。电路组件（10）可以是换能器 - 电路组件（55）的一部分，其包括用于将冲击波能量转换成用于电子电路的电能的换能器模块（58），并且释放的能量可以被转换成爆震开始信号。组件（55）可以是雷管（100）的一部分，其接收非电启动信号并且引发跟随由电子电路确定的延迟。雷管壳体（112）或可选的套筒（22）提供用于组件（55）的外壳。 00000

2. 发明公开

EP0935734A4 SHOCK-RESISTANT ELECTRONIC CIRCUIT ASSEMBLY 失效
标题翻译： SHOCK稳定电路
公开(公告)号：EP0935734A4
公开(公告)日：2001-07-04
申请号：EP97911702
申请日：1997-10-09
申请人： ENSIGN BICKFORD CO
发明人： MARSHALL PAUL N , TSEKA THOMAS C , WALSH BRENDAN M , FRITZ JAMES E
IPC分类号： F42C11/00 , F42B3/12 , F42C19/00 , H05K5/02 , F42C11/06 , F42C19/12 , F42D1/05
CPC分类号： H05K5/0204 , F42B3/121 , F42C19/00
摘要： A shock-resistant electronic circuit assembly (10) is provided in which an electronic circuit is encased in an encapsulation (14) that engages a surrounding enclosure (18, 22) in shock-dispersing contact therewith. The encapsulation may have a plurality of edges (16, 16a, 16b), fins (24) or bosses (70) that bear against the enclosure. The encapsulation may include a shock-absorbing material (14f) disposed against the enclosure to protect the circuit against vibrations and a structural support material (14e) to protect the circuit against stress. The circuit assembly (10) may contain a capacitor (34) for storing an electrical signal and timing circuitry for releasing the stored energy after a predetermined delay. The circuit assembly (10) may be part of a transducer-circuit assembly (55) that includes a transducer module (58) for converting shock wave energy into electrical energy for the electronic circuit, and the released enregy may be converted into a detonation initiation signal. Assembly (55) may be part of a detonator (100) that receives a non-electric initiation signal and detonates following the delay determined by the electronic circuit. The detonator housing (112) or an optional sleeve (22) provides an enclosure for the assembly (55).

3. 发明公开

EP0941447A4 HYBRID ELECTRONIC DETONATOR DELAY CIRCUIT ASSEMBLY 失效
标题翻译：电子计时电路用于混合动力电子熔断器
公开(公告)号：EP0941447A4
公开(公告)日：2001-11-21
申请号：EP97954539
申请日：1997-12-03
申请人： ENSIGN BICKFORD CO
发明人： EWICK DAVID W , MARSHALL PAUL N , RODE KENNETH A , TSEKA THOMAS C , WALSH BRENDAN M
IPC分类号： F42B3/13 , F42B3/12 , F42C11/06 , F42B3/10 , F42D1/05 , F42D1/055
CPC分类号： F42B3/122 , F42B3/121 , F42C11/06
摘要： An electronic delay circuit (10) for use in a detonator (100) has a switching circuit (20) and a timer circuit (22). Switching circuit (20) controls the flow of a stored charge of electrical energy from a storage capacitor (12) to a bridge initiation element such as a semiconductor bridge (18) or a tungsten bridge. The timing of the release of this energy is controlled by timer circuit (22). Switching circuit (20) is an integrated, dielectrically isolated, bipolar CMOS (DI BiCMOS) circuit, whereas timer circuit (22) is a conventional CMOS circuit. The use of a DI BiCMOS switching circuit allows for greater efficiency of energy transfer from the storage capacitor (12) fo the semiconductor bridge (18) than has previously been attained.

4. 发明专利

CA2310881C SHOCK-RESISTANT ELECTRONIC CIRCUIT ASSEMBLY 未知
公开(公告)号：CA2310881C
公开(公告)日：2003-10-14
申请号：CA2310881
申请日：2000-06-05
申请人： ENSIGN BICKFORD CO
发明人： MARSHALL PAUL N , TSEKA THOMAS C , WALSH BRENDAN M , FRITZ JAMES E
IPC分类号： F42C11/00 , F42B3/12 , F42C11/06 , F42C19/00 , H05K5/02 , H05K5/00 , F42D5/04
摘要： A shock-resistant electronic circuit assembly (10) is provided in which an electronic cir- cuit is encased in an encapsulation (14) that engages a surrounding enclosur e (18) in shock- dispersing contact therewith. The encapsulation may have a plurality of edge s (16, 16a, 16b), fins (24) or bosses (70) that bear against the enclosure. The encapsulation may include a shock- absorbing material (14f) disposed against the enclosure to protect the circu it against vibrations and a structural support material such as a casing (14e) to protect the circuit against stress. The circuit assembly (10) may be part of a sheathed initiator assembly (55) that includes a transfer member (58) for converting shock wave energy into electrical energy for the electronic circuit, and the released energy may be converted into a detonation initiation signal . Assembly (55) may be part of a detonator (100) that receives a non-electric initiation signal and detonates fol- lowing the delay determined by the electronic circuit. The detonator housing (112) or an op- tional sleeve (22) provides an enclosure for the assembly (55). The circuit encapsulation may include one or more bushings such as O-rings (14g, 14g') disposed about the circuit casing (14e).

5. 发明专利

BR9712479C1 未知
公开(公告)号：BR9712479C1
公开(公告)日：2001-10-02
申请号：BR9712479
申请日：1997-10-09
申请人： ENSIGN BICKFORD CO
发明人： MARSHALL PAUL N , TSEKA THOMAS C , FRITZ JAMES E , WALSH BRENDAN M
IPC分类号： F42B5/045

6. 发明专利

ZA9709757B Shock-resistant electronic circuit assembly 未知
公开(公告)号：ZA9709757B
公开(公告)日：1998-08-11
申请号：ZA9709757
申请日：1997-10-30
申请人： ENSIGN BICKFORD CO
发明人： MARSHALL PAUL N , WALSH BRENDAN M , TSEKA THOMAS C , FRITZ JAMES E
IPC分类号： F42C11/00 , F42B3/12 , F42C19/00 , H05K5/02 , F42C , F42D
CPC分类号： H05K5/0204 , F42B3/121 , F42C19/00

7. 发明专利

ZA9710987B Hybrid electronic detonator delay circuit assembly 未知
公开(公告)号：ZA9710987B
公开(公告)日：1998-07-20
申请号：ZA9710987
申请日：1997-12-08
申请人： ENSIGN BICKFORD CO
发明人： EWICK DAVID W , MARSHALL PAUL N , RODE KENNETH A , TSEKA THOMAS C , WALSH BRENDAN M
IPC分类号： F42B3/13 , F42B3/12 , F42C11/06 , F42B
摘要： An electronic delay circuit (10) for use in a detonator (100) has a switching circuit (20) and a timer circuit (22). Switching circuit (20) controls the flow of a stored charge of electrical energy from a storage capacitor (12) to a bridge initiation element such as a semiconductor bridge (18) or a tungsten bridge. The timing of the release of this energy is controlled by timer circuit (22). Switching circuit (20) is an integrated, dielectrically isolated, bipolar CMOS (DI BiCMOS) circuit, whereas timer circuit (22) is a conventional CMOS circuit. The use of a DI BiCMOS switching circuit allows for greater efficiency of energy transfer from the storage capacitor (12) to the semiconductor bridge (18) than has previously been attained.

8. 发明专利

CA2268244A1 SHOCK-RESISTANT ELECTRONIC CIRCUIT ASSEMBLY 未知
公开(公告)号：CA2268244A1
公开(公告)日：1998-05-28
申请号：CA2268244
申请日：1997-10-09
申请人： ENSIGN BICKFORD CO
发明人： TSEKA THOMAS C , MARSHALL PAUL N , FRITZ JAMES E , WALSH BRENDAN M
IPC分类号： F42C11/00 , F42B3/12 , F42C19/00 , H05K5/02 , F42C11/06 , F42D1/05 , F42C19/12
摘要： A shock-resistant electronic circuit assembly (10) is provided in which an electronic circuit is encased in an encapsulation (14) that engages a surrounding enclosure (18, 22) in shock-dispersing contact therewith. The encapsulation may have a plurality of edges (16, 16a, 16b), fins (24) or bosses (70) that bear against the enclosure. The encapsulation may include a shock-absorbing material (14f) disposed against the enclosure to protect the circuit against vibrations and a structural support material (14e) to protect the circuit against stress. The circuit assembly (10) may contain a capacitor (34) for storing an electrical signal and timing circuitry for releasing the stored energy after a predetermined delay. The circuit assembly (10) may be part of a transducer-circuit assembly (55) that includes a transducer module (58) for converting shock wave energy into electrical energy for the electronic circuit, and the released enregy may be converted into a detonation initiation signal. Assembly (55) may be part of a detonator (100) that receives a non-electric initiation signal and detonates following the delay determined by the electronic circuit. The detonator housing (112) or an optional sleeve (22) provides an enclosure for the assembly (55).

9. 发明专利

ZA200002886B Shock-resistant electronic circuit assembly. 未知
公开(公告)号：ZA200002886B
公开(公告)日：2001-05-28
申请号：ZA200002886
申请日：2000-06-08
申请人： ENSIGN BICKFORD CO
发明人： MARSHALL PAUL N , TSEKA THOMAS C , WALSH BRENDAN M , FRITZ JAMES E
IPC分类号： F42C11/00 , F42B3/12 , F42C11/06 , F42C19/00 , H05K5/02 , F42C , F42D

10. 发明专利

NO992662L 未知
公开(公告)号：NO992662L
公开(公告)日：1999-08-09
申请号：NO992662
申请日：1999-06-02
申请人： ENSIGN BICKFORD CO
发明人： EWICK DAVID W , MARSHALL PAUL N
IPC分类号： F42B3/13 , F42B3/12 , F42C11/06 , F42B3/10
摘要： An electronic delay circuit (10) for use in a detonator (100) has a switching circuit (20) and a timer circuit (22). Switching circuit (20) controls the flow of a stored charge of electrical energy from a storage capacitor (12) to a bridge initiation element such as a semiconductor bridge (18) or a tungsten bridge. The timing of the release of this energy is controlled by timer circuit (22). Switching circuit (20) is an integrated, dielectrically isolated, bipolar CMOS (DI BiCMOS) circuit, whereas timer circuit (22) is a conventional CMOS circuit. The use of a DI BiCMOS switching circuit allows for greater efficiency of energy transfer from the storage capacitor (12) to the semiconductor bridge (18) than has previously been attained.

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