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    • 1. 发明申请
    • Semiconductor Memory Devices Including Offset Bit Lines
    • 包括偏移位线的半导体存储器件
    • US20090218609A1
    • 2009-09-03
    • US12465202
    • 2009-05-13
    • Doo-Hoon GooHan-Ku ChoJoo-Tae MoonSang-Gyun WooGi-Sung YeoKyoung-Yun Baek
    • Doo-Hoon GooHan-Ku ChoJoo-Tae MoonSang-Gyun WooGi-Sung YeoKyoung-Yun Baek
    • H01L27/108
    • H01L27/10814H01L27/0207H01L27/10882H01L27/11502
    • A semiconductor memory device may include a substrate having a plurality of active regions wherein each active region has a length in a direction of a first axis and a width in a direction of a second axis. The length may be greater than the width, and the plurality of active regions may be provided in a plurality of columns of active regions in the direction of the second axis. A plurality of wordline pairs may be provided on the substrate, with each wordline pair crossing active regions of a respective column of active regions defining a drain portion of each active region between wordlines of the respective wordline pair. A plurality of bitlines on the substrate may cross the plurality of wordline pairs, with each bitline being electrically coupled to a respective drain portion of an active region of each column, and with each bitline being arranged between the respective drain portion and another drain portion of an adjacent active region of the same column.
    • 半导体存储器件可以包括具有多个有源区的衬底,其中每个有源区具有在第一轴的方向上的长度和在第二轴的方向上的宽度。 长度可以大于宽度,并且多个有源区可以在第二轴的方向上设置在多个有效区列中。 可以在衬底上提供多个字线对,其中每个字线对跨越相应的有效区域列的有源区域,在相应字线对的字线之间限定每个有效区域的漏极部分。 衬底上的多个位线可以跨过多个字线对,每个位线电耦合到每个列的有源区的相应漏极部分,并且每个位线布置在相应的漏极部分和另一个漏极部分的另一个漏极部分之间 相同列的相邻有效区域。
    • 3. 发明授权
    • Semiconductor memory devices including offset bit lines
    • 包括偏移位线的半导体存储器件
    • US08013374B2
    • 2011-09-06
    • US12465202
    • 2009-05-13
    • Doo-Hoon GooHan-Ku ChoJoo-Tae MoonSang-Gyun WooGi-Sung YeoKyoung-Yun Baek
    • Doo-Hoon GooHan-Ku ChoJoo-Tae MoonSang-Gyun WooGi-Sung YeoKyoung-Yun Baek
    • H01L27/108
    • H01L27/10814H01L27/0207H01L27/10882H01L27/11502
    • A semiconductor memory device may include a substrate having a plurality of active regions wherein each active region has a length in a direction of a first axis and a width in a direction of a second axis. The length may be greater than the width, and the plurality of active regions may be provided in a plurality of columns of active regions in the direction of the second axis. A plurality of wordline pairs may be provided on the substrate, with each wordline pair crossing active regions of a respective column of active regions defining a drain portion of each active region between wordlines of the respective wordline pair. A plurality of bitlines on the substrate may cross the plurality of wordline pairs, with each bitline being electrically coupled to a respective drain portion of an active region of each column, and with each bitline being arranged between the respective drain portion and another drain portion of an adjacent active region of the same column.
    • 半导体存储器件可以包括具有多个有源区的衬底,其中每个有源区具有在第一轴的方向上的长度和在第二轴的方向上的宽度。 长度可以大于宽度,并且多个有源区可以在第二轴的方向上设置在多个有效区列中。 可以在衬底上提供多个字线对,其中每个字线对跨越相应的有效区域列的有源区域,在相应字线对的字线之间限定每个有效区域的漏极部分。 衬底上的多个位线可以跨过多个字线对,每个位线电耦合到每个列的有源区的相应漏极部分,并且每个位线布置在相应的漏极部分和另一个漏极部分的另一个漏极部分之间 相同列的相邻有效区域。