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1. 发明申请

US20060101319A1 Input buffer device for de-rate matching in high speed turbo decoding block and method thereof 审中-公开
标题翻译：用于高速turbo解码块中的速率匹配的输入缓冲器及其方法
公开(公告)号：US20060101319A1
公开(公告)日：2006-05-11
申请号：US11267214
申请日：2005-11-07
申请人： Dong-Wook Park , Joo-Kwang Kim , Weon-Heum Park
发明人： Dong-Wook Park , Joo-Kwang Kim , Weon-Heum Park
IPC分类号： H03M13/00
CPC分类号： H03M13/635 , H03M13/2957
摘要： A high speed input buffer device for a turbo decoder and an input method thereof are provided. The input buffer device comprises a combing buffer for outputting stored symbols based on read addresses; a write MUX for dividing the output symbols into systematic, parity-1, and parity-2 symbols based on a BitSel signal, and outputting the divided symbols, first and second de-first rate matchers for individually performing a de-first rate matching operation with respect to the parity-1 and parity-2 symbols output from the write MUX, a data conversion unit generating code words, each of which contains a systematic symbol, a parity-1 symbol, and a parity-2 symbol, by using the systematic symbols output from the write MUX and the de-first-rate-matched parity-1 and parity-2 symbols, an input buffer unit having a double buffer structure, containing code blocks corresponding to the plurality of turbo decoders, storing each of the code words in a memory area of a code block corresponding to a decoder distinction signal which represents one of the turbo decodes, and outputting the stored code words to relevant turbo decoders, and a buffer controller for providing the input buffer unit with the decoder distinction signal, and providing the write MUX with the BitSel signal for dividing the output symbols into systematic, parity-1, and parity-2 symbols. Since the number and the area of memory elements required for the input control for a decoder are reduced, processing time, the error occurrence rate upon realizing the chip, and power consumption can be reduced.
摘要翻译：提供了一种用于turbo解码器的高速输入缓冲器及其输入方法。输入缓冲器件包括一个梳状缓冲器，用于基于读取地址输出存储的符号; 写入MUX，用于根据BitSel信号将输出符号分成系统的，奇偶校验位1和奇偶校验2符号，并输出分割的符号，第一和第二去先速率匹配器，用于单独执行解除速率匹配操作相对于从写入MUX输出的奇偶校验1和奇偶校验2符号，数据转换单元通过使用第一和第二奇偶校验符号生成代码字，每个代码字包含系统符号，奇偶校验1符号和奇偶校验符号2 从写入MUX和解除速率匹配的奇偶校验1和奇偶校验2符号输出的系统符号，具有双缓冲结构的输入缓冲器单元，其包含与多个turbo解码器相对应的代码块，与代表turbo解码的解码器区分信号相对应的代码块的存储器区域中的代码字，并将存储的代码字输出到相关的turbo解码器;以及缓冲器控制器，用于向输入缓冲器单元提供解码器区分信号，以及向写MUX提供BitSel信号，以将输出符号分成系统的，奇偶校验位1和奇偶校验符号2。由于减少了解码器的输入控制所需的存储器元件的数量和面积，因此可以减少处理时间，实现芯片时的出错率和功耗。

2. 发明申请

US20070189233A1 Apparatus and method for processing input/output data in communication system 审中-公开
标题翻译：在通信系统中处理输入/输出数据的装置和方法
公开(公告)号：US20070189233A1
公开(公告)日：2007-08-16
申请号：US11655053
申请日：2007-01-18
申请人： Dong-Wook Park , Hyun-Bae Lee , Weon-Heum Park , Gang-Mi Gil , Hyun-Seok Yu
发明人： Dong-Wook Park , Hyun-Bae Lee , Weon-Heum Park , Gang-Mi Gil , Hyun-Seok Yu
IPC分类号： H04B7/216
CPC分类号： H04L1/0052 , H04L1/0067 , H04L1/0071
摘要： An apparatus and method for processing input/output data in a communication system is disclosed. By adding a controller that adjusts timing intervals between a first buffer having a first timing interval and a second buffer having a second timing interval, buffer usage can be minimized.
摘要翻译：公开了一种在通信系统中处理输入/输出数据的装置和方法。通过添加调整具有第一定时间隔的第一缓冲器和具有第二定时间隔的第二缓冲器之间的定时间隔的控制器，可以最小化缓冲器使用。

3. 发明申请

US20050166119A1 Apparatus and method for performing bit de-collection in a communication system using a high speed downlink packet access ( HSDPA) scheme 有权
标题翻译：在使用高速下行链路分组接入（HSDPA）方案的通信系统中执行比特解除收集的装置和方法
公开(公告)号：US20050166119A1
公开(公告)日：2005-07-28
申请号：US10989557
申请日：2004-11-17
申请人： Dong-Wook Park , Joo-Kwang Kim , Jung-Hwan Rim
发明人： Dong-Wook Park , Joo-Kwang Kim , Jung-Hwan Rim
IPC分类号： H04L12/56 , G06F11/00 , G06F11/30 , G08C25/00 , H03M13/00 , H04L1/00 , H04L1/18
CPC分类号： H04L1/0068 , H04L1/0071 , H04L1/1812
摘要： An apparatus and a method for performing a bit de-collection according to a hybrid automatic retransmission request are disclosed. The apparatus includes a column counter for increasing one column every four bits and outputting a position of a current column in response to received bit sequences; a state detector for outputting state information of the current column by means of an output value of the column counter, a parameter denoting a number of rows to which systematic bits have been assigned, and a parameter denoting a number of columns to which the systematic bits have been assigned; and address generators for generating write addresses required for performing a write operation and read addresses required for performing a read operation according to the state information output from the state detector.
摘要翻译：公开了一种根据混合自动重传请求进行位解除收集的装置和方法。该装置包括用于每四位增加一列的列计数器，并响应于接收的位序列输出当前列的位置; 状态检测器，用于通过列计数器的输出值输出当前列的状态信息，表示已经分配了系统位的行的数量的参数，以及表示系统位的列数的参数已分配以及用于产生执行写入操作所需的写入地址的地址发生器，以及根据从状态检测器输出的状态信息来读取执行读取操作所需的地址。

4. 发明授权

US07269776B2 Apparatus and method for performing bit de-collection in a communication system using a high speed downlink packet access (HSDPA) scheme 有权
标题翻译：在使用高速下行链路分组接入（HSDPA）方案的通信系统中执行比特解除收集的装置和方法
公开(公告)号：US07269776B2
公开(公告)日：2007-09-11
申请号：US10989557
申请日：2004-11-17
申请人： Dong-Wook Park , Joo-Kwang Kim , Jung-Hwan Rim
发明人： Dong-Wook Park , Joo-Kwang Kim , Jung-Hwan Rim
IPC分类号： H03M13/00
CPC分类号： H04L1/0068 , H04L1/0071 , H04L1/1812
摘要： An apparatus and a method for performing a bit de-collection according to a hybrid automatic retransmission request are disclosed. The apparatus includes a column counter for increasing one column every four bits and outputting a position of a current column in response to received bit sequences; a state detector for outputting state information of the current column by means of an output value of the column counter, a parameter denoting a number of rows to which systematic bits have been assigned, and a parameter denoting a number of columns to which the systematic bits have been assigned; and address generators for generating write addresses required for performing a write operation and read addresses required for performing a read operation according to the state information output from the state detector.
摘要翻译：公开了一种根据混合自动重传请求进行位解除收集的装置和方法。该装置包括用于每四位增加一列的列计数器，并响应于接收的位序列输出当前列的位置; 状态检测器，用于通过列计数器的输出值输出当前列的状态信息，表示已经分配了系统位的行的数量的参数，以及表示系统位的列数的参数已分配以及用于产生执行写入操作所需的写入地址的地址发生器，以及根据从状态检测器输出的状态信息来读取执行读取操作所需的地址。

5. 发明授权

US08513070B2 Methods of manufacturing wire, TFT, and flat panel display device 有权
标题翻译：制造线，TFT和平板显示装置的方法
公开(公告)号：US08513070B2
公开(公告)日：2013-08-20
申请号：US13200379
申请日：2011-09-23
申请人： Dong-Wook Park , Jong-Hyun Park
发明人： Dong-Wook Park , Jong-Hyun Park
IPC分类号： H01L21/84 , H01L21/00 , H01L21/461 , H01L21/311
CPC分类号： H01L27/124 , H01L27/1259 , H01L29/42384 , H01L29/78645 , H05K3/062 , H05K3/064 , H05K2201/0361 , H05K2203/0554 , H05K2203/0597 , Y10T29/49156
摘要： A method of manufacturing a wire may include forming a wire pattern, which at least includes a first conductive layer, a second conductive layer, and a third conductive layer arranged in the order stated on a substrate. At least the second conductive layer may have higher etch selectivity than the first and third conductive layers. Side holes may be formed by removing portions of the second conductive layer at ends of the wire pattern, and fine wires may be formed by injecting a masking material into the side holes and patterning the wire pattern by using the masking material as a mask.
摘要翻译：线的制造方法可以包括形成至少包括第一导电层，第二导电层和在基板上按顺序排列的第三导电层的布线图案。至少第二导电层可具有比第一和第三导电层更高的蚀刻选择性。可以通过在线图案的端部去除第二导电层的部分来形成侧孔，并且可以通过将掩模材料注入侧孔中并且通过使用掩模材料作为掩模来图案化线图案来形成细线。

6. 发明授权

US09311856B2 Driver with separate power sources and display device using the same 有权
标题翻译：具有独立电源的驱动器和使用相同的显示设备
公开(公告)号：US09311856B2
公开(公告)日：2016-04-12
申请号：US13315548
申请日：2011-12-09
申请人： Dong-Wook Park , Ki-Nyeng Kang , Keum-Nam Kim
发明人： Dong-Wook Park , Ki-Nyeng Kang , Keum-Nam Kim
IPC分类号： G09G3/30 , G09G3/32 , G11C19/18
CPC分类号： G09G3/3266 , G09G2300/0861 , G09G2320/0626 , G09G2320/064 , G11C19/184
摘要： A driver and a display device using the same may be provided. The driver, according to an exemplary embodiment includes at least one logic unit, receiving a plurality of clock signals and a plurality of input signals, to generate and sequentially transmit output signals to a plurality of pixel rows included in a display unit, and a buffer unit, receiving a plurality of control signals, to generate and simultaneously transmit the output signals of a same waveform to a plurality of pixels included in the display unit, wherein the at least one logic unit is supplied with a logic power source voltage, and the buffer unit is supplied with a buffer power source voltage, the buffer power source voltage being different from the logic power source voltage.
摘要翻译：可以提供驱动器和使用其的显示装置。根据示例性实施例的驱动器包括至少一个逻辑单元，接收多个时钟信号和多个输入信号，以产生并顺序地将输出信号发送到包括在显示单元中的多个像素行，以及缓冲器单元，接收多个控制信号，以产生并同时将相同波形的输出信号发送到包括在显示单元中的多个像素，其中至少一个逻辑单元被提供有逻辑电源电压，并且缓冲单元提供缓冲电源电压，缓冲电源电压不同于逻辑电源电压。

7. 发明授权

US08963214B2 Thin film transistor, method of manufacturing the thin film transistor and organic light emitting display device have the thin film transistor 有权
标题翻译：薄膜晶体管，制造薄膜晶体管的方法和有机发光显示装置具有薄膜晶体管
公开(公告)号：US08963214B2
公开(公告)日：2015-02-24
申请号：US12892820
申请日：2010-09-28
申请人： Roman Kondratyuk , Ki-Ju Im , Dong-Wook Park , Yeon-Gon Mo , Hye-Dong Kim
发明人： Roman Kondratyuk , Ki-Ju Im , Dong-Wook Park , Yeon-Gon Mo , Hye-Dong Kim
IPC分类号： H01L27/148 , H01L29/786 , H01L27/12 , H01L27/32
CPC分类号： H01L29/7869 , H01L27/1225 , H01L27/3262 , H01L29/78645 , H01L29/78696
摘要： A thin film transistor for an organic light emitting display device is disclosed. In one embodiment, the thin film transistor includes: a substrate, an active layer formed over the substrate, wherein the active layer is formed of an oxide semiconductor, a gate insulating layer formed over the substrate and the active layer, and source and drain electrodes formed on the gate insulating layer and electrically connected to the active layer. The transistor may further include a gate electrode formed on the gate insulating layer and formed between the source and drain electrodes, wherein the gate electrode is spaced apart from the source electrode so as to define a first offset region therebetween, and wherein the gate electrode is spaced apart from the drain electrode so as to define a second offset region therebetween. The transistor may further include a passivation layer formed on i) the gate insulating layer, ii) the source and drain electrodes and iii) the gate electrode; and at least one auxiliary gate electrode formed on the passivation layer, wherein at least a portion of the auxiliary gate electrode is located directly above the first and second offset regions.
摘要翻译：公开了一种用于有机发光显示装置的薄膜晶体管。在一个实施例中，薄膜晶体管包括：衬底，在衬底上形成的有源层，其中有源层由氧化物半导体形成，栅极绝缘层形成在衬底和有源层上，以及源极和漏极形成在栅绝缘层上并电连接到有源层。晶体管还可以包括形成在栅极绝缘层上并形成在源电极和漏电极之间的栅电极，其中栅电极与源电极间隔开，以便在它们之间限定第一偏移区域，并且其中栅电极与漏极间隔开，以便在它们之间限定第二偏移区域。晶体管还可以包括在i）栅极绝缘层上形成的钝化层，ii）源极和漏极，以及iii）栅电极; 以及形成在所述钝化层上的至少一个辅助栅极电极，其中所述辅助栅电极的至少一部分位于所述第一和第二偏移区域的正上方。

8. 发明授权

US08854347B2 Organic light emitting display device 有权
标题翻译：有机发光显示装置
公开(公告)号：US08854347B2
公开(公告)日：2014-10-07
申请号：US13273079
申请日：2011-10-13
申请人： Yong-Sung Park , Chul-Kyu Kang , Dong-Wook Park , Bo-Yong Chung
发明人： Yong-Sung Park , Chul-Kyu Kang , Dong-Wook Park , Bo-Yong Chung
IPC分类号： G06F3/038 , G09G3/30 , G09G3/32
CPC分类号： G06F3/038 , G09G3/30 , G09G3/3225 , G09G3/3266 , G09G2300/0408 , G09G2300/0426 , G09G2310/0281 , G09G2310/0283 , G09G2320/0223
摘要： An organic light emitting display device for improving the yield and for reducing or minimizing manufacturing costs. The organic light emitting display device includes: a data driver coupled to data lines that are formed on the panel; a scan driver mounted on the panel and coupled to scan lines that are formed on the panel; input lines for receiving clock signals from the outside; first connecting lines overlapped with a cathode electrode and electrically coupled to the input lines and for supplying the clock signals to the scan driver; second connecting lines electrically coupled to the input lines; and third connecting lines for electrically coupling the first connecting lines to the second connecting lines.
摘要翻译：一种用于提高产量并降低或最小化制造成本的有机发光显示装置。有机发光显示装置包括：耦合到形成在面板上的数据线的数据驱动器; 安装在面板上并耦合到形成在面板上的扫描线的扫描驱动器; 用于从外部接收时钟信号的输入线; 第一连接线与阴极重叠并电耦合到输入线并用于将时钟信号提供给扫描驱动器; 电连接到输入线的第二连接线; 以及用于将第一连接线电连接到第二连接线的第三连接线。

9. 发明申请

US20120133626A1 Scan driver and method of driving the same 审中-公开
标题翻译：扫描驱动程序及其驱动方法
公开(公告)号：US20120133626A1
公开(公告)日：2012-05-31
申请号：US13137974
申请日：2011-09-22
申请人： Kyung-Hoon Chung , Seong-Il Park , Dong-Wook Park
发明人： Kyung-Hoon Chung , Seong-Il Park , Dong-Wook Park
IPC分类号： G06F3/038
CPC分类号： G09G3/3648 , G09G2310/02 , G09G2310/0205 , G09G2310/0264 , G09G2310/0286
摘要： A scan driver of a display device may include a plurality of scan lines. The scan driver may include a plurality of stages configured to transmit scan signals to the scan lines. Each stage may include an input terminal for receiving a scan signal from a previous stage, an output terminal, an output unit, a sequential switching unit, and a simultaneous switching unit. The output unit may be coupled to the output terminal, and outputs a corresponding scan signal to the output terminal. The sequential switching unit may be coupled to the input terminal, and controls the output unit such that the output unit of each stage sequentially outputs the scan signals having a first voltage in a first period. The simultaneous switching unit may control the output unit such that the output unit of each stage simultaneously output the scan signals having a predetermined voltage in a second period.
摘要翻译：显示装置的扫描驱动器可以包括多条扫描线。扫描驱动器可以包括被配置为将扫描信号发送到扫描线的多个级。各级可以包括用于从前一级接收扫描信号的输入端子，输出端子，输出单元，顺序切换单元和同时切换单元。输出单元可以耦合到输出端，并将相应的扫描信号输出到输出端。顺序切换单元可以耦合到输入端，并且控制输出单元，使得每个级的输出单元在第一周期中顺序地输出具有第一电压的扫描信号。同时切换单元可以控制输出单元，使得每个级的输出单元在第二周期中同时输出具有预定电压的扫描信号。

10. 发明申请

US20110285752A1 Light emission control driver, light emitting display device using the same, and method for driving light emission control signal 有权
标题翻译：发光控制驱动器，使用其的发光显示装置以及驱动发光控制信号的方法
公开(公告)号：US20110285752A1
公开(公告)日：2011-11-24
申请号：US12929227
申请日：2011-01-10
申请人： Dong-Wook Park , Kyung-Hoon Chung
发明人： Dong-Wook Park , Kyung-Hoon Chung
IPC分类号： G09G5/10 , H05B37/02
CPC分类号： G09G3/3225 , G09G3/3266 , G09G2300/0861 , G09G2310/0286 , G11C19/28
摘要： A light emission control driver includes a first logic unit configured to receive a plurality of clock signals and a first input signal and generate a first output signal; a second logic unit configured to receive a plurality of clock signals and a second input signal and generate a second output signal; and an output controller configured to receive the first output signal, the second output signal, a first control signal, and a second control signal, and generate a light emission control signal. When a driving scheme of a display unit is a simultaneous light emission mode, the light emission control signal is controlled according to driving of the output controller, and, when the driving scheme of the display unit is a progressive light emission mode, the light emission control signal is controlled according to driving of the first logic unit, the second logic unit, and the output controller.
摘要翻译：发光控制驱动器包括：第一逻辑单元，被配置为接收多个时钟信号和第一输入信号并产生第一输出信号; 第二逻辑单元，被配置为接收多个时钟信号和第二输入信号并产生第二输出信号; 以及输出控制器，被配置为接收第一输出信号，第二输出信号，第一控制信号和第二控制信号，并且生成发光控制信号。当显示单元的驱动方案是同时发光模式时，根据输出控制器的驱动来控制发光控制信号，并且当显示单元的驱动方案是逐行发光模式时，发光根据第一逻辑单元，第二逻辑单元和输出控制器的驱动来控制控制信号。

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