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1. 发明授权

US09879226B2 Mesenchymal stem cell basic culturing medium 有权
公开(公告)号：US09879226B2
公开(公告)日：2018-01-30
申请号：US14241393
申请日：2011-09-06
申请人： Dong-Sam Suh , Jun Keun Lee , Dong Il Chang , Min Jung Choi , Jang Hoon Kim , Ga Ram Kim , Cheong Ho Chang
发明人： Dong-Sam Suh , Jun Keun Lee , Dong Il Chang , Min Jung Choi , Jang Hoon Kim , Ga Ram Kim , Cheong Ho Chang
IPC分类号： C12N5/0775
CPC分类号： C12N5/0667 , C12N5/0663 , C12N2500/32 , C12N2500/34 , C12N2500/38
摘要： Disclosed is a basic culture medium for mesenchymal stem cells, and a cell therapeutic agent cultured and differentiated using same. The basic culture medium reduces the time taken from collection to mass culturing by increasing the proliferation rate of undifferentiated mesenchymal stem cells derived from an adult tissue such as human marrow and adipose tissue, and also is capable of various differentiations into treating agents for bone-forming cells, for cartilage cells, or for fat cells.

2. 发明申请

US20140370600A1 METHOD OF PREPARING MESENCHYMAL STEM CELL BASIC CULTURING MEDIUM, MAKING OF CELLULAR THERAPY PRODUCT WITH MESENCHYMAL STEM CELL BASIC CULTURING MEDIUM, AND THE DIFFERENTIATED ONE BY USING THE MEDIUM 有权
标题翻译：制备中胚层干细胞基础培养液的方法，用细胞培养基制备细胞干细胞基质培养基的细胞治疗产物，使用中等化合物制备差异化物质
公开(公告)号：US20140370600A1
公开(公告)日：2014-12-18
申请号：US14241393
申请日：2011-09-06
申请人： Dong-Sam Suh , Jun Keun Lee , Dong Il Chang , Min Jung Choi , Jang Hoon Kim , Ga Ram Kim , Cheong Ho Chang
发明人： Dong-Sam Suh , Jun Keun Lee , Dong Il Chang , Min Jung Choi , Jang Hoon Kim , Ga Ram Kim , Cheong Ho Chang
IPC分类号： C12N5/0775
CPC分类号： C12N5/0667 , C12N5/0663 , C12N2500/32 , C12N2500/34 , C12N2500/38
摘要： Disclosed is a basic culture medium for mesenchymal stem cells, and a cell therapeutic agent cultured and differentiated using same. The basic culture medium reduces the time taken from collection to mass culturing by increasing the proliferation rate of undifferentiated mesenchymal stem cells derived from an adult tissue such as human marrow and adipose tissue, and also is capable of various differentiations into treating agents for bone-forming cells, for cartilage cells, or for fat cells.
摘要翻译：公开了间充质干细胞的基础培养基和使用其培养和分化的细胞治疗剂。碱性培养基通过增加源于成人组织如人骨髓和脂肪组织的未分化的间充质干细胞的增殖速率而减少从收集到大量培养所需的时间，并且还能够各种分化成骨形成治疗剂细胞，软骨细胞，或脂肪细胞。

3. 发明申请

US20150141344A1 COMPOSITION FOR REPAIRING CARTILAGE TISSUE, METHOD FOR PRODUCING SAME, AND USE THEREOF 审中-公开
标题翻译：用于修复洗涤组织的组合物，其生产方法及其用途
公开(公告)号：US20150141344A1
公开(公告)日：2015-05-21
申请号：US14401704
申请日：2012-06-08
申请人： Se Ken Yeo , Cheong Ho Chang , Ji Chul Yoo , Dong Sam Suh , Jun Keun Lee , Sang Hun Woo
发明人： Se Ken Yeo , Cheong Ho Chang , Ji Chul Yoo , Dong Sam Suh , Jun Keun Lee , Sang Hun Woo
IPC分类号： A61K38/39 , A61M5/31 , A61K31/728
CPC分类号： A61K38/39 , A61K31/728 , A61L27/26 , A61L2400/06 , A61L2430/06 , A61M5/31 , A61M2210/02 , C08L5/08 , C08L89/06
摘要： The present invention relates to a composition for repairing cartilage tissue, to a method for producing same, and to the use thereof. The present invention provides a composition for repairing cartilage tissue, which is obtained by mixing collagen and hyaluronic acid using a two-way syringe or a mixer, wherein the collagen has a diluted concentration of 5-60 mg/mL excepting water or a physiological phosphate buffer solution, and the hyaluronic acid has a diluted concentration of 5-20 mg/mL excepting water or a physiological phosphate buffer solution.
摘要翻译：本发明涉及一种用于修复软骨组织的组合物，其制备方法及其用途。本发明提供了一种用于修复软骨组织的组合物，其通过使用双向注射器或混合器混合胶原和透明质酸获得，其中所述胶原具有5-60mg / mL的稀释浓度，除了水或生理磷酸盐缓冲溶液，透明质酸除了水或生理磷酸盐缓冲溶液以外，其浓度为5-20mg / mL。

4. 发明申请

US20080276053A1 Portable Device and Method for Controlling Deep Power Down Mode of Shared Memory 审中-公开
标题翻译：用于控制共享内存的深度掉电模式的便携式设备和方法
公开(公告)号：US20080276053A1
公开(公告)日：2008-11-06
申请号：US12094060
申请日：2007-02-03
申请人： Jun Keun Lee
发明人： Jun Keun Lee
IPC分类号： G06F12/00
CPC分类号： G06F1/3203 , G06F1/3275 , Y02D10/13 , Y02D10/14
摘要： The memory device may include a first determination unit for determining whether entry into a DPD mode is to be made by interpreting signals received from a first processor, and generating and outputting a corresponding first DPD entry signal; a second determination unit for determining whether entry into the DPD mode is to be made by interpreting signals received from a second processor, and generating and outputting a corresponding second DPD entry signal; and a DPD determination unit for performing control for operation in the DPD mode only when the first DPD entry signal and the second DPD entry signal are respectively received from the first determination unit and the second determination unit. In accordance with the present invention, a single piece of memory operates in the DPD mode even when a plurality of processors shares the memory, so that power consumption can be minimized.
摘要翻译：存储装置可以包括：第一确定单元，用于确定是否通过解释从第一处理器接收到的信号来进入DPD模式，并且生成并输出对应的第一DPD条目信号; 第二确定单元，用于确定是否通过解释从第二处理器接收的信号来进入DPD模式，并且生成并输出相应的第二DPD条目信号; DPD确定单元，用于仅当从第一确定单元和第二确定单元分别接收到第一DPD输入信号和第二DPD输入信号时，执行DPD模式下的操作控制。根据本发明，即使当多个处理器共享存储器时，单片存储器也以DPD模式工作，从而能够最小化功耗。

5. 发明授权

US06307400B1 Data register circuit in memory device 失效
标题翻译：存储器件中的数据寄存器电路
公开(公告)号：US06307400B1
公开(公告)日：2001-10-23
申请号：US09606774
申请日：2000-06-28
申请人： Saeng Hwan Kim , Jun Keun Lee
发明人： Saeng Hwan Kim , Jun Keun Lee
IPC分类号： H03K190185
CPC分类号： G11C7/1087 , G11C7/1078
摘要： A data register circuit, comprising: input means which includes a first input portion and a second input portion, the first input portion being reset by a data reset signal and buffering a data signal from a data line in accordance with a data fetch signal and the second input portion being reset by a data reset signal and buffering a data bar signal from a data bar line in accordance with the data fetch signal; storing means which includes a first flip flop and a second flip flop, the first and second flip flops for respectively receiving output signals of the first and second input portions of the input means and providing inverting signals of the output signals of the first and second input portions until the output signals of the first and second input portions are changed by the data reset signal, a first latch which is connected between the first input portion and the first flip flop and temporarily stores the output signal of the first input portion and a second latch which is connected between the second input portion and the second flip flop and temporarily stores the output signal of the second input portion; and data output means which includes a first output portion for receiving and buffering an output signal of the first flip flop and for providing an output signal through a pull-down terminal by a data output control signal and a second output portion for receiving and buffering an output signal of the second flip flop and for providing it an output signal through a pull-up terminal by the data output control signal.
摘要翻译：一种数据寄存器电路，包括：输入装置，其包括第一输入部分和第二输入部分，所述第一输入部分由数据复位信号复位，并根据数据获取信号从数据线缓冲数据信号;以及第二输入部分由数据复位信号复位，并根据数据获取信号从数据条线缓冲数据条信号; 存储装置，其包括第一触发器和第二触发器，所述第一和第二触发器分别接收输入装置的第一和第二输入部分的输出信号，并提供第一和第二输入的输出信号的反相信号部分，直到第一和第二输入部分的输出信号被数据复位信号改变，第一锁存器连接在第一输入部分和第一触发器之间，并临时存储第一输入部分的输出信号，第二锁存器锁存器，其连接在第二输入部分和第二触发器之间，并临时存储第二输入部分的输出信号; 以及数据输出装置，其包括第一输出部分，用于接收和缓冲第一触发器的输出信号，并通过数据输出控制信号通过下拉端提供输出信号;以及第二输出部分，用于接收和缓冲输出信号，并通过数据输出控制信号通过上拉端提供输出信号。

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