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    • 5. 发明授权
    • Semiconductor device and method of manufacturing the same
    • 半导体装置及其制造方法
    • US07482276B2
    • 2009-01-27
    • US11613210
    • 2006-12-20
    • Han Choon LeeKyung Min ParkCheon Man Shim
    • Han Choon LeeKyung Min ParkCheon Man Shim
    • H01L21/311
    • H01L21/76831H01L21/76825H01L23/5283H01L23/53238H01L2924/0002H01L2924/00
    • A semiconductor device and method of manufacturing same, capable of preventing the material of a barrier metal layer from penetrating into an intermetallic insulating layer are provided. In an embodiment, the device can include: a first metal interconnection formed in a lower insulating layer on a semiconductor substrate; an intermetallic insulating layer formed on the lower insulating layer including the first metal interconnection, the intermetallic insulating layer having a via hole and a trench for a second metal interconnection connecting to the first metal interconnection; a carbon implantation layer formed on inner walls of the via hole and the trench of the intermetallic insulating layer; a barrier metal layer deposited on the first metal interconnection exposed through the via hole and on the carbon implantation layer; a via formed in the via hole; and the second metal interconnection formed in the trench.
    • 提供了能够防止阻挡金属层的材料渗透到金属间绝缘层中的半导体器件及其制造方法。 在一个实施例中,该器件可以包括:形成在半导体衬底上的下绝缘层中的第一金属互连; 形成在包括第一金属互连的下绝缘层上的金属间绝缘层,具有通孔的金属间绝缘层和连接到第一金属互连的第二金属互连的沟槽; 在所述通孔的内壁和所述金属间绝缘层的沟槽上形成的碳注入层; 沉积在通过通孔和碳注入层暴露的第一金属互连上的阻挡金属层; 通孔形成在通孔中; 以及形成在沟槽中的第二金属互连。
    • 6. 发明授权
    • Method for manufacturing semiconductor device
    • 制造半导体器件的方法
    • US07427561B2
    • 2008-09-23
    • US11293081
    • 2005-12-05
    • Han Choon Lee
    • Han Choon Lee
    • H01L21/00H01L21/44
    • H01L21/28518H01L29/665H01L29/66515H01L29/6659
    • A semiconductor device manufacturing method wherein a metal suicide layer is formed via an in-situ process. The method includes forming a gate electrode on a semiconductor substrate; forming an insulation side wall at either lateral surface of the gate electrode; forming a source/drain region in a surface of the semiconductor substrate at either side of the gate electrode; forming a metal layer on the surface of the semiconductor substrate including the gate electrode; performing a plasma treatment on the metal layer; forming a capping material layer on the metal layer; performing an annealing process upon the semiconductor substrate, to form a metal silicide layer on the surface of the semiconductor substrate at positions corresponding to the gate electrode and the source/drain region; and removing the capping material layer and the metal layer remained without reaction with the gate electrode and the semiconductor substrate.
    • 一种其中通过原位工艺形成金属硅化物层的半导体器件制造方法。 该方法包括在半导体衬底上形成栅电极; 在栅电极的任一侧面上形成绝缘侧壁; 在所述栅电极的任一侧在所述半导体衬底的表面中形成源/漏区; 在包括栅电极的半导体衬底的表面上形成金属层; 对金属层进行等离子体处理; 在所述金属层上形成覆盖材料层; 在半导体衬底上进行退火处理,在对应于栅电极和源极/漏极区的位置处在半导体衬底的表面上形成金属硅化物层; 并且除去覆盖材料层和金属层而不与栅电极和半导体衬底反应。
    • 8. 发明申请
    • Semiconductor Device and Method of Manufacturing the Same
    • 半导体器件及其制造方法
    • US20070152336A1
    • 2007-07-05
    • US11613210
    • 2006-12-20
    • Han Choon LeeKyung Min ParkCheon Man Shim
    • Han Choon LeeKyung Min ParkCheon Man Shim
    • H01L23/52
    • H01L21/76831H01L21/76825H01L23/5283H01L23/53238H01L2924/0002H01L2924/00
    • A semiconductor device and method of manufacturing same, capable of preventing the material of a barrier metal layer from penetrating into an intermetallic insulating layer are provided. In an embodiment, the device can include: a first metal interconnection formed in a lower insulating layer on a semiconductor substrate; an intermetallic insulating layer formed on the lower insulating layer including the first metal interconnection, the intermetallic insulating layer having a via hole and a trench for a second metal interconnection connecting to the first metal interconnection; a carbon implantation layer formed on inner walls of the via hole and the trench of the intermetallic insulating layer; a barrier metal layer deposited on the first metal interconnection exposed through the via hole and on the carbon implantation layer; a via formed in the via hole; and the second metal interconnection formed in the trench.
    • 提供了能够防止阻挡金属层的材料渗透到金属间绝缘层中的半导体器件及其制造方法。 在一个实施例中,该器件可以包括:形成在半导体衬底上的下绝缘层中的第一金属互连; 形成在包括第一金属互连的下绝缘层上的金属间绝缘层,具有通孔的金属间绝缘层和连接到第一金属互连的第二金属互连的沟槽; 在所述通孔的内壁和所述金属间绝缘层的沟槽上形成的碳注入层; 沉积在通过通孔和碳注入层暴露的第一金属互连上的阻挡金属层; 通孔形成在通孔中; 以及形成在沟槽中的第二金属互连。