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1. 发明授权

US4399516A Stored-program control machine 失效
标题翻译：存储程序控制机
公开(公告)号：US4399516A
公开(公告)日：1983-08-16
申请号：US233143
申请日：1981-02-10
申请人： Donald E. Blahut , Marc L. Harrison , Michael J. Killian , Mark E. Thierbach
发明人： Donald E. Blahut , Marc L. Harrison , Michael J. Killian , Mark E. Thierbach
IPC分类号： G06F9/22 , G06F15/78
CPC分类号： G06F15/7832 , G06F9/223
摘要： A hierarchical organization of programmable logic arrays permits the control of microprocessor functions to be achieved in a way which allows otherwise wasted clock time to be used. The mostly independent operations of the several PLA's is organized by "handshake" signals from the latches of one PLA to those of another via AND circuits operative to selectively enable clock signals, in some instances, and data in other instances, to be applied to the latches. The use of the AND circuits enables requisite operations to be achieved with relatively small PLA's.
摘要翻译：可编程逻辑阵列的分级组织允许以允许使用时间浪费时间的方式来实现微处理器功能的控制。几个PLA的大部分独立操作是通过一个PLA的锁存器通过与另一个通道的“握手”信号通过AND电路组织的，电路在某些情况下有选择地启用时钟信号，并且在其他情况下将数据应用于锁存器使用AND电路可以通过相对较小的PLA实现必要的操作。

2. 再颁专利

USRE32858E Stored-program control machine 失效
标题翻译：存储程序控制机
公开(公告)号：USRE32858E
公开(公告)日：1989-02-07
申请号：US766912
申请日：1985-08-16
申请人： Donald E. Blahut , Marc L. Harrison , Mark E. Thierbach
发明人： Donald E. Blahut , Marc L. Harrison , Mark E. Thierbach
IPC分类号： G06F9/22 , G06F15/78
CPC分类号： G06F9/223 , G06F15/7832
摘要： A hierarchical organization of programmable logic arrays permits the control of microprocessor functions to be achieved in a way which allows otherwise wasted clock time to be used. The mostly independent operations of the several PLA's is organized by "handshake" signals from the latches of one PLA to those of another via AND circuits operative to selectively enable clock signals, in some instances, and data in other instances, to be applied to the latches. The use of the AND circuits enables requisite operations to be achieved with relatively small PLA's.

3. 发明授权

US4484260A Stored-program control machine 失效
标题翻译：存储程序控制机
公开(公告)号：US4484260A
公开(公告)日：1984-11-20
申请号：US331689
申请日：1981-12-17
申请人： Donald E. Blahut , Marc L. Harrison
发明人： Donald E. Blahut , Marc L. Harrison
IPC分类号： G06F7/00 , G06F9/22
CPC分类号： G06F9/226
摘要： A microprocessor with a hierarchical PLA control arrangement with a relatively rich function capability is achieved by applying the same subsection of the bit field of the output register of a control PLA to the inputs of each of the controlled PLA's. In addition, routing bits in the output register of the control PLA are applied to gate the clocks at the inputs of the controlled PLA's. Significant increase in PLA function, relative to PLA size, is achieved.
摘要翻译：通过将控制PLA的输出寄存器的位字段的相同子部分应用到每个受控PLA的输入端，实现具有相对丰富的功能能力的分级PLA控制装置的微处理器。此外，控制PLA的输出寄存器中的路由位被应用于门控控制PLA的输入端的时钟。相对于PLA大小，PLA功能显着增加。

4. 发明授权

US4745548A Decentralized bus arbitration using distributed arbiters having circuitry for latching lockout signals gated from higher priority arbiters 失效
标题翻译：使用具有用于锁存从较高优先权仲裁器门控的锁定信号的电路的分布式仲裁器进行分散总线仲裁
公开(公告)号：US4745548A
公开(公告)日：1988-05-17
申请号：US9634
申请日：1987-01-23
申请人： Donald E. Blahut
发明人： Donald E. Blahut
IPC分类号： G06F13/378 , G06F13/00 , G06F13/18 , G06F13/26 , G06F13/36
CPC分类号： G06F13/378
摘要： A silicon semiconductor wafer containing a plurality of silicon integrated circuits formed therein or attached thereto contains at least one data bus to which some of the circuits are connected. Each of the circuits coupled to the data bus contains an arbitration request circuit which selectively passes a signal that requests that its circuit be given access to the data bus so it can transmit information to another circuit on the wafer. In addition, each of the circuits coupled to the data bus has an arbitration circuit which detects which of any of the circuits coupled to the data bus is requesting access to the data bus and facilitates its circuit gaining access to the data bus if its circuit has a higher preselected priority than any other circuit which is simultaneously seeking access to the data bus. The distribution of the arbitration request circuits and of the arbitration circuits simplifies layout and tends to improve the speed of operation.
摘要翻译：包含形成在其中或附着于其上的多个硅集成电路的硅半导体晶片包含至少一个数据总线，一些电路连接到该数据总线。耦合到数据总线的每个电路包含仲裁请求电路，该电路选择性地传递请求其电路被给予数据总线的信号，以便它可以向晶片上的另一个电路发送信息。另外，耦合到数据总线的每个电路具有仲裁电路，其检测耦合到数据总线的任何电路中的哪一个请求访问数据总线，并且如果其电路具有数据总线，则有助于其电路访问数据总线比同时寻求访问数据总线的任何其他电路更高的预选优先级。仲裁请求电路和仲裁电路的分布简化了布局，并且倾向于提高操作速度。

5. 发明授权

US4348720A Microcomputer arranged for direct memory access 失效
标题翻译：微机安排直接存取存取
公开(公告)号：US4348720A
公开(公告)日：1982-09-07
申请号：US71750
申请日：1979-08-31
申请人： Donald E. Blahut , Victor K. Huang , Richard L. Townsend, Jr.
发明人： Donald E. Blahut , Victor K. Huang , Richard L. Townsend, Jr.
IPC分类号： G06F13/00 , G06F13/28 , G06F1/00
CPC分类号： G06F13/285
摘要： A microcomputer system arranged for performing direct memory access operations has direct memory access circuitry included on a single chip with the main processor of the microcomputer. Addressing for direct memory access operations is accomplished by circuitry also used for generating addresses when processing routine instructions in the main processor.
摘要翻译：布置成执行直接存储器访问操作的微计算机系统具有包括在微芯片的主处理器的单个芯片上的直接存储器访问电路。用于直接存储器访问操作的寻址由在主处理器中处理例程指令时也用于产生地址的电路来实现。

6. 发明授权

US4258419A Data processing apparatus providing variable operand width operation 失效
标题翻译：提供可变操作数宽度操作的数据处理装置
公开(公告)号：US4258419A
公开(公告)日：1981-03-24
申请号：US974425
申请日：1978-12-29
申请人： Donald E. Blahut , David H. Copp , Daniel C. Stanzione
发明人： Donald E. Blahut , David H. Copp , Daniel C. Stanzione
IPC分类号： G06F9/318 , G06F9/34
CPC分类号： G06F9/30014 , G06F9/30032 , G06F9/30076 , G06F9/30189
摘要： A Central Processing Unit provides programmable variation of the operand width for processor operations. The operands are formed with one or more N-bit segments. The CPU includes an arithmetic logic unit (ALU) which is adapted to operate serially on one N-bit segment of the operand at a time beginning with the least significant segment and repeating the operation on the remaining segments according to their order of significance. The number of repetitions of an ALU operation is controlled by a code stored in an op-code extension register (OER). The code in the OER can be changed by means of an instruction for transferring a new code to OER.
摘要翻译：中央处理单元为处理器操作提供了操作数宽度的可编程变化。操作数由一个或多个N位段形成。 CPU包括算术逻辑单元（ALU），该算术逻辑单元（ALU）适于在从最小有效段开始的时间处对操作数的一个N位段进行串行操作，并根据其有意义的顺序重复对剩余段的操作。 ALU操作的重复次数由存储在操作码扩展寄存器（OER）中的代码控制。可以通过用于将新代码传送到OER的指令来更改OER中的代码。

7. 发明授权

US07366196B2 Ranging arrangement and method for TDMA communications 有权
标题翻译：用于TDMA通信的测距布置和方法
公开(公告)号：US07366196B2
公开(公告)日：2008-04-29
申请号：US10897914
申请日：2004-07-23
申请人： Donald E. Blahut , Peter D. Magill
发明人： Donald E. Blahut , Peter D. Magill
IPC分类号： H04B7/212
CPC分类号： H04N7/22 , H04J3/0682 , H04L7/06 , H04N7/17309 , H04N2007/17381
摘要： An out-of-band ranging technique is automatically initiated at a customer premises equipment unit when the equipment is installed, when power is restored after a power failure or interruption, upon verification of the equipment, upon reconnection after a disconnection of the equipment or the like. To this end, an out-of-band tone is employed that is automatically transmitted when the customer premises equipment that transmits the TDMA signal is powered ON, or transmitted in response to a specific command generated locally or remotely. Specifically, when ranging is being effected the customer premises equipment generates and transmits the out-of-band ranging tone until a message is received from a remote terminal indicating that the transmission of the ranging tone be terminated. The loop delay being determined is the delay interval between transmission of the termination message and detection that transmission of the ranging tone has terminated. Then, a message is transmitted to the customer premises equipment that contains the ranging delay interval that is to be used in all future transmissions to the remote terminal.
摘要翻译：当设备安装时，当电源故障或中断之后恢复供电，验证设备时，在设备断开或重新连接之后，在客户驻地设备单元自动启动带外测距技术喜欢。为此，采用带外音调，当发送TDMA信号的客户驻地设备被接通或响应于本地或远程产生的特定命令而被发送时，该频带自动发送。具体来说，当进行测距时，客户驻地设备产生并发送带外测距音，直到从远程终端接收到表示测距音的发送终止的消息。确定的环路延迟是终止消息的发送与测距音的发送终止的检测之间的延迟间隔。然后，消息被发送到客户端设备，该设备包含要在将来向所有远程终端发送的将要使用的测距延迟间隔。

8. 发明授权

US5446490A Interactive television with tailored programming 失效
标题翻译：互动电视与量身定制的节目
公开(公告)号：US5446490A
公开(公告)日：1995-08-29
申请号：US965493
申请日：1992-10-23
申请人： Donald E. Blahut , Edward S. Szurkowski
发明人： Donald E. Blahut , Edward S. Szurkowski
IPC分类号： H04H20/38 , H04H20/76 , H04H20/78 , H04H60/21 , H04H60/80 , H04N7/173 , H04N21/258 , H04N21/435 , H04N21/458 , H04N7/10
CPC分类号： H04N21/434 , H04N7/17318
摘要： Different components of television programs, such as the video and audio components or different time segments of the program, are assigned to different channels transmitted in the form of packetized digital information in at least one of the channels of a multi-channel cable television distribution system. A particular subscriber's converter is configured to receive a particular subset of program components by enabling the converter to receive the virtual channels carrying the components in such subset. An embodiment is disclosed in which different combinations of program segments are enabled for different subscribers. Another embodiment is disclosed in which the viewing of a program by multiple subscribers who begin viewing at different times is synchronized by using "filler" program segments having different lengths.
摘要翻译：诸如视频和音频组件或节目的不同时间段的电视节目的不同组件被分配给在多频道有线电视分配系统的至少一个频道中以分组数字信息的形式发送的不同频道。特定用户的转换器被配置为通过使得转换器能够接收携带这种子集中的组件的虚拟通道来接收节目组件的特定子集。公开了一种实施例，其中针对不同的订户启用程序段的不同组合。公开了另一个实施例，其中通过使用具有不同长度的“填充”程序段来同步多个用户在不同时间观看节目的程序。

9. 发明授权

US4999808A Dual byte order data processor 失效
标题翻译：双字节顺序数据处理器
公开(公告)号：US4999808A
公开(公告)日：1991-03-12
申请号：US420631
申请日：1989-10-05
申请人： Donald E. Blahut , Brian W. Colbry , Thomas D. Lovett , Peter V. LaMaster
发明人： Donald E. Blahut , Brian W. Colbry , Thomas D. Lovett , Peter V. LaMaster
IPC分类号： G06F7/24 , G06F7/76
CPC分类号： G06F7/768 , G06F7/24
摘要： In order that a microprocessor can respond properly to both instruction words and data words that are organized in off-chip memory in accordance with either of two byte order conventions, on-chip circuitry is added which controllably changes the byte order of both the instructions and the data to that of the microprocessor.
摘要翻译：为了使微处理器能够根据两个字节顺序约定中的任何一个正确地响应组织在片外存储器中的两个指令字和数据字，添加片上电路，其可控地改变两个指令的字节顺序，数据到微处理器的数据。

10. 发明授权

US06796555B1 Centralized video controller for controlling distribution of video signals 有权
标题翻译：集中视频控制器，用于控制视频信号的分配
公开(公告)号：US06796555B1
公开(公告)日：2004-09-28
申请号：US09356978
申请日：1999-07-19
申请人： Donald E. Blahut
发明人： Donald E. Blahut
IPC分类号： H04L12/70 , H04N5/00 , H04N7/173 , H04N7/22 , H04N21/422 , H04N21/438 , H04N21/443 , H04N21/61 , H04N21/647 , H04N21/6543
CPC分类号： H04N21/42204 , H04N7/17309 , H04N21/4383 , H04N21/4436 , H04N21/6543
摘要： A single centralized video controller is employed to convert and distribute video channels to one or more analog TVs (i.e., viewing devices or the like). This is realized without the need for changes to either the TVs or the interconnecting COAX. Specifically, the centralized controller includes one or more MPEG2 decoders, the number of which depends on a desired number of active TVs to be used in viewing different programs, and one or more wireless (e.g., radio frequency (RF)) communications links to television controllers (i.e., remote control units) associated on a one-to-one basis with the desired number of TVs. In operation, channel selection for each of the one or more TVs is communicated up-stream from the centralized controller to a remote video server and, therein, to a video services controller. The video services controller causes the video server to transmit only the selected program channels to the local centralized video controller. However, when the video channel is already being supplied from the video server to an optical line terminal and, specifically, to an optical line card to which the requesting centralized controller is connected to, there is no need to communicate the channel request to the video server. The optical line terminal simply supplies the requested channel via an optical line card to the additional requesting centralized controller and, in turn, to the requesting TV.
摘要翻译：采用单个集中式视频控制器将视频通道转换并分发到一个或多个模拟电视（即，观看设备等）。这是实现的，而不需要改变电视机或互连COAX。具体来说，集中式控制器包括一个或多个MPEG2解码器，其数量取决于用于观看不同节目的所需数量的有效电视机，以及一个或多个无线（例如，射频（RF））到电视机的通信链路控制器（即远程控制单元）与所需数量的电视机一一对应地关联。在操作中，一个或多个TV中的每一个的信道选择从中央控制器向上传送到远程视频服务器，并且在其中传送到视频服务控制器。视频服务控制器使视频服务器仅将所选择的节目频道发送到本地集中式视频控制器。然而，当视频信道已经从视频服务器提供给光线路终端时，具体地，涉及与请求的集中式控制器连接的光线路卡，则不需要将信道请求传送到视频服务器。光线路终端简单地通过光线路卡将请求的频道提供给附加请求的集中控制器，并且依次提供给请求的电视机。

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