专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US06658438B1 Method for deleting stored digital data from write-once memory device 失效
标题翻译：用于从一次写入存储器件删除存储的数字数据的方法
公开(公告)号：US06658438B1
公开(公告)日：2003-12-02
申请号：US09638439
申请日：2000-08-14
申请人： Christopher S. Moore , Derek J. Bosch , Daniel C. Steere , J. James Tringali
发明人： Christopher S. Moore , Derek J. Bosch , Daniel C. Steere , J. James Tringali
IPC分类号： G06F1730
CPC分类号： G06F17/30952 , Y10S707/99953 , Y10S707/99956
摘要： A digital storage system is coupled to a write-once memory array. File delete commands are implemented by over-writing a destructive digital pattern to at least a portion of the memory cells associated with the file to be deleted. One disclosed system alters the manner in which a file delete command is implemented, depending upon whether the file is stored in a write-once memory or in a re-writable memory.
摘要翻译：数字存储系统耦合到一次写入存储器阵列。文件删除命令通过将破坏性数字模式重写到与要删除的文件相关联的存储器单元的至少一部分来实现。一个公开的系统根据文件是存储在一次写入存储器还是一个可重写存储器中来改变实现文件删除命令的方式。

2. 发明授权

US07966518B2 Method for repairing a neighborhood of rows in a memory array using a patch table 有权
标题翻译：使用补丁表修复存储器阵列中的行邻域的方法
公开(公告)号：US07966518B2
公开(公告)日：2011-06-21
申请号：US11803776
申请日：2007-05-15
申请人： Derek J. Bosch , Christopher S. Moore
发明人： Derek J. Bosch , Christopher S. Moore
IPC分类号： G06F11/00
CPC分类号： G11C29/804
摘要： A method for repairing a neighborhood of rows in a memory array using a patch table is disclosed. First data to be stored in row N in a memory array of the memory device, second data, if any, stored in row N−1 in the memory array, and third data, if any, stored in row N+1 in the memory array are stored in a temporary storage area of a memory device. The first data is written in row N, and, in response to an error, the first data, the second data, if any, and the third data, if any, are written in respective rows in a repair area in the memory device. The addresses of rows N−1, N, and N+1 are added to a table stored in the memory device to indicate which rows in the repair area should be used instead of rows N−1, N, and N+1.
摘要翻译：公开了一种使用补丁表修复存储器阵列中的行的邻域的方法。要存储在存储器装置的存储器阵列中的行N中的第一数据，存储在存储器阵列中的行N-1中的第二数据（如果有的话）以及存储在存储器中的行N + 1中的第三数据（如果有的话）阵列存储在存储器件的临时存储区域中。第一数据被写入行N，并且响应于错误，将第一数据，第二数据（如果有的话）和第三数据（如果有的话）写入存储器件中的修复区域中的相应行中。行N-1，N和N + 1的地址被添加到存储在存储装置中的表中，以指示应该使用修复区中的哪些行而不是行N-1，N和N + 1。

3. 发明授权

US07958390B2 Memory device for repairing a neighborhood of rows in a memory array using a patch table 有权
标题翻译：使用补丁表修复存储器阵列中行的邻域的存储器件
公开(公告)号：US07958390B2
公开(公告)日：2011-06-07
申请号：US11803756
申请日：2007-05-15
申请人： Derek J. Bosch , Christopher S. Moore
发明人： Derek J. Bosch , Christopher S. Moore
IPC分类号： G06F11/00
CPC分类号： G11C29/765
摘要： A memory device for repairing a neighborhood of rows in a memory array using a patch table is disclosed. In one embodiment, circuitry in the memory device is operative to store, in a temporary storage area of the memory device, (i) first data to be stored in row N in the memory array, (ii) second data, if any, stored in row N−1 in the memory array, and (iii) third data, if any, stored in row N+1 in the memory array. The circuitry is operative to write the first data in row N in the memory array, and, in response to an error in writing the first data, to write the first data, the second data, if any, and the third data, if any, in respective rows in a repair area in the memory device. The circuitry is further operative to add the addresses of rows N−1, N, and N+1 to a table stored in the memory device.
摘要翻译：公开了一种用于使用补丁表修复存储器阵列中的行的邻域的存储器件。在一个实施例中，存储器装置中的电路可操作以在存储器件的临时存储区域中存储（i）存储在存储器阵列中的行N中的第一数据，（ii）存储的第二数据在存储器阵列中的行N-1中，以及（iii）存储在存储器阵列中的行N + 1中的第三数据（如果有的话）。电路可操作地将存储器阵列中的行N中的第一数据写入，并且响应于写入第一数据的错误，写入第一数据，第二数据（如果有的话）和第三数据（如果有的话）在存储器件中的修复区域中的各行中。该电路进一步可操作以将行N-1，N和N + 1的地址添加到存储在存储装置中的表。

4. 发明申请

US20080288813A1 Method for repairing a neighborhood of rows in a memory array using a patch table 有权
标题翻译：使用补丁表修复存储器阵列中的行邻域的方法
公开(公告)号：US20080288813A1
公开(公告)日：2008-11-20
申请号：US11803776
申请日：2007-05-15
申请人： Derek J. Bosch , Christopher S. Moore
发明人： Derek J. Bosch , Christopher S. Moore
IPC分类号： G06F11/00
CPC分类号： G11C29/804
摘要： A method for repairing a neighborhood of rows in a memory array using a patch table is disclosed. First data to be stored in row N in a memory array of the memory device, second data, if any, stored in row N-1 in the memory array, and third data, if any, stored in row N+1 in the memory array are stored in a temporary storage area of a memory device. The first data is written in row N, and, in response to an error, the first data, the second data, if any, and the third data, if any, are written in respective rows in a repair area in the memory device. The addresses of rows N-1, N, and N+1 are added to a table stored in the memory device to indicate which rows in the repair area should be used instead of rows N-1, N, and N+1.
摘要翻译：公开了一种使用补丁表修复存储器阵列中的行的邻域的方法。要存储在存储器装置的存储器阵列中的行N中的第一数据，存储在存储器阵列中的行N-1中的第二数据（如果有的话）以及存储在存储器中的行N + 1中的第三数据（如果有的话）阵列存储在存储器件的临时存储区域中。第一数据被写入行N，并且响应于错误，将第一数据，第二数据（如果有的话）和第三数据（如果有的话）写入存储器件中的修复区域中的相应行中。行N-1，N和N + 1的地址被添加到存储在存储装置中的表中，以指示应该使用修复区中的哪些行而不是行N-1，N和N + 1。

5. 发明授权

US06424581B1 Write-once memory array controller, system, and method 有权
标题翻译：一次写入内存阵列控制器，系统和方法
公开(公告)号：US06424581B1
公开(公告)日：2002-07-23
申请号：US09638427
申请日：2000-08-14
申请人： Derek J. Bosch , Christopher S. Moore , Daniel C. Steere , J. James Tringali
发明人： Derek J. Bosch , Christopher S. Moore , Daniel C. Steere , J. James Tringali
IPC分类号： G11C700
CPC分类号： G06F21/79 , G11C16/20
摘要： A write-once memory device includes a memory array controller and an electronically resetable flag. The memory array controller prevents writing and erasing from a write-once memory array unless the flag is in a selected state. The memory device is used with a data storage system that automatically determines whether a memory device installed in the data storage system is a write-once memory, and then automatically sends a recognition signal to the memory device once it has been determined to be a write-once memory. The memory device (1) automatically sets the flag in response to the recognition signal, (2) automatically refuses to implement write and erase commands prior to receipt of the recognition signal and setting of the flag, and (3) implements write and erase commands subsequent to receipt of the recognition signal and setting of the flag. The memory device implements nondestructive commands such as read and status commands regardless of the state of the flag.
摘要翻译：一次写入存储器件包括存储器阵列控制器和电子可复位标志。存储器阵列控制器防止写入和擦除从一次写入存储器阵列，除非该标志处于选择的状态。存储装置与数据存储系统一起使用，该数据存储系统自动确定安装在数据存储系统中的存储装置是否是一次写入存储器，然后一旦确定为写入，则自动将识别信号发送到存储装置 - 记忆存储装置（1）响应于识别信号自动设置标志，（2）在接收到识别信号和设置标志之前自动拒绝执行写入和擦除命令，以及（3）实现写和擦除命令在接收到识别信号和设置标志之后。存储器件实现非破坏性命令，如读取和状态命令，而不管标志的状态如何。

6. 发明申请

US20080285365A1 Memory device for repairing a neighborhood of rows in a memory array using a patch table 有权
标题翻译：使用补丁表修复存储器阵列中行的邻域的存储器件
公开(公告)号：US20080285365A1
公开(公告)日：2008-11-20
申请号：US11803756
申请日：2007-05-15
申请人： Derek J. Bosch , Christopher S. Moore
发明人： Derek J. Bosch , Christopher S. Moore
IPC分类号： G11C29/00
CPC分类号： G11C29/765
摘要： A memory device for repairing a neighborhood of rows in a memory array using a patch table is disclosed. In one embodiment, circuitry in the memory device is operative to store, in a temporary storage area of the memory device, (i) first data to be stored in row N in the memory array, (ii) second data, if any, stored in row N−1 in the memory array, and (iii) third data, if any, stored in row N+1 in the memory array. The circuitry is operative to write the first data in row N in the memory array, and, in response to an error in writing the first data, to write the first data, the second data, if any, and the third data, if any, in respective rows in a repair area in the memory device. The circuitry is further operative to add the addresses of rows N−1, N, and N+1 to a table stored in the memory device.
摘要翻译：公开了一种用于使用补丁表修复存储器阵列中的行的邻域的存储器件。在一个实施例中，存储器设备中的电路可操作以在存储器件的临时存储区域中存储（i）要存储在存储器阵列中的行N中的第一数据，（ii）存储的第二数据在存储器阵列中的行N-1中，以及（iii）存储在存储器阵列中的行N + 1中的第三数据（如果有的话）。电路可操作地将存储器阵列中的行N中的第一数据写入，并且响应于写入第一数据的错误，写入第一数据，第二数据（如果有的话）和第三数据（如果有的话）在存储器件中的修复区域中的各行中。该电路进一步可操作以将行N-1，N和N + 1的地址添加到存储在存储装置中的表。

7. 发明授权

US07174351B2 Method for deleting stored digital data from write-once memory device 有权
标题翻译：用于从一次写入存储器件删除存储的数字数据的方法
公开(公告)号：US07174351B2
公开(公告)日：2007-02-06
申请号：US10674289
申请日：2003-09-29
申请人： Christopher S. Moore , Derek J. Bosch , Daniel C. Steere , J. James Tringali
发明人： Christopher S. Moore , Derek J. Bosch , Daniel C. Steere , J. James Tringali
IPC分类号： G06F12/00 , G06F17/30
CPC分类号： G06F17/30952 , Y10S707/99953 , Y10S707/99956
摘要： A digital storage system is coupled to a write-once memory array. File delete commands are implemented by over-writing a destructive digital pattern to at least a portion of the memory cells associated with the file to be deleted. One disclosed system alters the manner in which a file delete command is implemented, depending upon whether the file is stored in a write-once memory or in a re-writable memory.
摘要翻译：数字存储系统耦合到一次写入存储器阵列。文件删除命令通过将破坏性数字模式重写到与要删除的文件相关联的存储器单元的至少一部分来实现。一个公开的系统根据文件是存储在一次写入存储器还是一个可重写存储器中来改变实现文件删除命令的方式。

8. 发明授权

US07062602B1 Method for reading data in a write-once memory device using a write-many file system 有权
标题翻译：使用多写入文件系统在一次写入存储器件中读取数据的方法
公开(公告)号：US07062602B1
公开(公告)日：2006-06-13
申请号：US09878138
申请日：2001-06-08
申请人： Christopher S. Moore , J. James Tringali , Roger W. March , James E. Schneider , Derek J. Bosch , Daniel C. Steere
发明人： Christopher S. Moore , J. James Tringali , Roger W. March , James E. Schneider , Derek J. Bosch , Daniel C. Steere
IPC分类号： G06F12/00
CPC分类号： G06F3/0644 , G06F3/0607 , G06F3/0643 , G06F3/0677 , G06F3/0679 , G06F17/30067 , G06F2206/1014
摘要： The preferred embodiments described herein provide a method for reading data in a write-once memory device using a write-many file system. In one preferred embodiment, data traffic between a data storage device and a write-once memory device is redirected so that file system structures of a write-many file system do not overwrite previously-stored file system structures. Data traffic between the write-once storage device and a data reading device is also redirected so that a current file system structure of the write-many file system is provided to the data reading device instead of an out-of- date file system structure. In another preferred embodiment, a non-volatile write-many memory array is provided in the write-once memory device to store file system structures of a write-many file system. With these preferred embodiments, data stored during multiple sessions using a write-once file system can be read by a write-many file system, thereby increasing the memory device's interoperability among existing data reading devices. Other preferred embodiments are provided, and each of the preferred embodiments described herein can be used alone or in combination with one another.
摘要翻译：本文所述的优选实施例提供了一种使用多写入文件系统在一次写入存储器件中读取数据的方法。在一个优选实施例中，数据存储设备和一次写入存储设备之间的数据业务被重定向，使得多写入文件系统的文件系统结构不会覆盖先前存储的文件系统结构。一次写入存储设备和数据读取设备之间的数据流量也被重定向，使得写入许多文件系统的当前文件系统结构被提供给数据读取设备而不是过时的文件系统结构。在另一优选实施例中，在一次写入存储器设备中提供非易失性写入许多存储器阵列以存储多写入文件系统的文件系统结构。利用这些优选实施例，可以通过写入多个文件系统来读取在多次会话期间使用一次写入文件系统存储的数据，从而增加存储器设备在现有数据读取设备之间的互操作性。提供了其它优选实施方案，并且本文所述的各优选实施方案可以单独使用或彼此组合使用。

9. 发明授权

US06545891B1 Modular memory device 有权
标题翻译：模块化存储设备
公开(公告)号：US06545891B1
公开(公告)日：2003-04-08
申请号：US09638334
申请日：2000-08-14
申请人： J. James Tringali , P. Michael Farmwald , Thomas H. Lee , Mark G. Johnson , Derek J. Bosch
发明人： J. James Tringali , P. Michael Farmwald , Thomas H. Lee , Mark G. Johnson , Derek J. Bosch
IPC分类号： G11C502
CPC分类号： G11C5/025 , G11C5/063
摘要： A modular memory device includes a support element, a memory unit comprising a three-dimensional memory array carried by the support element, a device interface unit carried by the support element and coupled with the memory unit, and an electrical connector carried by the support element and coupled with the device interface unit. The memory array is well suited for use as a digital medium storage device for digital media such as digital text, digital music, digital image or images, and digital video. The device interface unit is not required in all cases.
摘要翻译：模块化存储器件包括支撑元件，包括由支撑元件承载的三维存储器阵列的存储器单元，由支撑元件承载并与存储器单元耦合的器件接口单元，以及由支撑元件承载的电连接器并与设备接口单元耦合。存储器阵列非常适合用作数字媒体的数字媒体存储设备，例如数字文本，数字音乐，数字图像或图像以及数字视频。在所有情况下都不需要设备接口单元。

10. 发明授权

US06928590B2 Memory device and method for storing bits in non-adjacent storage locations in a memory array 有权
标题翻译：用于存储存储器阵列中非相邻存储位置中的位的存储器件和方法
公开(公告)号：US06928590B2
公开(公告)日：2005-08-09
申请号：US10024647
申请日：2001-12-14
申请人： Alper Ilkbahar , Roy E. Scheuerlein , Derek J. Bosch
发明人： Alper Ilkbahar , Roy E. Scheuerlein , Derek J. Bosch
IPC分类号： G06F11/00 , G06F11/10 , H04B1/74
CPC分类号： G06F11/1028
摘要： The preferred embodiments described herein provide a memory device and method for storing bits in non-adjacent storage locations in a memory array. In one preferred embodiment, a memory device is provided comprising a register and a memory array. A plurality of bits provided to the memory device are stored in the register in a first direction, read from the register in a second direction, and then stored in the memory array. Bits that are adjacent to one another when provided to the memory device are stored in non-adjacent storage locations in the memory array. When the plurality of bits takes the form of an ECC word, the storage of bits in non-adjacent storage locations in the memory array reduces the likelihood of an uncorrectable multi-bit error. In another preferred embodiment, a memory device is provided comprising a memory array and a register comprising a first set of wordlines and bitlines and a second set of wordlines and bitlines arranged orthogonal to the first set. In yet another preferred embodiment, memory decoders or a host device is used to store bits in non-adjacent storage locations in a memory array of a memory device. Other preferred embodiments are provided, and each of the preferred embodiments described herein can be used alone or in combination with one another.
摘要翻译：本文描述的优选实施例提供了一种用于存储位于存储器阵列中的非相邻存储位置中的位的存储器件和方法。在一个优选实施例中，提供了包括寄存器和存储器阵列的存储器件。提供给存储器件的多个位以第一方向存储在寄存器中，从第二方向从寄存器读取，然后存储在存储器阵列中。当提供给存储器件时彼此相邻的位被存储在存储器阵列中的非相邻存储位置中。当多个位采用ECC字的形式时，存储器阵列中非相邻存储位置中的位的存储减少了不可校正的多位错误的可能性。在另一个优选实施例中，提供了存储器件，其包括存储器阵列和包括第一组字线和位线的寄存器以及与第一组正交布置的第二组字线和位线。在另一优选实施例中，存储器解码器或主机设备用于存储存储器件的存储器阵列中的非相邻存储位置中的位。提供了其它优选实施方案，并且本文所述的各优选实施方案可以单独使用或彼此组合使用。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式