专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US08058701B2 Antifuse structures, antifuse array structures, methods of manufacturing the same 有权
标题翻译：防污结构，反熔丝阵列结构，制造方法
公开(公告)号：US08058701B2
公开(公告)日：2011-11-15
申请号：US12216094
申请日：2008-06-30
申请人： Deok-kee Kim , Yoon-dong Park , Seung-hoon Lee , I-hun Song , Won-joo Kim , Young-gu Jin , Hyuk-soon Choi , Suk-pil Kim
发明人： Deok-kee Kim , Yoon-dong Park , Seung-hoon Lee , I-hun Song , Won-joo Kim , Young-gu Jin , Hyuk-soon Choi , Suk-pil Kim
IPC分类号： H01L23/52
CPC分类号： H01L23/5252 , G11C17/16 , H01L27/1021 , H01L2924/0002 , H01L2924/00
摘要： Antifuse structures, antifuse arrays, methods of manufacturing, and methods of operating the same are provided. An antifuse structure includes bitlines formed as first diffusing regions within a semiconductor substrate, an insulation layer formed on the bitlines, and wordlines formed on the insulation layer. An antifuse array includes a plurality of antifuse structures arranged in an array.
摘要翻译：提供了防泡结构，反熔丝阵列，制造方法和操作方法。反熔丝结构包括在半导体衬底内形成为第一扩散区的位线，形成在位线上的绝缘层，以及形成在绝缘层上的字线。反熔丝阵列包括排列成阵列的多个反熔丝结构。

2. 发明申请

US20090096060A1 Antifuse structures, antifuse array structures, methods of manufacturing the same 有权
标题翻译：防污结构，反熔丝阵列结构，制造方法
公开(公告)号：US20090096060A1
公开(公告)日：2009-04-16
申请号：US12216094
申请日：2008-06-30
申请人： Deok-kee Kim , Yoon-dong Park , Seung-hoon Lee , I-hun Song , Won-joo Kim , Young-gu Jin , Hyuk-soon Choi , Suk-pil Kim
发明人： Deok-kee Kim , Yoon-dong Park , Seung-hoon Lee , I-hun Song , Won-joo Kim , Young-gu Jin , Hyuk-soon Choi , Suk-pil Kim
IPC分类号： H01L29/00 , H01L21/00
CPC分类号： H01L23/5252 , G11C17/16 , H01L27/1021 , H01L2924/0002 , H01L2924/00
摘要： Antifuse structures, antifuse arrays, methods of manufacturing, and methods of operating the same are provided. An antifuse structure includes bitlines formed as first diffusing regions within a semiconductor substrate, an insulation layer formed on the bitlines, and wordlines formed on the insulation layer. An antifuse array includes a plurality of antifuse structures arranged in an array.
摘要翻译：提供了防泡结构，反熔丝阵列，制造方法和操作方法。反熔丝结构包括在半导体衬底内形成为第一扩散区的位线，形成在位线上的绝缘层，以及形成在绝缘层上的字线。反熔丝阵列包括排列成阵列的多个反熔丝结构。

3. 发明申请

US20090206978A1 Electrical fuse device including a fuse link 审中-公开
标题翻译：电熔丝装置包括熔断体
公开(公告)号：US20090206978A1
公开(公告)日：2009-08-20
申请号：US12379347
申请日：2009-02-19
申请人： Soo-Jung Hwang , Deok-kee Kim , Jung-hun Sung , I-hun Song , Hyuk-soon Choi
发明人： Soo-Jung Hwang , Deok-kee Kim , Jung-hun Sung , I-hun Song , Hyuk-soon Choi
IPC分类号： H01H85/10
CPC分类号： G11C17/16 , H01L23/5256 , H01L2924/0002 , H01L2924/00
摘要： Example embodiments relate to an electrical device, for example, to an electrical fuse device that includes a fuse link for linking a cathode and anode. An electrical device may include a cathode, an anode, and a fuse link. The fuse link may link the cathode and the anode. The fuse link may include a multi-metal layer structure. The fuse link may include a first metal layer including a first resistance, and a second metal layer stacked on the first metal layer and including a second resistance. The first resistance may be different from the second resistance. The fuse link may include a weak point as a region at which electrical blowing is performed easier than other regions of the fuse link.
摘要翻译：示例性实施例涉及电气设备，例如电气熔断器件，其包括用于连接阴极和阳极的熔断体。电气设备可以包括阴极，阳极和熔断体。熔丝链可以连接阴极和阳极。熔丝链可以包括多金属层结构。熔丝连接件可以包括第一金属层和第二金属层，第一金属层包括第一电阻，第二金属层堆叠在第一金属层上并包括第二电阻。第一阻力可能与第二阻力不同。熔断体可以包括作为进行电吹送的区域的弱点比熔丝链的其它区域更容易。

4. 发明申请

US20060257753A1 Photomask and method thereof 审中-公开
标题翻译：光掩模及其方法
公开(公告)号：US20060257753A1
公开(公告)日：2006-11-16
申请号：US11356258
申请日：2006-02-17
申请人： Won-joo Kim , I-hun Song , Suk-pil Kim , Seung-hyuk Chang , Won-Il Ryu , Hoon Kim
发明人： Won-joo Kim , I-hun Song , Suk-pil Kim , Seung-hyuk Chang , Won-Il Ryu , Hoon Kim
IPC分类号： G03C5/00 , G21K5/00 , G03F1/00
CPC分类号： G21K1/062 , B82Y10/00 , B82Y40/00 , G03F1/24 , G21K2201/067
摘要： A photomask and method thereof. In an example method, a photomask may be manufactured by forming an oxide layer on a surface, patterning the oxide layer to form an oxide pattern, the oxide pattern including a plurality of oxide pattern bodies and a plurality of oxide windows, filling the plurality of oxide windows with an absorbent to form an absorbent pattern and reducing the plurality of oxide pattern bodies. An example photomask may include an oxide pattern-based absorbent pattern including a plurality of absorbent pattern bodies and a plurality of absorbent pattern windows.
摘要翻译：光掩模及其方法。在一个示例性方法中，可以通过在表面上形成氧化物层来形成光掩模，图案化氧化物层以形成氧化物图案，氧化物图案包括多个氧化物图案体和多个氧化物窗口，具有吸收剂的氧化物窗口以形成吸收图案并且还原多个氧化物图案体。示例性光掩模可以包括基于氧化物图案的吸收图案，其包括多个吸收图案体和多个吸收图案窗。

5. 发明授权

US07910967B2 Ferroelectric capacitor having three-dimensional structure, nonvolatile memory device having the same and method of fabricating the same 失效
标题翻译：具有三维结构的铁电电容器，具有相同的非易失性存储器件及其制造方法
公开(公告)号：US07910967B2
公开(公告)日：2011-03-22
申请号：US11515024
申请日：2006-09-05
申请人： Sang-min Shin , Young-soo Park , June-mo Koo , Byoung-jae Bae , I-hun Song , Suk-pil Kim
发明人： Sang-min Shin , Young-soo Park , June-mo Koo , Byoung-jae Bae , I-hun Song , Suk-pil Kim
IPC分类号： H01L21/00 , H01L31/112 , H01L23/48
CPC分类号： H01L27/11502 , H01L27/11507
摘要： A ferroelectric capacitor having a three-dimensional structure, a nonvolatile memory device having the same, and a method of fabricating the same are provided. The ferroelectric capacitor may include a trench-type lower electrode, at least one layer formed around the lower electrode, a ferroelectric layer (PZT layer) formed on the lower electrode and the at least one layer and an upper electrode formed on the ferroelectric layer. The at least one layer may be at least one insulating interlayer and the at least one layer may also be at least one diffusion barrier layer. The at least one layer may be formed of an insulating material excluding SiO2 or may have a perovskite crystal structure excluding Pb.
摘要翻译：提供具有三维结构的铁电电容器，具有其的非易失性存储器件及其制造方法。铁电电容器可以包括沟槽型下电极，形成在下电极周围的至少一层，形成在下电极和至少一层上的铁电层（PZT层）和形成在铁电层上的上电极。所述至少一个层可以是至少一个绝缘夹层，并且所述至少一个层也可以是至少一个扩散阻挡层。所述至少一层可以由除了SiO2之外的绝缘材料形成，或者可以具有不包括Pb的钙钛矿晶体结构。

6. 发明申请

US20070031741A1 EUVL reflection device, method of fabricating the same, and mask, projection optics system and EUVL apparatus using the EUVL reflection device 审中-公开
标题翻译： EUVL反射装置及其制造方法，掩模，投影光学系统和使用EUVL反射装置的EUVL装置
公开(公告)号：US20070031741A1
公开(公告)日：2007-02-08
申请号：US11498020
申请日：2006-08-03
申请人： Hoon Kim , Suk-pil Kim , I-hun Song , Young-soo Park , Seung-hyuk Chang
发明人： Hoon Kim , Suk-pil Kim , I-hun Song , Young-soo Park , Seung-hyuk Chang
IPC分类号： G02B5/20 , F21V9/06 , F21V9/04 , G21K5/00 , G03F1/00 , G02B5/08
CPC分类号： G03F1/24 , B82Y10/00 , B82Y40/00 , G03F7/70316 , G03F7/70958 , G21K1/062
摘要： A reflection device that may include a substrate and a multi-reflection layer formed on the substrate. The multi-reflection layer may be formed of a material capable of reflecting EUV rays. The multi-reflection layer may be formed by stacking a plurality of layer groups, each including a first material layer, a surface-treated layer obtained by surface-treating the first material layer, and a second material layer formed on the surface-treated layer. A method of fabricating the reflection device that may include preparing a substrate and forming a multi-reflection layer on the substrate from a material capable of reflecting EUV rays. The forming of the multi-reflection layer may be performed by repeatedly forming a layer group. The forming of the layer group may include forming a first material layer, surface-treating the first material layer, and forming a second material layer on the surface-treated first material layer.
摘要翻译：可以包括形成在基板上的基板和多反射层的反射装置。多反射层可以由能够反射EUV射线的材料形成。多反射层可以通过层叠多个层组而形成，每个层组包括第一材料层，通过表面处理第一材料层获得的表面处理层和形成在表面处理层上的第二材料层。一种制造反射装置的方法，其可以包括准备基板并且在能够反射EUV射线的材料的基板上形成多反射层。多反射层的形成可以通过重复形成层组来进行。层组的形成可以包括形成第一材料层，对第一材料层进行表面处理，以及在表面处理的第一材料层上形成第二材料层。

7. 发明申请

US20060281017A1 Reflection mask for EUV photolithography and method of fabricating the reflection mask 有权
标题翻译：用于EUV光刻的反射掩模和制造反射掩模的方法
公开(公告)号：US20060281017A1
公开(公告)日：2006-12-14
申请号：US11441835
申请日：2006-05-26
申请人： Suk-pil Kim , I-hun Song , Young-Soo Park , Seung-hyuk Chang , Hoon Kim
发明人： Suk-pil Kim , I-hun Song , Young-Soo Park , Seung-hyuk Chang , Hoon Kim
IPC分类号： G21K5/00 , G03F1/00
CPC分类号： G21K1/062 , B82Y10/00 , B82Y40/00 , G03F1/24
摘要： A reflection mask for extreme ultraviolet (EUV) photolithography and a method of fabricating the same, in which the reflection mask includes a substrate, a lower reflection layer formed in a multi-layer structure on the substrate and including a material reflecting EUV light, an upper reflection layer formed in a multi-layer structure on the lower reflection layer and reflecting EUV light, and a phase reversing layer formed between the lower reflection layer and the upper reflection layer in a certain pattern and causing destructive interference between reflection light from the upper reflection layer and reflection light from the lower reflection layer. An incidence of a shadow effect can be reduced and unnecessary EUV light can be eliminated, so that a pattern on the reflection mask can be projected precisely on a silicon wafer. Since the phase reversing layer includes the same material as the reflection layer and an absorption layer, mask fabrication processes can be handled easily.
摘要翻译：一种用于极紫外（EUV）光刻的反射掩模及其制造方法，其中反射掩模包括基板，在基板上形成为多层结构的下反射层，并且包括反射EUV光的材料，在下反射层上形成多层结构并反射EUV光的上反射层和以一定图案形成在下反射层和上反射层之间的相位反转层，并且产生来自上层的反射光之间的相消干涉反射层和来自下反射层的反射光。可以减少阴影效应的入射，并且可以消除不必要的EUV光，使得反射掩模上的图案可以精确地投影在硅晶片上。由于相位反转层包括与反射层和吸收层相同的材料，因此可以容易地处理掩模制造工艺。

8. 发明申请

US20070051999A1 Ferroelectric capacitor having three-dimensional structure, nonvolatile memory device having the same and method of fabricating the same 失效
标题翻译：具有三维结构的铁电电容器，具有相同的非易失性存储器件及其制造方法
公开(公告)号：US20070051999A1
公开(公告)日：2007-03-08
申请号：US11515024
申请日：2006-09-05
申请人： Sang-min Shin , Young-soo Park , June-mo Koo , Byoung-jae Bae , I-hun Song , Suk-pil Kim
发明人： Sang-min Shin , Young-soo Park , June-mo Koo , Byoung-jae Bae , I-hun Song , Suk-pil Kim
IPC分类号： H01L29/94
CPC分类号： H01L27/11502 , H01L27/11507
摘要： A ferroelectric capacitor having a three-dimensional structure, a nonvolatile memory device having the same, and a method of fabricating the same are provided. The ferroelectric capacitor may include a trench-type lower electrode, at least one layer formed around the lower electrode, a ferroelectric layer (PZT layer) formed on the lower electrode and the at least one layer and an upper electrode formed on the ferroelectric layer. The at least one layer may be at least one insulating interlayer and the at least one layer may also be at least one diffusion barrier layer. The at least one layer may be formed of an insulating material excluding SiO2 or may have a perovskite crystal structure excluding Pb.
摘要翻译：提供具有三维结构的铁电电容器，具有其的非易失性存储器件及其制造方法。铁电电容器可以包括沟槽型下电极，形成在下电极周围的至少一层，形成在下电极和至少一层上的铁电层（PZT层）和形成在铁电层上的上电极。所述至少一个层可以是至少一个绝缘中间层，并且所述至少一个层也可以是至少一个扩散阻挡层。至少一层可以由除SiO 2之外的绝缘材料形成，或者可以具有不包括Pb的钙钛矿晶体结构。

9. 发明授权

US07682758B2 Reflection mask for EUV photolithography and method of fabricating the reflection mask 有权
标题翻译：用于EUV光刻的反射掩模和制造反射掩模的方法
公开(公告)号：US07682758B2
公开(公告)日：2010-03-23
申请号：US11441835
申请日：2006-05-26
申请人： Suk-pil Kim , I-hun Song , Young-soo Park , Seung-hyuk Chang , Hoon Kim
发明人： Suk-pil Kim , I-hun Song , Young-soo Park , Seung-hyuk Chang , Hoon Kim
IPC分类号： G03F1/00
CPC分类号： G21K1/062 , B82Y10/00 , B82Y40/00 , G03F1/24
摘要： A reflection mask for extreme ultraviolet (EUV) photolithography and a method of fabricating the same, in which the reflection mask includes a substrate, a lower reflection layer formed in a multi-layer structure on the substrate and including a material reflecting EUV light, an upper reflection layer formed in a multi-layer structure on the lower reflection layer and reflecting EUV light, and a phase reversing layer formed between the lower reflection layer and the upper reflection layer in a certain pattern and causing destructive interference between reflection light from the upper reflection layer and reflection light from the lower reflection layer. An incidence of a shadow effect can be reduced and unnecessary EUV light can be eliminated, so that a pattern on the reflection mask can be projected precisely on a silicon wafer. Since the phase reversing layer includes the same material as the reflection layer and an absorption layer, mask fabrication processes can be handled easily.
摘要翻译：一种用于极紫外（EUV）光刻的反射掩模及其制造方法，其中反射掩模包括基板，在基板上形成为多层结构的下反射层，并且包括反射EUV光的材料，在下反射层上形成多层结构并反射EUV光的上反射层和以一定图案形成在下反射层和上反射层之间的相位反转层，并且产生来自上层的反射光之间的相消干涉反射层和来自下反射层的反射光。可以减少阴影效应的入射，并且可以消除不必要的EUV光，使得反射掩模上的图案可以精确地投影在硅晶片上。由于相位反转层包括与反射层和吸收层相同的材料，因此可以容易地处理掩模制造工艺。

10. 发明申请

US20080237687A1 Flash memory device 审中-公开
标题翻译：闪存设备
公开(公告)号：US20080237687A1
公开(公告)日：2008-10-02
申请号：US11898037
申请日：2007-09-07
申请人： Sun-il Kim , Young-gu Jin , I-hun Song , Young-soo Park , Dong-hun Kang , Chang-jung Kim , Jae-chul Park
发明人： Sun-il Kim , Young-gu Jin , I-hun Song , Young-soo Park , Dong-hun Kang , Chang-jung Kim , Jae-chul Park
IPC分类号： H01L29/788
CPC分类号： B82Y10/00 , H01L27/11521 , H01L27/11568 , H01L29/40114 , H01L29/40117 , H01L29/42324 , H01L29/4234 , H01L29/7881 , H01L29/792
摘要： Provided is a flash memory device including a gate structure on a substrate. The flash memory device includes a charge supply layer including a ZnO based material formed between a substrate and a gate structure or formed on the gate structure. Accordingly, the flash memory device can be formed to be of a bottom gate type or of a top gate type by including the charge supply layer. Also, the flash memory device may be realized to be any of a charge trap type and a floating gate type.
摘要翻译：提供了一种在基板上包括栅极结构的闪存器件。闪存器件包括电荷供应层，其包括形成在衬底和栅极结构之间或形成在栅极结构上的基于ZnO的材料。因此，闪存器件可以通过包括电荷供给层而形成为底栅型或顶栅型。此外，闪存器件可以被实现为电荷陷阱型和浮动栅型中的任一种。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式