会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 5. 发明申请
    • REVERSIBLE ELECTRIC FUSE AND ANTIFUSE STRUCTURES FOR SEMICONDUCTOR DEVICES
    • 用于半导体器件的可逆电源保险丝和抗反射结构
    • US20080157269A1
    • 2008-07-03
    • US11619264
    • 2007-01-03
    • Keith Kwong Hon WongChih-Chao YangHaining S. Yang
    • Keith Kwong Hon WongChih-Chao YangHaining S. Yang
    • H01L29/00H01L21/02
    • H01L23/5256H01L23/5252H01L28/24H01L2924/0002H01L2924/00
    • A structure and method of fabricating reversible fuse and antifuse structures for semiconductor devices is provided. In one embodiment, the method includes forming at least one line having a via opening for exposing a portion of a plurality of interconnect features; conformally depositing a first material layer over the via opening; depositing a second material layer over the first material layer, wherein the depositing overhangs a portion of the second material layer on a top portion of the via opening; and depositing a blanket layer of insulating material, where the depositing forms a plurality of fuse elements each having an airgap between the insulating material and the second material layer. The method further includes forming a plurality of electroplates in the insulator material connecting the fuse elements. In another embodiment, the method includes depositing a first and a second material layer on a semiconductor substrate, wherein the second material layer having a higher electrical conductivity than the first material layer; selectively etching the first and second material layer to create at least one constricted region to facilitate electromigration of the second material; wherein the electromigration creates a plurality of micro voids; and forming a plurality of electrical contacts on the second material layer.
    • 提供一种用于制造用于半导体器件的可逆熔丝和反熔丝结构的结构和方法。 在一个实施例中,该方法包括形成至少一条线,其具有用于暴露多个互连特征的一部分的通孔; 在通孔开口上共形沉积第一材料层; 在所述第一材料层上沉积第二材料层,其中所述沉积在所述通孔开口的顶部部分上突出所述第二材料层的一部分; 以及沉积绝缘材料的覆盖层,其中所述沉积形成多个熔丝元件,每个熔丝元件在所述绝缘材料和所述第二材料层之间具有气隙。 该方法还包括在连接熔丝元件的绝缘体材料中形成多个电镀层。 在另一个实施例中,该方法包括在半导体衬底上沉积第一和第二材料层,其中第二材料层具有比第一材料层更高的导电性; 选择性地蚀刻第一和第二材料层以产生至少一个收缩区域以促进第二材料的电迁移; 其中所述电迁移产生多个微空隙; 以及在所述第二材料层上形成多个电接触。