专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US5146460A Logic simulation using a hardware accelerator together with an automated error event isolation and trace facility 失效
标题翻译：使用硬件加速器与自动错误事件隔离和跟踪设备进行逻辑仿真
公开(公告)号：US5146460A
公开(公告)日：1992-09-08
申请号：US481145
申请日：1990-02-16
申请人： Dennis F. Ackerman , David R. Bender , Salina S. Chu , George R. Deibert , Gary G. Hallock , David E. Lackey , Robert G. Sheldon , Thomas A. Stranko
发明人： Dennis F. Ackerman , David R. Bender , Salina S. Chu , George R. Deibert , Gary G. Hallock , David E. Lackey , Robert G. Sheldon , Thomas A. Stranko
IPC分类号： G06F11/25 , G06F11/26 , G06F11/34 , G06F17/50
CPC分类号： G06F17/5022 , G06F11/261 , G06F11/34
摘要： Software simulators of logic design circuits run slowly but are capable of providing very finely detailed error trace analyses. On the other hand, hardware accelerators operating to perform similar functions are very fast in their execution but are not capable of practically isolating error states or other critical conditions. Accordingly, the present invention provides an interactive system combining software simulators and hardware accelerators so that when desired test results do not favorably compare with simulated results, a mechanism is provided for storing the current hardware accelerator state and restoring the accelerator to a previous checkpoint state which has been saved as a result of a prior periodic interruption. The hardware accelerator is then operated for a time sufficient to bring it up to a state that occurs just before the detected miscomparison. At this point, state information from the hardware accelerator is supplied to a software simulator for detailed error analysis and fault tracing. The hardware accelerator may then be restarted where it left off or with a different task. In this way, optimal utilization is made of expensive hardware accelerator resources while nonetheless providing error event isolation and the ability to generate detailed traces of the simulated behavior.

2. 发明授权

US5606696A Exception handling method and apparatus for a microkernel data processing system 失效
标题翻译：用于微内核数据处理系统的异常处理方法和装置
公开(公告)号：US5606696A
公开(公告)日：1997-02-25
申请号：US533455
申请日：1995-09-25
申请人： Dennis F. Ackerman , Himanshu H. Desai , Ram K. Gupta , Ravi R. Srinivasan
发明人： Dennis F. Ackerman , Himanshu H. Desai , Ram K. Gupta , Ravi R. Srinivasan
IPC分类号： G06F9/46 , G06F9/48
CPC分类号： G06F9/4812 , G06F9/4843
摘要： Floating point hardware register set is not given to any user level thread unless it is required to perform floating point operations. Thus, for any non-floating thread, its context does not include the floating point hardware state. This effectively reduces the amount of information to be handled when threads are swapped in the processor. During the course of a thread's execution, at the first instance of an attempt by the thread to execute a floating point instruction, the "float-unavailable" exception occurs. This, in turn, invokes the microkernel's floating point exception handler. The function of this exception handler is to make floating point available to the thread that requires it. The exception handler dynamically allocates space for saving the thread's floating point registers, initializes the registers, and turns on the "float-available" bit in its machine state register. Once a thread obtains floating point context, it continues to have it for the remainder of its life.
摘要翻译：除非需要执行浮点运算，否则浮点硬件寄存器集不会被给予任何用户级线程。因此，对于任何非浮动线程，其上下文不包括浮点硬件状态。这有效地减少了在处理器中交换线程时要处理的信息量。在执行线程的过程中，在线程尝试执行浮点指令的第一个实例中，发生“float-unavailable”异常。这反过来调用微内核的浮点异常处理程序。此异常处理程序的功能是使浮点可用于需要的线程。异常处理程序动态分配空间以保存线程的浮点寄存器，初始化寄存器，并打开其机器状态寄存器中的“浮动可用”位。一旦线程获得浮点上下文，它将在剩余的时间内继续存在。

3. 发明授权

US5481719A Exception handling method and apparatus for a microkernel data processing system 失效
标题翻译：用于微内核数据处理系统的异常处理方法和装置
公开(公告)号：US5481719A
公开(公告)日：1996-01-02
申请号：US303796
申请日：1994-09-09
申请人： Dennis F. Ackerman , Himanshu H. Desai , Ram K. Gupta , Ravi R. Srinivasan
发明人： Dennis F. Ackerman , Himanshu H. Desai , Ram K. Gupta , Ravi R. Srinivasan
IPC分类号： G06F9/46 , G06F9/48 , G06F9/44
CPC分类号： G06F9/4812 , G06F9/4843
摘要： Floating point hardware register set is not given to any user level thread unless it is required to perform floating point operations. Thus, for any non-floating thread, its context does not include the floating point hardware state. This effectively reduces the amount of information to be handled when threads are swapped in the processor. During the course of a thread's execution, at the first instance of an attempt by the thread to execute a floating point instruction, the "float-unavailable" exception occurs. This, in turn, invokes the microkernel's floating point exception handler. The function of this exception handler is to make floating point available to the thread that requires it. The exception handler dynamically allocates space for saving the thread's floating point registers, initializes the registers, and turns on the "float-available" bit in its machine state register. Once a thread obtains floating point context, it continues to have it for the remainder of its life.
摘要翻译：除非需要执行浮点运算，否则浮点硬件寄存器集不会被给予任何用户级线程。因此，对于任何非浮动线程，其上下文不包括浮点硬件状态。这有效地减少了在处理器中交换线程时要处理的信息量。在执行线程的过程中，在线程尝试执行浮点指令的第一个实例中，发生“float-unavailable”异常。这反过来调用微内核的浮点异常处理程序。此异常处理程序的功能是使浮点可用于需要的线程。异常处理程序动态分配空间以保存线程的浮点寄存器，初始化寄存器，并打开其机器状态寄存器中的“浮动可用”位。一旦线程获得浮点上下文，它将在剩余的时间内继续存在。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式