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1. 发明申请

US20110090011A1 POWER AMPLIFIER 有权
标题翻译：功率放大器
公开(公告)号：US20110090011A1
公开(公告)日：2011-04-21
申请号：US12727261
申请日：2010-03-19
申请人： De-Cheng Chang , Yu-Cheng Hsu
发明人： De-Cheng Chang , Yu-Cheng Hsu
IPC分类号： H03F3/04
CPC分类号： H03F1/0266 , H03F2200/105 , H03F2200/18
摘要： An adaptive bias power amplifier including an amplifier, a signal coupler, a power detector and a bias control circuit is provided. The signal coupler is connected to an input terminal of the amplifier. The power detector is connected to the signal coupler, and detects an input power of the amplifier via the signal coupler. The bias control circuit is connected to an output terminal of the power detector and the input terminal of the amplifier. The bias control circuit adjusts a gate bias of the amplifier in accordance with a detecting result of the power detector.
摘要翻译：提供了包括放大器，信号耦合器，功率检测器和偏置控制电路的自适应偏置功率放大器。信号耦合器连接到放大器的输入端。功率检测器连接到信号耦合器，并通过信号耦合器检测放大器的输入功率。偏置控制电路连接到功率检测器的输出端子和放大器的输入端子。偏置控制电路根据功率检测器的检测结果调整放大器的栅极偏置。

2. 发明授权

US08089313B2 Power amplifier 有权
标题翻译：功率放大器
公开(公告)号：US08089313B2
公开(公告)日：2012-01-03
申请号：US12727261
申请日：2010-03-19
申请人： De-Cheng Chang , Yu-Cheng Hsu
发明人： De-Cheng Chang , Yu-Cheng Hsu
IPC分类号： H03G3/20
CPC分类号： H03F1/0266 , H03F2200/105 , H03F2200/18
摘要： An adaptive bias power amplifier including an amplifier, a signal coupler, a power detector and a bias control circuit is provided. The signal coupler is connected to an input terminal of the amplifier. The power detector is connected to the signal coupler, and detects an input power of the amplifier via the signal coupler. The bias control circuit is connected to an output terminal of the power detector and the input terminal of the amplifier. The bias control circuit adjusts a gate bias of the amplifier in accordance with a detecting result of the power detector.
摘要翻译：提供了包括放大器，信号耦合器，功率检测器和偏置控制电路的自适应偏置功率放大器。信号耦合器连接到放大器的输入端。功率检测器连接到信号耦合器，并通过信号耦合器检测放大器的输入功率。偏置控制电路连接到功率检测器的输出端子和放大器的输入端子。偏置控制电路根据功率检测器的检测结果调整放大器的栅极偏置。

3. 发明授权

US09098397B2 Extending cache for an external storage system into individual servers 有权
公开(公告)号：US09098397B2
公开(公告)日：2015-08-04
申请号：US13079432
申请日：2011-04-04
申请人： Lee D. Cleveland , John C. Elliott , Yu-Cheng Hsu , Andrew D. Walls
发明人： Lee D. Cleveland , John C. Elliott , Yu-Cheng Hsu , Andrew D. Walls
IPC分类号： G06F12/00 , G06F13/00 , G06F12/02 , G06F12/08 , H04L29/08
CPC分类号： G06F12/0246 , G06F12/0868 , H04L67/2852
摘要： Mechanisms are provided for extending cache for an external storage system into individual servers. Certain servers may have cards with cache in the form of dynamic random access memory (DRAM) and non-volatile storage, such as flash memory or solid-state drives (SSDs), which may be viewed as actual extensions of the external storage system. In this way, the storage system is distributed across the storage area network (SAN) into various servers. Several new semantics are used in communication between the cards and the storage system to keep the read caches coherent.

4. 发明授权

US09004894B2 Mold assembly 有权
标题翻译：模具总成
公开(公告)号：US09004894B2
公开(公告)日：2015-04-14
申请号：US13117110
申请日：2011-05-26
申请人： Yuan-Shun Tsai , Yu-Cheng Hsu
发明人： Yuan-Shun Tsai , Yu-Cheng Hsu
IPC分类号： B29C45/14 , B29C33/40 , B29C45/37 , B29C33/56
CPC分类号： B29C45/14836 , B29C33/405 , B29C33/565 , B29C45/14 , B29C45/14065 , B29C45/37 , B29C2045/14122 , B29C2045/14934
摘要： A mold assembly for insert-molding a heterogeneous object includes an upper mold and a lower mold. The upper mold includes a cavity for accommodating an insert object. The lower mold includes a rigid body and a resilient contact member for resting the insert object. The resilient contact member absorbs dimensional variations of the insert object during the insert molding process.
摘要翻译：用于嵌入成型异质物体的模具组件包括上模和下模。上模包括用于容纳插入物体的空腔。下模包括刚性体和用于搁置插入物的弹性接触构件。弹性接触构件在插入成型过程中吸收插入物体的尺寸变化。

5. 发明授权

US08380947B2 Storage application performance matching 失效
公开(公告)号：US08380947B2
公开(公告)日：2013-02-19
申请号：US13458843
申请日：2012-04-27
申请人： Lawrence Y. Chiu , Clement L. Dickey , Yu-Cheng Hsu , Joseph S. Hyde, II , Paul H. Muench , Cheng-Chung Song
发明人： Lawrence Y. Chiu , Clement L. Dickey , Yu-Cheng Hsu , Joseph S. Hyde, II , Paul H. Muench , Cheng-Chung Song
IPC分类号： G06F12/00
CPC分类号： G06F3/0647 , G06F3/0617 , G06F3/0685
摘要： Input/output (I/O) activity in the multiple tier storage system is monitored to collect statistical information. The statistical information is recurrently transformed into an exponential moving average (EMA) of the I/O activity having a predefined smoothing factor. Data portions in the multiple tier storage system are sorted into buckets of varying temperatures corresponding to the EMA. At least one data migration plan is recurrently generated for matching the sorted data portions to at least one of an available plurality of storage device classes. One data portion sorted into a higher temperature bucket is matched with a higher performance storage device class of the available plurality of storage device classes than another data portion sorted into a lower temperature bucket.

6. 发明申请

US20110238888A1 PROVIDING VERSIONING IN A STORAGE DEVICE 有权
标题翻译：在存储设备中提供版本
公开(公告)号：US20110238888A1
公开(公告)日：2011-09-29
申请号：US12749186
申请日：2010-03-29
申请人： Lawrence Y. Chiu , Yu-Cheng Hsu
发明人： Lawrence Y. Chiu , Yu-Cheng Hsu
IPC分类号： G06F12/00 , G06F12/02 , G06F12/06
CPC分类号： G06F3/0653 , G06F3/0607 , G06F3/0631 , G06F3/0679 , G06F12/023 , G06F12/0246 , G06F2212/7209
摘要： Provided are a computer program product, system and method for managing Input/Output (I/O) requests to a storage device. A write request is received having write data for a logical address in the storage device. A determination is made as to whether preserve mode is enabled. A first entry is located in a volume control table for the logical address indicating a version number of the data in the storage device for the logical address and a first physical location in the storage device having the data for the logical address. The write data is written to a second physical location in the storage device. A second entry is added to the volume control table for the logical address to write in response to determining that the preserve mode is enabled. In response to determining that the preserve mode is enabled, the volume control table is updated to have one of the first and second entry for the logical address point to the second physical location and have the version number indicate a current version and to have the first or second entry not indicating the current version to indicate the first physical location and the version number indicate a previous version.
摘要翻译：提供了一种用于管理对存储设备的输入/输出（I / O）请求的计算机程序产品，系统和方法。接收到具有用于存储设备中的逻辑地址的写入数据的写入请求。确定是否启用保留模式。第一条目位于用于逻辑地址的音量控制表中，该逻辑地址指示用于逻辑地址的存储设备中的数据的版本号以及具有用于逻辑地址的数据的存储设备中的第一物理位置。写入数据被写入存储设备中的第二物理位置。响应于确定保持模式被启用，第二个条目被添加到音量控制表中以供写入的逻辑地址。响应于确定保持模式被启用，音量控制表被更新为具有用于逻辑地址的第一和第二条目中的一个到第二物理位置，并且版本号指示当前版本并且具有第一或第二条目不指示当前版本以指示第一物理位置，并且版本号指示先前版本。

7. 发明授权

US08024524B2 Method, system, and program for an adaptor to read and write to system memory 有权
标题翻译：用于读取和写入系统内存的适配器的方法，系统和程序
公开(公告)号：US08024524B2
公开(公告)日：2011-09-20
申请号：US12537987
申请日：2009-08-07
申请人： Michael Thomas Benhase , James Chien-Chung Chen , Yu-Cheng Hsu , Matthew Joseph Kalos , Carol Spanel , Andrew Dale Walls
发明人： Michael Thomas Benhase , James Chien-Chung Chen , Yu-Cheng Hsu , Matthew Joseph Kalos , Carol Spanel , Andrew Dale Walls
IPC分类号： G06F12/00 , G06F12/08
CPC分类号： G06F12/0866 , G06F12/1081
摘要： Provided are a method, system, and program for an adaptor to read and write to system memory. A plurality of blocks of data to write to storage are received at an adaptor. The blocks of data are added to a buffer in the adaptor. A determination is made of pages in a memory device and I/O requests are generated to write the blocks in the buffer to the determined pages, wherein two I/O requests are generated to write to one block split between two pages in the memory device. The adaptor executes the generated I/O requests to write the blocks in the buffer to the determined pages in the memory device.
摘要翻译：提供了适配器读取和写入系统内存的方法，系统和程序。在适配器处接收要写入存储器的多个数据块。数据块被添加到适配器中的缓冲区。确定存储器设备中的页面并且生成I / O请求以将缓冲器中的块写入到所确定的页面，其中生成两个I / O请求以写入存储器设备中的两个页面之间的一个块分割。适配器执行生成的I / O请求，将缓冲区中的块写入存储器设备中确定的页面。

8. 发明申请

US20110202708A1 Integrating A Flash Cache Into Large Storage Systems 有权
标题翻译：将Flash Cache集成到大型存储系统中
公开(公告)号：US20110202708A1
公开(公告)日：2011-08-18
申请号：US12707357
申请日：2010-02-17
申请人： Kevin J. Ash , Michael T. Benhase , Evangelos S. Eleftheriou , Lokesh M. Gupta , Robert Haas , Yu-Cheng Hsu , Xiaoyu Hu , Joseph S. Hyde, II , Roman A. Pletka , Alfred E. Sanchez
发明人： Kevin J. Ash , Michael T. Benhase , Evangelos S. Eleftheriou , Lokesh M. Gupta , Robert Haas , Yu-Cheng Hsu , Xiaoyu Hu , Joseph S. Hyde, II , Roman A. Pletka , Alfred E. Sanchez
IPC分类号： G06F12/00 , G06F12/08 , G06F13/12
CPC分类号： G06F12/0866 , G06F3/0611 , G06F3/0655 , G06F3/0685 , G06F2212/214 , G06F2212/2146
摘要： An I/O enclosure module is provided with one or more I/O enclosures having a plurality of slots for receiving electronic devices. A host adapter is connected a first slot of the I/O enclosure module and is configured to connect a host to the I/O enclosure. A device adapter is connected to a second slot of the I/O enclosure module and is configured to connect a storage device to the I/O enclosure module. A flash cache is connected to a third slot of the I/O enclosure module and includes a flash-based memory configured to cache data associated with data requests handled through the I/O enclosure module. A primary processor complex manages data requests handled through the I/O enclosure module by communicating with the host adapter, device adapter, and flash cache to manage to the data requests.
摘要翻译： I / O机箱模块设置有一个或多个具有多个用于接收电子设备的插槽的I / O机箱。主机适配器连接在I / O机柜模块的第一个插槽上，并配置为将主机连接到I / O机箱。设备适配器连接到I / O机箱模块的第二个插槽，并配置为将存储设备连接到I / O机柜模块。闪存缓存连接到I / O机箱模块的第三个插槽，并且包括配置为缓存与通过I / O机箱模块处理的数据请求相关联的数据的基于闪存的存储器。主处理器复合体通过与主机适配器，设备适配器和闪存缓存进行通信来管理数据请求来管理通过I / O机箱模块处理的数据请求。

9. 发明申请

US20110191540A1 PROCESSING READ AND WRITE REQUESTS IN A STORAGE CONTROLLER 失效
标题翻译：在存储控制器中处理读取和写入请求
公开(公告)号：US20110191540A1
公开(公告)日：2011-08-04
申请号：US12699805
申请日：2010-02-03
申请人： Lawrence Y. Chiu , Yu-Cheng Hsu , Sangeetha Seshadri
发明人： Lawrence Y. Chiu , Yu-Cheng Hsu , Sangeetha Seshadri
IPC分类号： G06F12/08
CPC分类号： G06F3/0611 , G06F3/0659 , G06F3/0685 , G06F12/08 , G06F12/0802 , G06F12/0804 , G06F12/0866 , G06F12/0868 , G06F12/0871 , G06F12/0877 , G06F13/385 , G06F13/4282
摘要： Provided are a method, system, and computer program product for processing read and write requests in a storage controller. A host adaptor in the storage controller receives a write request from a host system for a storage address in a storage device. The host adaptor sends write information indicating the storage address updated by the write request to a device adaptor in the storage controller. The host adaptor writes the write data to a cache in the storage controller. The device adaptor indicates the storage address indicated in the write information to a modified storage address list stored in the device adaptor, wherein the modified storage address list indicates modified data in the cache for storage addresses in the storage device.
摘要翻译：提供了一种用于在存储控制器中处理读取和写入请求的方法，系统和计算机程序产品。存储控制器中的主机适配器从主机系统接收存储设备中存储地址的写入请求。主机适配器向存储控制器中的设备适配器发送表示由写入请求更新的存储地址的写入信息。主机适配器将写入数据写入存储控制器中的高速缓存。设备适配器将写入信息中指示的存储地址指示到存储在设备适配器中的修改的存储地址列表，其中修改的存储地址列表指示高速缓存中用于存储设备中的存储地址的修改数据。

10. 发明授权

US07774785B2 Cluster code management 失效
标题翻译：集群代码管理
公开(公告)号：US07774785B2
公开(公告)日：2010-08-10
申请号：US11169251
申请日：2005-06-28
申请人： Michael Howard Hartung , Yu-Cheng Hsu , Glenn Rowan Wightwick
发明人： Michael Howard Hartung , Yu-Cheng Hsu , Glenn Rowan Wightwick
IPC分类号： G06F9/46 , G06F9/44
CPC分类号： G06F3/0631 , G06F3/0607 , G06F3/0617 , G06F3/067 , G06F9/5077 , G06F12/0866 , H04L67/1002 , H04L69/40
摘要： A first logical partition in a first processing complex of a server cluster is operated at a first level of a software code. Software code in a second logical partition in the same processing complex is changed to a second level. Processing operations are transferred from the first logical partition in the first processing complex to a third logical partition in a second processing complex of the server cluster. In another aspect, the transferring of processing operations includes quiescing the first logical partition to cause a failover of processing operations from the first logical partition in the first processing complex, to the third logical partition in the second processing complex. In yet another aspect, a failback operation is performed and a first portion of the processing operations are transferred from the third logical partition in the second processing complex, to the second logical partition in the first processing complex. In still another aspect, a second portion of the processing operations may be transferred from the third logical partition in the second processing complex, to the second logical partition in the first processing complex of the server cluster. In one example, the transferring of the second portion of processing operations includes quiescing the third logical partition to cause a failover of processing operations from the third logical partition in the second processing complex, to the second logical partition in the first processing complex. Other embodiments are described and claimed.
摘要翻译：服务器集群的第一处理复合体中的第一逻辑分区在软件代码的第一级操作。相同处理组合中第二个逻辑分区中的软件代码更改为第二个级别。处理操作从第一处理复合体中的第一逻辑分区传送到服务器集群的第二处理复合体中的第三逻辑分区。在另一方面，处理操作的传送包括使第一逻辑分区停顿以使处理操作从第一处理复数中的第一逻辑分区到第二处理复合体中的第三逻辑分区的故障转移。在另一方面，执行故障恢复操作，并且处理操作的第一部分从第二处理复合体中的第三逻辑分区传送到第一处理复合体中的第二逻辑分区。在另一方面，处理操作的第二部分可以从第二处理复合体中的第三逻辑分区传送到服务器集群的第一处理复合体中的第二逻辑分区。在一个示例中，第二部分处理操作的传送包括使第三逻辑分区停顿以使处理操作从第二处理复合体中的第三逻辑分区到第一处理复合体中的第二逻辑分区的故障切换。描述和要求保护其他实施例。

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