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    • 5. 发明授权
    • Ultra low power sleep mode
    • 超低功耗睡眠模式
    • US08510584B1
    • 2013-08-13
    • US13296977
    • 2011-11-15
    • David G. Wright
    • David G. Wright
    • G06F1/32
    • G06F13/24G05F1/46G06F1/24H01L2924/0002H02M1/08H03K17/22H03L5/02Y02D10/14H01L2924/00
    • An integrated circuit in accordance with one embodiment of the invention can include a plurality of storage elements that can be coupled in a first mode and a second mode. The first mode includes the plurality of storage elements being coupled to enable normal operation of the integrated circuit, and the second mode includes the plurality of storage elements being coupled together as a shift register. The integrated circuit also includes a rewritable non-volatile memory and a sleep controller that is coupled to the rewritable non-volatile memory. The sleep controller is for switching the plurality of storage elements between the first mode and the second mode. The sleep controller is for extracting data from the plurality of storage elements in the second mode and storing the data with the non-volatile memory to record the operating state of the plurality of storage elements in the first mode.
    • 根据本发明的一个实施例的集成电路可以包括可以以第一模式和第二模式耦合的多个存储元件。 第一模式包括多个存储元件被耦合以实现集成电路的正常操作,并且第二模式包括作为移位寄存器耦合在一起的多个存储元件。 集成电路还包括可重写非易失性存储器和耦合到可重写非易失性存储器的睡眠控制器。 睡眠控制器用于在第一模式和第二模式之间切换多个存储元件。 睡眠控制器用于在第二模式中从多个存储元件中提取数据,并且与非易失性存储器一起存储数据以在第一模式下记录多个存储元件的操作状态。