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1. 发明授权

US08669168B1 Method for reducing the concentration of oxygen, carbon, and silicon impurities on nitrogen-polar surfaces of gallium nitride 有权
标题翻译：降低氮化镓氮极表面氧，碳和硅杂质浓度的方法
公开(公告)号：US08669168B1
公开(公告)日：2014-03-11
申请号：US13737010
申请日：2013-01-09
申请人： David F. Storm , Douglas S. Katzer , Glenn G. Jernigan , Steven C. Binari
发明人： David F. Storm , Douglas S. Katzer , Glenn G. Jernigan , Steven C. Binari
IPC分类号： H01L21/20
CPC分类号： H01L21/02389 , H01L21/02458 , H01L21/0254 , H01L21/02661
摘要： A method of preparing GaN material includes subjecting a GaN substrate to at least two cycles of Ga deposition and desorption, then applying a layer of AlN to the GaN substrate, then growing GaN on the AlN layer by molecular beam epitaxy. This results in reduced concentrations of oxygen, carbon, and silicon impurities.
摘要翻译：制备GaN材料的方法包括：使GaN衬底经受至少两个Ga沉积和解吸循环，然后将AlN层施加到GaN衬底，然后通过分子束外延在AlN层上生长GaN。这导致氧，碳和硅杂质的浓度降低。

2. 发明授权

US07338826B2 Silicon nitride passivation with ammonia plasma pretreatment for improving reliability of AlGaN/GaN HEMTs 失效
标题翻译：氮化硅钝化与氨等离子体预处理，以提高AlGaN / GaN HEMTs的可靠性
公开(公告)号：US07338826B2
公开(公告)日：2008-03-04
申请号：US11311592
申请日：2005-12-09
申请人： Jeffrey A. Mittereder , Andrew P. Edwards , Steven C. Binari
发明人： Jeffrey A. Mittereder , Andrew P. Edwards , Steven C. Binari
IPC分类号： H01L21/00 , H01L21/338 , H01L21/469 , H01L21/31
CPC分类号： H01L29/7787 , H01L29/2003 , H01L29/66462
摘要： This invention pertains to an electronic device and to a method for making it. The device is a heterojunction transistor, particularly a high electron mobility transistor, characterized by presence of a 2 DEG channel. Transistors of this invention contain an AlGaN barrier and a GaN buffer, with the channel disposed, when present, at the interface of the barrier and the buffer. Surface treated with ammonia plasma resembles untreated surface. The method pertains to treatment of the device with ammonia plasma prior to passivation to extend reliability of the device beyond a period of time on the order of 300 hours of operation, the device typically being a 2 DEG AlGaN/GaN high electron mobility transistor with essentially no gate lag and with essentially no rf power output degradation.
摘要翻译：本发明涉及一种电子设备及其制造方法。该器件是异质结晶体管，特别是高电子迁移率晶体管，其特征在于存在2°通道。本发明的晶体管包含AlGaN势垒和GaN缓冲器，其中通道设置在阻挡层和缓冲器的界面处。用氨等离子体进行表面处理与未处理的表面相似。该方法涉及在钝化之前用氨等离子体处理器件，以将器件的可靠性延长超过约300小时的操作时间，该器件通常为2°AlGaN / GaN高电子迁移率晶体管，其基本上没有门滞，并且基本上没有rf功率输出降级。

3. 发明授权

US08652339B1 Patterned lift-off of thin films deposited at high temperatures 有权
标题翻译：在高温下沉积的薄膜图案剥离
公开(公告)号：US08652339B1
公开(公告)日：2014-02-18
申请号：US13746361
申请日：2013-01-22
申请人： David J. Meyer , Neil P. Green , David A. Deen , Steven C. Binari
发明人： David J. Meyer , Neil P. Green , David A. Deen , Steven C. Binari
IPC分类号： C03C15/00
CPC分类号： G03F7/094
摘要： A method for patterned deposition of an arbitrary thin film on an arbitrary substrate. A GaAs substrate having a bi-layer structure deposited thereon, the bi-layer structure consisting of a bottom layer of Ge and a top layer of SiN. A photoresist deposited on the top SiN surface of the sample is patterned to form one or more desired patterned features on the sample. The Ge—SiN bi-layer structure on the patterned sample is aniostropically etched so that an undercut is formed in the Ge layer, the SiN forming an overhang over a portion of the GaAs substrate. The remaining photoresist is removed from the sample and the film is deposited on the sample to form a feature on the substrate. The remaining Ge layer is etched away and the SiN layer and film deposited on the SiN layer are lifted from the sample, leaving only the patterned features on the substrate.
摘要翻译：在任意基板上图案化沉积任意薄膜的方法。具有沉积在其上的双层结构的GaAs衬底，双层结构由Ge的底层和SiN的顶层组成。图案化沉积在样品的顶部SiN表面上的光致抗蚀剂以在样品上形成一个或多个所需的图案化特征。在图案化样品上的Ge-SiN双层结构被人工蚀刻，使得在Ge层中形成底切，SiN在GaAs衬底的一部分上形成突出端。从样品中除去剩余的光致抗蚀剂，并将膜沉积在样品上以在基底上形成特征。蚀刻掉剩余的Ge层，并且沉积在SiN层上的SiN层和膜从样品中提起，仅在衬底上留下图案化的特征。

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