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1. 发明授权

US06881259B1 In-situ monitoring and control of germanium profile in silicon-germanium alloy films and temperature monitoring during deposition of silicon films 失效
标题翻译：原位监测和控制硅锗合金薄膜中的锗分布以及淀积硅膜期间的温度监测
公开(公告)号：US06881259B1
公开(公告)日：2005-04-19
申请号：US09633857
申请日：2000-08-07
申请人： David C. Ahlgren , Jack Oon Chu , Basanth Jagannathan , Ryan W. Wuthrich
发明人： David C. Ahlgren , Jack Oon Chu , Basanth Jagannathan , Ryan W. Wuthrich
IPC分类号： C30B25/16 , C30B29/52
CPC分类号： C30B29/52 , C30B25/165
摘要： Analysis of residual gases from a process for depositing a film containing silicon on a crystalline silicon surface to determine partial pressure of hydrogen evolved during deposition develops a signature which indicates temperature and/or concentration of germanium at the deposition surface. Calibration and collection of hydrogen partial pressure data at a rate which is high relative to film deposition rate allows real-time, in-situ, non-destructive determination of material concentration profile over the thickness of the film and/or monitoring the temperature of a silicon film deposition process with increased accuracy and resolution to provide films of a desired thickness with high accuracy.
摘要翻译：分析来自用于在晶体硅表面上沉积含硅的膜的工艺的残余气体，以确定在沉积期间释放出来的氢的分压，形成指示沉积表面的锗的温度和/或浓度的标记。以相对于膜沉积速率高的速率校准和收集氢分压数据允许在膜的厚度上的材料浓度分布的实时，原位，非破坏性测定和/或监测膜的温度硅膜沉积工艺具有更高的精度和分辨率，以高精度提供所需厚度的膜。

2. 发明授权

US06815802B2 Incorporation of carbon in silicon/silicon germanium epitaxial layer to enhance yield for Si-Ge bipolar technology 有权
标题翻译：在硅/硅锗外延层中引入碳以提高Si-Ge双极技术的产量
公开(公告)号：US06815802B2
公开(公告)日：2004-11-09
申请号：US10122857
申请日：2002-04-15
申请人： Jack Oon Chu , Douglass Duane Coolbaugh , James Stuart Dunn , David R. Greenberg , David L. Harame , Basanth Jagannathan , Robb Allen Johnson , Louis D. Lanzerotti , Kathryn Turner Schonenberg , Ryan Wayne Wuthrich
发明人： Jack Oon Chu , Douglass Duane Coolbaugh , James Stuart Dunn , David R. Greenberg , David L. Harame , Basanth Jagannathan , Robb Allen Johnson , Louis D. Lanzerotti , Kathryn Turner Schonenberg , Ryan Wayne Wuthrich
IPC分类号： H01L27082
CPC分类号： H01L29/66242 , H01L21/02381 , H01L21/02447 , H01L21/02529 , H01L21/02532 , H01L21/02579 , H01L21/0262 , H01L29/1004 , H01L29/161 , H01L29/7378
摘要： A SiGe bipolar transistor containing substantially no dislocation defects present between the emitter and collector region and a method of forming the same are provided. The SiGe bipolar transistor includes a collector region of a first conductivity type; a SiGe base region formed on a portion of said collector region; and an emitter region of said first conductivity type formed over a portion of said base region, wherein said collector region and said base region include carbon continuously therein. The SiGe base region is further doped with boron.

3. 发明授权

US07713829B2 Incorporation of carbon in silicon/silicon germanium epitaxial layer to enhance yield for Si-Ge bipolar technology 失效
标题翻译：在硅/硅锗外延层中引入碳以提高Si-Ge双极技术的产量
公开(公告)号：US07713829B2
公开(公告)日：2010-05-11
申请号：US11562735
申请日：2006-11-22
申请人： Jack Oon Chu , Douglas Duane Coolbaugh , James Stuart Dunn , David R. Greenberg , David L. Harame , Basanth Jagannathan , Robb Allen Johnson , Louis D. Lanzerotti , Kathryn Turner Schonenberg , Ryan Wayne Wuthrich
发明人： Jack Oon Chu , Douglas Duane Coolbaugh , James Stuart Dunn , David R. Greenberg , David L. Harame , Basanth Jagannathan , Robb Allen Johnson , Louis D. Lanzerotti , Kathryn Turner Schonenberg , Ryan Wayne Wuthrich
IPC分类号： H01L21/8222 , H01L29/737
CPC分类号： H01L29/66242 , H01L21/02381 , H01L21/02447 , H01L21/02529 , H01L21/02532 , H01L21/02579 , H01L21/0262 , H01L29/1004 , H01L29/161 , H01L29/7378
摘要： A SiGe bipolar transistor containing substantially no dislocation defects present between the emitter and collector region and a method of forming the same are provided. The SiGe bipolar transistor includes a collector region of a first conductivity type; a SiGe base region formed on a portion of said collector region; and an emitter region of said first conductivity type formed over a portion of said base region, wherein said collector region and said base region include carbon continuously therein. The SiGe base region is further doped with boron.
摘要翻译：提供了在发射极和集电极区域之间基本上不存在位错缺陷的SiGe双极晶体管及其形成方法。 SiGe双极晶体管包括第一导电类型的集电极区域; 形成在所述集电区域的一部分上的SiGe基区; 以及形成在所述基极区域的一部分上的所述第一导电类型的发射极区域，其中所述集电极区域和所述基极区域在其中连续地包括碳。 SiGe基区进一步掺硼。

4. 发明授权

US06426265B1 Incorporation of carbon in silicon/silicon germanium epitaxial layer to enhance yield for Si-Ge bipolar technology 有权
公开(公告)号：US06426265B1
公开(公告)日：2002-07-30
申请号：US09774126
申请日：2001-01-30
申请人： Jack Oon Chu , Douglas Duane Coolbaugh , James Stuart Dunn , David R. Greenberg , David L. Harame , Basanth Jagannathan , Robb Allen Johnson , Louis D. Lanzerotti , Kathryn Turner Schonenberg , Ryan Wayne Wuthrich
发明人： Jack Oon Chu , Douglas Duane Coolbaugh , James Stuart Dunn , David R. Greenberg , David L. Harame , Basanth Jagannathan , Robb Allen Johnson , Louis D. Lanzerotti , Kathryn Turner Schonenberg , Ryan Wayne Wuthrich
IPC分类号： H01L21331
CPC分类号： H01L29/66242 , H01L21/02381 , H01L21/02447 , H01L21/02529 , H01L21/02532 , H01L21/02579 , H01L21/0262 , H01L29/1004 , H01L29/161 , H01L29/7378
摘要： A SiGe bipolar transistor containing substantially no dislocation defects present between the emitter and collector region and a method of forming the same are provided. The SiGe bipolar transistor includes a collector region of a first conductivity type; a SiGe base region formed on a portion of said collector region; and an emitter region of said first conductivity type formed over a portion of said base region, wherein said collector region and said base region include carbon continuously therein. The SiGe base region is further doped with boron.

5. 发明授权

US06908866B2 Epitaxial and polycrystalline growth of Si1-x-yGexCy and Si1-yCy alloy layers on Si by UHV-CVD 失效
标题翻译： Si1-x-yGexCy和Si1-yCy合金层通过UHV-CVD在Si上的外延和多晶生长
公开(公告)号：US06908866B2
公开(公告)日：2005-06-21
申请号：US10775515
申请日：2004-02-10
申请人： Jack Oon Chu , Basanth Jagannathan , Alfred Grill , Bernard Steele Meyerson , John Albrecht Ott
发明人： Jack Oon Chu , Basanth Jagannathan , Alfred Grill , Bernard Steele Meyerson , John Albrecht Ott
IPC分类号： C23C16/32 , C30B25/02 , H01L21/31 , H01L21/469
CPC分类号： C23C16/325 , C23C16/32 , C30B25/02 , C30B29/52 , H01L21/02381 , H01L21/02447 , H01L21/0245 , H01L21/02505 , H01L21/02529 , H01L21/02532 , H01L21/02694 , Y10T428/12674
摘要： A method and apparatus for depositing single crystal, epitaxial films of silicon carbon and silicon germanium carbon on a plurality of substrates in a hot wall, isothermal UHV-CVD system is described. In particular, a multiple wafer low temperature growth technique in the range from 350° C. to 750° C. is described for incorporating carbon epitaxially in Si and SiGe films with very abrupt and well defined junctions, but without any associated oxygen background contamination. Preferably, these epitaxial SiC and SiGeC films are in-situ doped p- or n-type and with the presence of low concentration of carbon
摘要翻译：描述了一种用于在热壁，等温UHV-CVD系统中在多个基板上沉积单晶，硅碳和硅锗碳外延膜的方法和装置。特别地，描述了在350℃至750℃的范围内的多晶片低温生长技术，用于在Si和SiGe膜中外延引入碳，其具有非常突然且明确限定的结，但没有任何相关的氧背景污染。优选地，这些外延SiC和SiGeC膜是原位掺杂的p型或n型，并且存在低浓度的碳<20 20 -3 -3，生长的p型或n型掺杂物分布可以承受炉退火至850℃的温度和快速热退火温度至1000℃

6. 发明授权

US07183576B2 Epitaxial and polycrystalline growth of Si1-x-yGexCy and Si1-yCy alloy layers on Si by UHV-CVD 有权
标题翻译： Si1-x-yGexCy和Si1-yCy合金层通过UHV-CVD在Si上的外延和多晶生长
公开(公告)号：US07183576B2
公开(公告)日：2007-02-27
申请号：US10775514
申请日：2004-02-10
申请人： Jack Oon Chu , Basanth Jagannathan , Alfred Grill , Bernard Steele Meyerson , John Albrecht Ott
发明人： Jack Oon Chu , Basanth Jagannathan , Alfred Grill , Bernard Steele Meyerson , John Albrecht Ott
IPC分类号： H01L29/16 , H01L29/737
CPC分类号： C23C16/325 , C23C16/32 , C30B25/02 , C30B29/52 , H01L21/02381 , H01L21/02447 , H01L21/0245 , H01L21/02505 , H01L21/02529 , H01L21/02532 , H01L21/02694 , Y10T428/12674
摘要： A method and apparatus for depositing single crystal, epitaxial films of silicon carbon and silicon germanium carbon on a plurality of substrates in a hot wall, isothermal UHV-CVD system is described. In particular, a multiple wafer low temperature growth technique in the range from 350° C. to 750° C. is described for incorporating carbon epitaxially in Si and SiGe films with very abrupt and well defined junctions, but without any associated oxygen background contamination. Preferably, these epitakial SiC and SiGeC films are in-situ doped p- or n-type and with the presence of low concentration of carbon
摘要翻译：描述了一种用于在热壁，等温UHV-CVD系统中在多个基板上沉积单晶，硅碳和硅锗碳外延膜的方法和装置。特别地，描述了在350℃至750℃的范围内的多晶片低温生长技术，用于在Si和SiGe膜中外延引入碳，其具有非常突然且明确限定的结，但没有任何相关的氧背景污染。优选地，这些成膜SiC和SiGeC膜是原位掺杂的p型或n型，并且存在低浓度的碳<20 20 -3 -3，生长的p型或n型掺杂物分布可以承受炉退火至850℃的温度和快速热退火温度至1000℃

7. 发明授权

US07173274B2 Incorporation of carbon in silicon/silicon germanium epitaxial layer to enhance yield for Si-Ge bipolar technology 有权
标题翻译：在硅/硅锗外延层中引入碳以提高Si-Ge双极技术的产量
公开(公告)号：US07173274B2
公开(公告)日：2007-02-06
申请号：US10953378
申请日：2004-09-29
申请人： Jack Oon Chu , Douglas Duane Coolbaugh , James Stuart Dunn , David R. Greenberg , David L. Harame , Basanth Jagannathan , Robb Allen Johnson , Louis D. Lanzerotti , Kathryn Turner Schonenberg , Ryan Wayne Wuthrich
发明人： Jack Oon Chu , Douglas Duane Coolbaugh , James Stuart Dunn , David R. Greenberg , David L. Harame , Basanth Jagannathan , Robb Allen Johnson , Louis D. Lanzerotti , Kathryn Turner Schonenberg , Ryan Wayne Wuthrich
IPC分类号： H01L29/06 , H01L31/072 , H01L31/109 , H01L31/0328 , H01L31/0339
CPC分类号： H01L29/66242 , H01L21/02381 , H01L21/02447 , H01L21/02529 , H01L21/02532 , H01L21/02579 , H01L21/0262 , H01L29/1004 , H01L29/161 , H01L29/7378
摘要： A SiGe bipolar transistor containing substantially no dislocation defects present between the emitter and collector region and a method of forming the same are provided. The SiGe bipolar transistor includes a collector region of a first conductivity type; a SiGe base region formed on a portion of said collector region; and an emitter region of said first conductivity type formed over a portion of said base region, wherein said collector region and said base region include carbon continuously therein. The SiGe base region is further doped with boron.
摘要翻译：提供了在发射极和集电极区域之间基本上不存在位错缺陷的SiGe双极晶体管及其形成方法。 SiGe双极晶体管包括第一导电类型的集电极区域; 形成在所述集电区域的一部分上的SiGe基区; 以及形成在所述基极区域的一部分上的所述第一导电类型的发射极区域，其中所述集电极区域和所述基极区域在其中连续地包括碳。 SiGe基区进一步掺硼。

8. 发明授权

US06750119B2 Epitaxial and polycrystalline growth of Si1-x-yGexCy and Si1-yCy alloy layers on Si by UHV-CVD 有权
公开(公告)号：US06750119B2
公开(公告)日：2004-06-15
申请号：US09838892
申请日：2001-04-20
申请人： Jack Oon Chu , Basanth Jagannathan , Alfred Grill , Bernard Steele Meyerson , John Albrecht Ott
发明人： Jack Oon Chu , Basanth Jagannathan , Alfred Grill , Bernard Steele Meyerson , John Albrecht Ott
IPC分类号： H01L2120
CPC分类号： C23C16/325 , C23C16/32 , C30B25/02 , C30B29/52 , H01L21/02381 , H01L21/02447 , H01L21/0245 , H01L21/02505 , H01L21/02529 , H01L21/02532 , H01L21/02694 , Y10T428/12674
摘要： A method and apparatus for depositing single crystal, epitaxial films of silicon carbon and silicon germanium carbon on a plurality of substrates in a hot wall, isothermal UHV-CVD system is described. In particular, a multiple wafer low temperature growth technique in the range from 350° C. to 750° C. is described for incorporating carbon epitaxially in Si and SiGe films with very abrupt and well defined junctions, but without any associated oxygen background contamination. Preferably, these epitaxial SiC and SiGeC films are in-situ doped p- or n-type and with the presence of low concentration of carbon

9. 发明申请

US20100159658A1 HIGH SPEED LATERAL HETEROJUNCTION MISFETS REALIZED BY 2-DIMENSIONAL BANDGAP ENGINEERING AND METHODS THEREOF 有权
标题翻译：通过二维带隙工程实现的高速横向异相MISFET及其方法
公开(公告)号：US20100159658A1
公开(公告)日：2010-06-24
申请号：US12534562
申请日：2009-08-03
申请人： Qiqing Christine Ouyang , Jack Oon Chu
发明人： Qiqing Christine Ouyang , Jack Oon Chu
IPC分类号： H01L21/8234
CPC分类号： H01L21/823807 , H01L21/823814 , H01L29/165 , H01L29/802 , Y10S438/933
摘要： A method for forming and the structure of a strained lateral channel of a field effect transistor, a field effect transistor and CMOS circuitry is described incorporating a drain, body and source region on a single crystal semiconductor substrate wherein a hetero-junction is formed between the source and body of the transistor, wherein the source region and channel are independently lattice strained with respect the body region. The invention reduces the problem of leakage current from the source region via the hetero junction and lattice strain while independently permitting lattice strain in the channel region for increased mobility via choice of the semiconductor materials and alloy composition.
摘要翻译：描述了一种用于形成场效应晶体管，场效应晶体管和CMOS电路的应变横向沟道结构的方法，其在单晶半导体衬底上结合了漏极，主体和源极区域，其中在晶体管的源极和主体，其中源极区域和沟道独立地相对于身体区域进行晶格应变。本发明通过异质结和晶格应变来减少来自源极区的漏电流的问题，同时通过选择半导体材料和合金组成独立地允许沟道区域中的晶格应变以增加迁移率。

10. 发明授权

US07608496B2 High speed GE channel heterostructures for field effect devices 有权
标题翻译：用于场效应装置的高速GE通道异质结构
公开(公告)号：US07608496B2
公开(公告)日：2009-10-27
申请号：US12209757
申请日：2008-09-12
申请人： Jack Oon Chu
发明人： Jack Oon Chu
IPC分类号： H01L21/338
CPC分类号： H01L29/7782 , H01L21/823807 , H01L27/092 , H01L29/1054 , H01L29/66431
摘要： A method and a layered heterostructure for forming high mobility Ge channel field effect transistors is described incorporating a plurality of semiconductor layers on a semiconductor substrate, and a channel structure of a compressively strained epitaxial Ge layer having a higher barrier or a deeper confining quantum well and having extremely high hole mobility for complementary MODFETs and MOSFETs. The invention overcomes the problem of a limited hole mobility due to alloy scattering for a p-channel device with only a single compressively strained SiGe channel layer. This invention further provides improvements in mobility and transconductance over deep submicron state-of-the art Si pMOSFETs in addition to having a broad temperature operation regime from above room temperature (425 K) down to cryogenic low temperatures (0.4 K) where at low temperatures even high device performances are achievable.
摘要翻译：一种用于形成高迁移率Ge沟道场效应晶体管的方法和分层异质结构被描述为在半导体衬底上并入多个半导体层，以及具有较高势垒或更深限制量子阱的压缩应变外延Ge层的沟道结构，对互补的MODFET和MOSFET具有极高的空穴迁移率。本发明克服了由于仅具有单个压缩应变SiGe沟道层的p沟道器件的合金散射引起的有限空穴迁移率的问题。本发明还提供了在深亚微米级的最先进的Si pMOSFETs的迁移率和跨导性方面的改进，以及从室温（425K）到低温低温（0.4K）的宽温度操作方案，其中在低温甚至可以实现高设备性能。

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