专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20090303773A1 Multi-terminal reversibly switchable memory device 审中-公开
标题翻译：多端可逆切换存储设备
公开(公告)号：US20090303773A1
公开(公告)日：2009-12-10
申请号：US12456677
申请日：2009-06-18
申请人： Darrell Rinerson , Roy Lambertson , Christophe Chevallier , Edmond Ward
发明人： Darrell Rinerson , Roy Lambertson , Christophe Chevallier , Edmond Ward
IPC分类号： G11C11/00 , H01L45/00 , G11C7/00
CPC分类号： H01L45/08 , G06F17/5045 , G11C11/5685 , G11C13/0007 , G11C13/0009 , G11C13/004 , G11C13/0069 , G11C2013/0045 , G11C2013/005 , G11C2013/009 , G11C2213/11 , G11C2213/31 , G11C2213/32 , G11C2213/53 , G11C2213/54 , G11C2213/56 , G11C2213/71 , G11C2213/79 , H01L27/2436 , H01L27/2481 , H01L45/085 , H01L45/1233 , H01L45/1246 , H01L45/1253 , H01L45/146 , H01L45/147 , H01L45/1625
摘要： A memory using mixed valence conductive oxides is disclosed. The memory includes a mixed valence conductive oxide that is less conductive in its oxygen deficient state and a mixed electronic ionic conductor that is an electrolyte to oxygen and promotes an electric field effective to cause oxygen ionic motion.
摘要翻译：公开了使用混合价态导电氧化物的记忆体。存储器包括在其缺氧状态下导电性较差的混合价态导电氧化物和作为电解质的氧的混合电子离子导体并且促进有效引起氧离子运动的电场。

2. 发明申请

US20060171200A1 Memory using mixed valence conductive oxides 审中-公开
标题翻译：使用混合价态导电氧化物的记忆
公开(公告)号：US20060171200A1
公开(公告)日：2006-08-03
申请号：US11095026
申请日：2005-03-30
申请人： Darrell Rinerson , Christophe Chevallier , Wayne Kinney , Roy Lambertson , Steven Longcor , John Sanchez , Lawrence Schloss , Philip Swab , Edmond Ward
发明人： Darrell Rinerson , Christophe Chevallier , Wayne Kinney , Roy Lambertson , Steven Longcor , John Sanchez , Lawrence Schloss , Philip Swab , Edmond Ward
IPC分类号： G11C11/34
CPC分类号： H01L45/08 , G06F17/5045 , G11C11/5685 , G11C13/0007 , G11C13/0009 , G11C13/004 , G11C13/0069 , G11C2013/0045 , G11C2013/005 , G11C2013/009 , G11C2213/11 , G11C2213/31 , G11C2213/32 , G11C2213/53 , G11C2213/54 , G11C2213/56 , G11C2213/71 , G11C2213/79 , H01L27/2436 , H01L27/2481 , H01L45/085 , H01L45/1233 , H01L45/1246 , H01L45/1253 , H01L45/146 , H01L45/147 , H01L45/1625
摘要： A memory using a mixed valence conductive oxides. The memory includes a mixed valence conductive oxide that is less conductive in its oxygen deficient state and a mixed electronic ionic conductor that is an electrolyte to oxygen and promotes an electric field effective to cause oxygen ionic motion.
摘要翻译：使用混合价态导电氧化物的记忆。存储器包括在其缺氧状态下导电性较差的混合价态导电氧化物和作为电解质的氧的混合电子离子导体并且促进有效引起氧离子运动的电场。

3. 发明申请

US20090303772A1 Two-Terminal Reversibly Switchable Memory Device 审中-公开
标题翻译：双端可逆切换存储器
公开(公告)号：US20090303772A1
公开(公告)日：2009-12-10
申请号：US12456627
申请日：2009-06-18
申请人： Darrell Rinerson , Christophe Chevallier , Wayne Kinney , Roy Lambertson , John E. Sanchez, JR. , Lawrence Schloss , Philip Swab , Edmond Ward
发明人： Darrell Rinerson , Christophe Chevallier , Wayne Kinney , Roy Lambertson , John E. Sanchez, JR. , Lawrence Schloss , Philip Swab , Edmond Ward
IPC分类号： G11C11/00 , H01L45/00 , G11C7/00
CPC分类号： H01L45/08 , G06F17/5045 , G11C11/5685 , G11C13/0007 , G11C13/0009 , G11C13/004 , G11C13/0069 , G11C2013/0045 , G11C2013/005 , G11C2013/009 , G11C2213/11 , G11C2213/31 , G11C2213/32 , G11C2213/53 , G11C2213/54 , G11C2213/56 , G11C2213/71 , G11C2213/79 , H01L27/2436 , H01L27/2481 , H01L45/085 , H01L45/1233 , H01L45/1246 , H01L45/1253 , H01L45/146 , H01L45/147 , H01L45/1625
摘要： A memory using mixed valence conductive oxides is disclosed. The memory includes a mixed valence conductive oxide that is less conductive in its oxygen deficient state and a mixed electronic ionic conductor that is an electrolyte to oxygen and promotes an electric field effective to cause oxygen ionic motion.
摘要翻译：公开了使用混合价态导电氧化物的记忆体。存储器包括在其缺氧状态下导电性较差的混合价态导电氧化物和作为电解质的氧的混合电子离子导体并且促进有效引起氧离子运动的电场。

4. 发明授权

US08395928B2 Threshold device for a memory array 有权
公开(公告)号：US08395928B2
公开(公告)日：2013-03-12
申请号：US13206460
申请日：2011-08-09
申请人： Julie Casperson Brewer , Christophe Chevallier , Wayne Kinney , Roy Lambertson , Darrell Rinerson , Lawrence Schloss
发明人： Julie Casperson Brewer , Christophe Chevallier , Wayne Kinney , Roy Lambertson , Darrell Rinerson , Lawrence Schloss
IPC分类号： G11C11/36
CPC分类号： G11C7/02 , G11C11/5685 , G11C13/0007 , G11C13/003 , G11C13/0069 , G11C2013/009 , G11C2213/32 , G11C2213/71 , G11C2213/76 , H01L27/2418 , H01L27/2481 , H01L45/08 , H01L45/1233 , H01L45/147
摘要： A threshold device including a plurality of adjacent tunnel barrier layers that are in contact with one another and are made from a plurality of different dielectric materials is disclosed. A memory plug having first and second terminals includes, electrically in series with the first and second terminals, the threshold device and a memory element that stores data as a plurality of conductivity profiles. The threshold device is operative to impart a characteristic I-V curve that defines current flow through the memory element as a function of applied voltage across the terminals during data operations. The threshold device substantially reduces or eliminates current flow through half-selected or un-selected memory plugs and allows a sufficient magnitude of current to flow through memory plugs that are selected for read and write operations. The threshold device reduces or eliminates data disturb in half-selected memory plugs and increases S/N ratio during read operations.

5. 发明授权

US07995371B2 Threshold device for a memory array 失效
标题翻译：内存阵列的阈值设备
公开(公告)号：US07995371B2
公开(公告)日：2011-08-09
申请号：US11881473
申请日：2007-07-26
申请人： Darrell Rinerson , Julie Casperson Brewer , Christophe J. Chevallier , Wayne Kinney , Roy Lambertson , Lawrence Schloss
发明人： Darrell Rinerson , Julie Casperson Brewer , Christophe J. Chevallier , Wayne Kinney , Roy Lambertson , Lawrence Schloss
IPC分类号： G11C11/00
CPC分类号： G11C7/02 , G11C11/5685 , G11C13/0007 , G11C13/003 , G11C13/0069 , G11C2013/009 , G11C2213/32 , G11C2213/71 , G11C2213/76 , H01L27/2418 , H01L27/2481 , H01L45/08 , H01L45/1233 , H01L45/147
摘要： A threshold device including a plurality of adjacent tunnel barrier layers that are in contact with one another and are made from a plurality of different dielectric materials is disclosed. A memory plug having first and second terminals includes, electrically in series with the first and second terminals, the threshold device and a memory element that stores data as a plurality of conductivity profiles. The threshold device is operative to impart a characteristic I-V curve that defines current flow through the memory element as a function of applied voltage across the terminals during data operations. The threshold device substantially reduces or eliminates current flow through half-selected or un-selected memory plugs and allows a sufficient magnitude of current to flow through memory plugs that are selected for read and write operations. The threshold device reduces or eliminates data disturb in half-selected memory plugs and increases S/N ratio during read operations.
摘要翻译：公开了一种阈值装置，其包括彼此接触并且由多种不同介电材料制成的多个相邻隧道势垒层。具有第一和第二端子的存储器插头包括与第一和第二端子串联的阈值装置和存储数据作为多个导电率曲线的存储元件。阈值装置可操作以在数据操作期间根据施加的电压施加限定通过存储元件的电流的特征I-V曲线。阈值装置基本上减少或消除了通过半选择或未选择的存储器插头的电流，并且允许足够大的电流流过被选择用于读取和写入操作的存储器插头。阈值器件减少或消除半选择的存储器插头中的数据干扰，并在读取操作期间增加S / N比。

6. 发明申请

US20090027976A1 Threshold device for a memory array 失效
标题翻译：内存阵列的阈值设备
公开(公告)号：US20090027976A1
公开(公告)日：2009-01-29
申请号：US11881473
申请日：2007-07-26
申请人： Julie Casperson Brewer , Darrell Rinerson , Christophe J. Chevallier , Wayne Kinney , Roy Lambertson , Lawrence Schloss
发明人： Julie Casperson Brewer , Darrell Rinerson , Christophe J. Chevallier , Wayne Kinney , Roy Lambertson , Lawrence Schloss
IPC分类号： G11C7/00
CPC分类号： G11C7/02 , G11C11/5685 , G11C13/0007 , G11C13/003 , G11C13/0069 , G11C2013/009 , G11C2213/32 , G11C2213/71 , G11C2213/76 , H01L27/2418 , H01L27/2481 , H01L45/08 , H01L45/1233 , H01L45/147
摘要： A threshold device including a plurality of adjacent tunnel barrier layers that are in contact with one another and are made from a plurality of different dielectric materials is disclosed. A memory plug having first and second terminals includes, electrically in series with the first and second terminals, the threshold device and a memory element that stores data as a plurality of conductivity profiles. The threshold device is operative to impart a characteristic I-V curve that defines current flow through the memory element as a function of applied voltage across the terminals during data operations. The threshold device substantially reduces or eliminates current flow through half-selected or un-selected memory plugs and allows a sufficient magnitude of current to flow through memory plugs that are selected for read and write operations. The threshold device reduces or eliminates data disturb in half-selected memory plugs and increases S/N ratio during read operations.
摘要翻译：公开了一种阈值装置，其包括彼此接触并且由多种不同介电材料制成的多个相邻隧道势垒层。具有第一和第二端子的存储器插头包括与第一和第二端子串联的阈值装置和存储数据作为多个导电率曲线的存储元件。阈值装置可操作以在数据操作期间根据施加的电压施加限定通过存储元件的电流的特征I-V曲线。阈值装置基本上减少或消除了通过半选择或未选择的存储器插头的电流，并且允许足够大的电流流过被选择用于读取和写入操作的存储器插头。阈值器件减少或消除半选择的存储器插头中的数据干扰，并在读取操作期间增加S / N比。

7. 发明授权

US08045364B2 Non-volatile memory device ion barrier 失效
公开(公告)号：US08045364B2
公开(公告)日：2011-10-25
申请号：US12653838
申请日：2009-12-18
申请人： Lawrence Schloss , Rene Meyer , Wayne Kinney , Roy Lambertson , Julie Casperson Brewer
发明人： Lawrence Schloss , Rene Meyer , Wayne Kinney , Roy Lambertson , Julie Casperson Brewer
IPC分类号： G11C11/00
CPC分类号： G11C13/0007 , G11C2213/31 , G11C2213/32 , H01L27/2409 , H01L27/2418 , H01L27/2472 , H01L27/2481 , H01L45/08 , H01L45/12 , H01L45/1233 , H01L45/146 , H01L45/147
摘要： An ion barrier layer made from a dielectric material in contact with an electronically insulating layer is operative to prevent mobile ions transported into the electronically insulating layer from passing through the ion barrier layer and into adjacent layers during data operations on a non-volatile memory cell. A conductive oxide layer in contact with the electronically insulating layer is the source of the mobile ions. A programming data operation is operative to transport a portion of the mobile ions into the electronically insulating layer and an erase data operation is operative to transport the mobile ions back into the conductive oxide layer. When the portion is positioned in the electronically insulating layer the memory cell stores data as a programmed conductivity profile and when a substantial majority of the mobile ions are positioned in the conductive oxide layer the memory cell stores data as an erased conductivity profile.

8. 发明授权

US08493771B2 Non-volatile memory device ion barrier 失效
标题翻译：非易失性存储器件离子屏障
公开(公告)号：US08493771B2
公开(公告)日：2013-07-23
申请号：US13570871
申请日：2012-08-09
申请人： Lawrence Schloss , Julie Casperson Brewer , Wayne Kinney , Roy Lambertson , Rene Meyer
发明人： Lawrence Schloss , Julie Casperson Brewer , Wayne Kinney , Roy Lambertson , Rene Meyer
IPC分类号： G11C11/21
CPC分类号： G11C13/0007 , G11C2213/31 , G11C2213/32 , H01L27/2409 , H01L27/2418 , H01L27/2472 , H01L27/2481 , H01L45/08 , H01L45/12 , H01L45/1233 , H01L45/146 , H01L45/147
摘要： An ion barrier layer made from a dielectric material in contact with an electronically insulating layer is operative to prevent mobile ions transported into the electronically insulating layer from passing through the ion barrier layer and into adjacent layers during data operations on a non-volatile memory cell. A conductive oxide layer in contact with the electronically insulating layer is the source of the mobile ions. A programming data operation is operative to transport a portion of the mobile ions into the electronically insulating layer and an erase data operation is operative to transport the mobile ions back into the conductive oxide layer. When the portion is positioned in the electronically insulating layer the memory cell stores data as a programmed conductivity profile and when a substantial majority of the mobile ions are positioned in the conductive oxide layer the memory cell stores data as an erased conductivity profile.
摘要翻译：由与电绝缘层接触的介电材料制成的离子阻挡层可操作以防止在对非易失性存储单元的数据操作期间传输到电绝缘层中的移动离子通过离子阻挡层并进入相邻层。与电绝缘层接触的导电氧化物层是可移动离子的源。编程数据操作用于将一部分移动离子传输到电绝缘层中，并且擦除数据操作可操作以将移动离子传输回到导电氧化物层中。当该部分位于电绝缘层中时，存储单元将数据存储为编程电导率分布，并且当大部分移动离子位于导电氧化物层中时，存储单元将数据存储为擦除的电导率分布。

9. 发明授权

US08274817B2 Non volatile memory device ion barrier 有权
标题翻译：非易失性存储器件离子屏障
公开(公告)号：US08274817B2
公开(公告)日：2012-09-25
申请号：US13281335
申请日：2011-10-25
申请人： Lawrence Schloss , Julie Casperson Brewer , Wayne Kinney , Roy Lambertson , Rene Meyer
发明人： Lawrence Schloss , Julie Casperson Brewer , Wayne Kinney , Roy Lambertson , Rene Meyer
IPC分类号： G11C11/00
CPC分类号： G11C13/0007 , G11C2213/31 , G11C2213/32 , H01L27/2409 , H01L27/2418 , H01L27/2472 , H01L27/2481 , H01L45/08 , H01L45/12 , H01L45/1233 , H01L45/146 , H01L45/147
摘要： An ion barrier layer made from a dielectric material in contact with an electronically insulating layer is operative to prevent mobile ions transported into the electronically insulating layer from passing through the ion barrier layer and into adjacent layers during data operations on a non-volatile memory cell. A conductive oxide layer in contact with the electronically insulating layer is the source of the mobile ions. A programming data operation is operative to transport a portion of the mobile ions into the electronically insulating layer and an erase data operation is operative to transport the mobile ions back into the conductive oxide layer. When the portion is positioned in the electronically insulating layer the memory cell stores data as a programmed conductivity profile and when a substantial majority of the mobile ions are positioned in the conductive oxide layer the memory cell stores data as an erased conductivity profile.
摘要翻译：由与电绝缘层接触的介电材料制成的离子阻挡层可操作以防止在对非易失性存储单元的数据操作期间传输到电绝缘层中的移动离子通过离子阻挡层并进入相邻层。与电绝缘层接触的导电氧化物层是可移动离子的源。编程数据操作用于将一部分移动离子传输到电绝缘层中，并且擦除数据操作可操作以将移动离子传输回到导电氧化物层中。当该部分位于电绝缘层中时，存储单元将数据存储为编程电导率分布，并且当大部分移动离子位于导电氧化物层中时，存储单元将数据存储为擦除的电导率分布。

10. 发明授权

US08027215B2 Array operation using a schottky diode as a non-ohmic isolation device 有权
标题翻译：使用肖特基二极管作为非欧姆隔离器件的阵列操作
公开(公告)号：US08027215B2
公开(公告)日：2011-09-27
申请号：US12584262
申请日：2009-09-02
申请人： Roy Lambertson , Lawrence Schloss
发明人： Roy Lambertson , Lawrence Schloss
IPC分类号： G11C7/00
CPC分类号： H01L45/146 , G11C11/36 , G11C13/003 , G11C29/006 , G11C2213/71 , G11C2213/76 , H01L27/101 , H01L27/1021
摘要： A two-terminal memory cell including a Schottky metal-semiconductor contact as a non-ohmic device (NOD) allows selection of two-terminal cross-point memory array operating voltages that eliminate “half-select leakage current” problems present when other types of non-ohmic devices are used. The NOD structure can comprise a “metal/oxide semiconductor/metal” or a “metal/lightly-doped single layer polycrystalline silicon.” The memory cell can include a two-terminal memory element including at least one conductive oxide layer (e.g., a conductive metal oxide—CMO, such as a perovskite or a conductive binary oxide) and an electronically insulating layer (e.g., yttria-stabilized zirconia—YSZ) in contact with the CMO. The NOD can be included in the memory cell and configured electrically in series with the memory element. The memory cell can be positioned in a two-terminal cross-point array between a pair of conductive array lines (e.g., a bit line and a word line) across which voltages for data operations are applied.
摘要翻译：包括肖特基金属 - 半导体接触作为非欧姆器件（NOD）的两端存储单元允许选择两端交叉点存储器阵列工作电压，以消除当其它类型的使用非欧姆器件。 NOD结构可以包括“金属/氧化物半导体/金属”或“金属/轻掺杂的单层多晶硅”。存储单元可以包括两端存储元件，其包括至少一个导电氧化物层（例如，导电金属氧化物-CMO，例如钙钛矿或导电二元氧化物）和与CMO接触的电子绝缘层（例如，氧化钇稳定的氧化锆-YSZ）。 NOD可以被包括在存储器单元中并与存储元件串联构成。存储器单元可以位于一对导电阵列线（例如，位线和字线）之间的两端交叉点阵列中，用于数据操作的电压被施加在该两端交叉点阵列上。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式