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1. 发明授权

US08248170B2 Stabilized digital quadrature oscillator 有权
标题翻译：稳定数字正交振荡器
公开(公告)号：US08248170B2
公开(公告)日：2012-08-21
申请号：US12952154
申请日：2010-11-22
申请人： Dariush Dabiri , Dongwoon Bai , Nils Graef , Wenwei Pan
发明人： Dariush Dabiri , Dongwoon Bai , Nils Graef , Wenwei Pan
IPC分类号： H03K3/03
CPC分类号： G06F1/022
摘要： A stabilized quadrature oscillator providing consistently high signal quality is disclosed. The stabilized quadrature oscillator includes an iterative quadrature oscillator and a quadrature signal stabilizer. The iterative quadrature oscillator generates an iterative cosine signal and an iterative sine signal using a stabilized cosine signal and a stabilized sine signal from the quadrature signal stabilizer. The quadrature signal stabilizer generates the stabilized cosine signal and the stabilized sine signal based on an energy measure of the iterative cosine signal and the iterative sine signal. Specifically, if the energy measure is less than a low threshold then the quadrature signal stabilizer generates the stabilized sine signal and the stabilized cosine signal to have a greater magnitude than the iterative sine signal and the iterative cosine signal, respectively. Conversely, if the energy measure is greater than a high threshold then the quadrature signal stabilizer generates the stabilized sine signal and the stabilized cosine signal to have a lesser magnitude than the iterative sine signal and the iterative cosine signal, respectively.
摘要翻译：公开了一种提供一致的高信号质量的稳定的正交振荡器。稳定的正交振荡器包括迭代正交振荡器和正交信号稳定器。迭代正交振荡器使用稳定余弦信号和来自正交信号稳定器的稳定正弦信号产生迭代余弦信号和迭代正弦信号。正交信号稳定器基于迭代余弦信号和迭代正弦信号的能量测量值产生稳定的余弦信号和稳定的正弦信号。具体地说，如果能量测量小于低阈值，则正交信号稳定器分别产生稳定的正弦信号和稳定的余弦信号，以具有比迭代正弦信号和迭代余弦信号更大的幅度。相反，如果能量测量值大于高阈值，则正交信号稳定器分别产生稳定正弦信号和稳定余弦信号，其幅度分别小于迭代正弦信号和迭代余弦信号。

2. 发明申请

US20120126903A1 Stabilized Digital Quadrature Oscillator 有权
标题翻译：稳定数字正交振荡器
公开(公告)号：US20120126903A1
公开(公告)日：2012-05-24
申请号：US12952154
申请日：2010-11-22
申请人： Dariush Dabiri , Dongwoon Bai , Nils Graef , Wenwei Pan
发明人： Dariush Dabiri , Dongwoon Bai , Nils Graef , Wenwei Pan
IPC分类号： H03B27/00
CPC分类号： G06F1/022
摘要： A stabilized quadrature oscillator providing consistently high signal quality is disclosed. The stabilized quadrature oscillator includes an iterative quadrature oscillator and a quadrature signal stabilizer. The iterative quadrature oscillator generates an iterative cosine signal and an iterative sine signal using a stabilized cosine signal and a stabilized sine signal from the quadrature signal stabilizer. The quadrature signal stabilizer generates the stabilized cosine signal and the stabilized sine signal based on an energy measure of the iterative cosine signal and the iterative sine signal. Specifically, if the energy measure is less than a low threshold then the quadrature signal stabilizer generates the stabilized sine signal and the stabilized cosine signal to have a greater magnitude than the iterative sine signal and the iterative cosine signal, respectively. Conversely, if the energy measure is greater than a high threshold then the quadrature signal stabilizer generates the stabilized sine signal and the stabilized cosine signal to have a lesser magnitude than the iterative sine signal and the iterative cosine signal, respectively.
摘要翻译：公开了一种提供一致的高信号质量的稳定的正交振荡器。稳定的正交振荡器包括迭代正交振荡器和正交信号稳定器。迭代正交振荡器使用稳定余弦信号和来自正交信号稳定器的稳定正弦信号产生迭代余弦信号和迭代正弦信号。正交信号稳定器基于迭代余弦信号和迭代正弦信号的能量测量值产生稳定的余弦信号和稳定的正弦信号。具体地说，如果能量测量小于低阈值，则正交信号稳定器分别产生稳定的正弦信号和稳定的余弦信号，以具有比迭代正弦信号和迭代余弦信号更大的幅度。相反，如果能量测量值大于高阈值，则正交信号稳定器分别产生稳定正弦信号和稳定余弦信号，其幅度分别小于迭代正弦信号和迭代余弦信号。

3. 发明授权

US08578256B2 Low-latency decoder 有权
标题翻译：低延迟解码器
公开(公告)号：US08578256B2
公开(公告)日：2013-11-05
申请号：US12427786
申请日：2009-04-22
申请人： Nils Graef
发明人： Nils Graef
IPC分类号： G06F11/10
CPC分类号： H03M13/116 , H03M13/1122 , H03M13/114 , H04L1/0051 , H04L1/0057
摘要： In one embodiment, a signal-processing receiver has an upstream processor and a low-density parity-check (LDPC) decoder for decoding LDPC-encoded codewords. The upstream processor generates a soft-output value for each bit of the received codewords. The LDPC decoder is implemented to process the soft-output values without having to wait until all of the soft-output values are generated for the current codeword. Further, the LDPC code used to encode the codewords is arranged to support such processing. By processing the soft-output values without having to wait until all of the soft-output values are generated for the current codeword, receivers of the present invention may have a lower latency and higher throughput than prior-art receivers that wait until all of the soft-output values are generated prior to performing LDPC decoding. In another embodiment, the LDPC decoder processes the soft-output values as soon as, and in the order that, they are generated.
摘要翻译：在一个实施例中，信号处理接收机具有用于解码LDPC编码码字的上行处理器和低密度奇偶校验（LDPC）解码器。上游处理器为接收到的码字的每个比特生成软输出值。实现LDPC解码器来处理软输出值，而不必等待直到为当前码字生成所有软输出值。此外，用于编码码字的LDPC码被布置成支持这样的处理。通过处理软输出值而不必等待所有软输出值为当前码字生成，本发明的接收机可以具有比现有技术的接收机更低的等待时间和更高的吞吐量，在执行LDPC解码之前产生软输出值。在另一个实施例中，LDPC解码器按照它们被生成的顺序处理软输出值。

4. 发明授权

US08014196B2 Reduced-power programming of multi-level cell (MLC) memory 有权
标题翻译：多级单元（MLC）存储器的低功耗编程
公开(公告)号：US08014196B2
公开(公告)日：2011-09-06
申请号：US12200129
申请日：2008-08-28
申请人： Nils Graef
发明人： Nils Graef
IPC分类号： G11C16/06 , G11C16/10 , G11C16/12 , G11C16/26
CPC分类号： G11C7/1006 , G11C11/5628 , G11C2211/5622
摘要： In one embodiment, a mobile electronic device has a host controller, an energy-saving encoder, an energy-saving decoder, and a multi-level cell (MLC) NAND flash memory. The host controller provides raw user data to the energy-saving encoder in k-bit segments. The energy-saving encoder encodes each k-bit segment into an n-bit segment of encoded user data for programming the MLC NAND flash memory as a p-symbol codeword, where (i) k is smaller than n (ii) p(=n/log2 m) MLCs are used to store the p-symbol codeword (iii) each MLC stores one symbol of the codeword. The energy-saving decoder is adapted to read p-symbol codewords from the MLC NAND flash memory and decode each p-symbol codeword into a k-bit segment of raw user data for provision to the host controller. The host controller is adapted to vary k and n to conserve usage of power or memory-space, as needed.
摘要翻译：在一个实施例中，移动电子设备具有主机控制器，节能编码器，节能解码器和多电平单元（MLC）NAND闪速存储器。主机控制器以k位分段向节能编码器提供原始用户数据。节能编码器将每个k比特段编码为编码用户数据的n比特段，用于将MLC NAND闪存编程为p符号码字，其中（i）k小于n（ii）p（= n / log2 m）MLC用于存储p符号码字（iii），每个MLC存储码字的一个符号。节能解码器适于从MLC NAND闪速存储器读取p符号码字，并将每个p符号码字解码为原始用户数据的k比特段以提供给主机控制器。主机控制器适于根据需要改变k和n以节省功率或存储空间的使用。

5. 发明申请

US20090304124A1 REDUCED-COMPLEXITY MULTIPLE-INPUT, MULTIPLE-OUTPUT DETECTION 有权
标题翻译：降低复杂度多输入，多输出检测
公开(公告)号：US20090304124A1
公开(公告)日：2009-12-10
申请号：US12508697
申请日：2009-07-24
申请人： Nils Graef , Joachim S. Hammerschmidt
发明人： Nils Graef , Joachim S. Hammerschmidt
IPC分类号： H04L27/06
CPC分类号： H04L25/03191 , H04B7/0413 , H04L5/0023 , H04L25/0204 , H04L25/0224 , H04L25/0321 , H04L25/03318 , H04L27/2647 , H04L2025/03414 , H04L2025/03426 , H04L2025/03643
摘要： A wireless receiver detects signals generated with a multiple-input, multiple-output (MIMO) transmitter. The receiver applies maximum-likelihood detection (MLD) for soft-output signal detection, where an MLD exhaustive search across all candidate vectors is performed recursively by computing and accumulating the differences between, for example, the Euclidean metrics of consecutive candidate tests. Difference terms used for the accumulation are also calculated recursively. An ordering of candidates, such as by a triangular-waveform shaped ordering, is employed such that only one candidate variable is changed between any two consecutive candidate evaluations, leading to a reduced set of computations.
摘要翻译：无线接收机检测由多输入多输出（MIMO）发射机产生的信号。接收机对软输出信号检测应用最大似然检测（MLD），其中通过计算和累积例如连续候选测试的欧几里德度量之间的差异来递归地执行跨所有候选向量的MLD详尽搜索。用于积累的差异项也递归计算。采用诸如通过三角形波形排序的候选者的排序，使得在任何两个连续的候选评估之间仅改变一个候选变量，导致减少的计算集合。

6. 发明授权

US07583762B2 Reduced-complexity multiple-input, multiple-output detection 失效
标题翻译：降低复杂度的多输入多输出检测
公开(公告)号：US07583762B2
公开(公告)日：2009-09-01
申请号：US10990910
申请日：2004-11-17
申请人： Nils Graef , Joachim S. Hammerschmidt
发明人： Nils Graef , Joachim S. Hammerschmidt
IPC分类号： H03D1/00
CPC分类号： H04L25/03191 , H04B7/0413 , H04L5/0023 , H04L25/0204 , H04L25/0224 , H04L25/0321 , H04L25/03318 , H04L27/2647 , H04L2025/03414 , H04L2025/03426 , H04L2025/03643
摘要： A wireless receiver detects signals generated with a multiple-input, multiple-output (MIMO) transmitter. The receiver applies maximum-likelihood detection (MLD) for soft-output signal detection, where an MLD exhaustive search across all candidate vectors is performed recursively by computing and accumulating the differences between, for example, the Euclidean metrics of consecutive candidate tests. Difference terms used for the accumulation are also calculated recursively. An ordering of candidates, such as by a triangular-waveform shaped ordering, is employed such that only one candidate variable is changed between any two consecutive candidate evaluations, leading to a reduced set of computations.
摘要翻译：无线接收机检测由多输入多输出（MIMO）发射机产生的信号。接收机对软输出信号检测应用最大似然检测（MLD），其中通过计算和累积例如连续候选测试的欧几里德度量之间的差异来递归地执行跨所有候选向量的MLD详尽搜索。用于积累的差异项也递归计算。采用诸如通过三角形波形排序的候选者的排序，使得在任何两个连续的候选评估之间仅改变一个候选变量，导致减少的计算集合。

7. 发明申请

US20080258908A1 Systems and Methods for Communications Activity Status 审中-公开
标题翻译：通信活动状态的系统和方法
公开(公告)号：US20080258908A1
公开(公告)日：2008-10-23
申请号：US11738626
申请日：2007-04-23
申请人： Nils Graef
发明人： Nils Graef
IPC分类号： G08B5/18 , H04Q7/00
CPC分类号： H04L41/12 , H04L43/0817 , H04L51/04 , H04L67/14 , H04L67/18 , H04W4/029
摘要： Various systems and methods for indicating the status of a communication are disclosed herein. For example, status indication methods are disclosed that include initiating a communication that allows for communication between two persons. Further, the methods include determining a combination of status. The combination of status is based on a determination of two or more of the following: a calendar status, a power status, an activity status, and a location status. A communication status message is updated based at least in part on the determined combination of status.
摘要翻译：本文公开了用于指示通信状态的各种系统和方法。例如，公开了包括启动允许两个人之间的通信的通信的状态指示方法。此外，所述方法包括确定状态的组合。状态的组合基于以下两个或多个的确定：日历状态，电力状态，活动状态和位置状态。至少部分地基于所确定的状态的组合来更新通信状态消息。

8. 发明申请

US20080168330A1 SYSTEMS AND METHODS FOR PRIORITIZING ERROR CORRECTION DATA 有权
标题翻译：用于优化错误校正数据的系统和方法
公开(公告)号：US20080168330A1
公开(公告)日：2008-07-10
申请号：US11620988
申请日：2007-01-08
申请人： Nils Graef , Erich F. Haratsch
发明人： Nils Graef , Erich F. Haratsch
IPC分类号： G06F11/16 , H03M13/41 , H03M13/45 , G11C29/00
CPC分类号： G11B20/18 , H03M13/4146
摘要： Various systems and methods for generating and/or ordering error indications are disclosed herein. In some cases, the error indication is used as an erasure pointer in a memory access system. As one particular example, a system for ordering erasure pointers is disclosed that includes a group of N sort cells, where N is a whole number. Each of the sort cells is operable to maintain a respective error indication that includes an error value and an associated error pointer. Further, the group of N sort cells is operable to receive an incoming error indication including error value and associated error pointer, and to update the error indication of one or more of the group of N sort cells based in part on the incoming error value. The system also includes a selector circuit that is operable to allow selectable access to each of the respective error pointers maintained in the group of N sort cells.
摘要翻译：本文公开了用于产生和/或排序错误指示的各种系统和方法。在某些情况下，错误指示用作存储器访问系统中的擦除指针。作为一个具体示例，公开了一种用于排序擦除指针的系统，其包括一组N个分类单元，其中N是整数。每个分类单元可操作以维持包括错误值和相关联的错误指针的相应错误指示。此外，N个分组单元的组可操作以接收包括错误值和相关联的错误指针的输入错误指示，并且部分地基于输入错误值来更新该N个分类单元组中的一个或多个的错误指示。该系统还包括选择器电路，其可操作以允许对维持在N个分类单元组中的每个相应错误指针的可选择访问。

9. 发明申请

US20080140310A1 SYSTEMS AND METHODS FOR PREPARING DIRECTIONAL INSTRUCTIONS 审中-公开
标题翻译：用于制定方向指示的系统和方法
公开(公告)号：US20080140310A1
公开(公告)日：2008-06-12
申请号：US11608902
申请日：2006-12-11
申请人： Nils Graef
发明人： Nils Graef
IPC分类号： G01C21/20
CPC分类号： G01C21/3673 , G01C21/3682
摘要： Various systems and methods for preparing directional instructions are disclosed herein. For example, a method for preparing directional instructions is discussed that includes receiving two route end points and identifying a route between the two end points. The route between the two end points may include, for example, at least one road and a distance. In addition, at least one landmark is identified along the route. A textual output is assembled that includes the name of the road, the distance and a description of the landmark.
摘要翻译：本文公开了用于准备定向指令的各种系统和方法。例如，讨论了一种用于准备定向指令的方法，其包括接收两个路线终点并识别两个端点之间的路由。两个终点之间的路线可以包括例如至少一条道路和一段距离。此外，沿路线识别至少一个地标。汇编了一个文本输出，其中包括道路名称，距离和地标的描述。

10. 发明申请

US20080077829A1 Systems and Methods for Generating Erasure Flags 有权
标题翻译：用于生成擦除标志的系统和方法
公开(公告)号：US20080077829A1
公开(公告)日：2008-03-27
申请号：US11535540
申请日：2006-09-27
申请人： Nils Graef , Erich F. Haratsch
发明人： Nils Graef , Erich F. Haratsch
IPC分类号： G11C29/00
CPC分类号： G11C7/1006 , G11C7/1051 , G11C7/1063 , G11C2029/0411
摘要： Various systems and methods for generating error indications are disclosed herein. In some cases, the error indication is used as an erasure pointer in a memory access system. As one particular example, a system for generating an erasure pointer is disclosed that includes accumulating a number of error values into an overall error value, and comparing the overall error value to an error threshold. When the overall error value exceeds the error threshold, an erasure pointer is generated. In one particular case, the error values are derived from a look up table using thermometer codes generated by an analog to digital converter. In other cases, the error values are derived from comparing a soft output with a reliability threshold.
摘要翻译：本文公开了用于产生误差指示的各种系统和方法。在某些情况下，错误指示用作存储器访问系统中的擦除指针。作为一个具体示例，公开了一种用于生成擦除指针的系统，其包括将多个错误值累积到总体错误值中，并将整体误差值与错误阈值进行比较。当总体错误值超过错误阈值时，产生擦除指针。在一个特定情况下，使用由模数转换器产生的温度计代码从查找表中导出误差值。在其他情况下，误差值是通过将软输出与可靠性阈值进行比较得出的。

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