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1. 发明授权

US5287106A Circuit for PCM conversion of an analog signal, with improvement in gain-tracking 失效
标题翻译：模拟信号的PCM转换电路，具有增益跟踪的改进
公开(公告)号：US5287106A
公开(公告)日：1994-02-15
申请号：US187507
申请日：1988-04-28
申请人： Daniel Senderowicz , Germano Nicollini , Carlo Crippa , Pierangelo Confalonieri
发明人： Daniel Senderowicz , Germano Nicollini , Carlo Crippa , Pierangelo Confalonieri
IPC分类号： H03M1/12 , H03M1/00 , H03M1/08 , H03M3/02 , H03M1/06 , H03M3/04
CPC分类号： H03M1/0604 , H03M1/12
摘要： The circuit includes a filter to which an analog signal is applied, a quantizer driven by the filter, a sampler at a desired frequency driven by the quantizer and a PCM encoder driven by the sampler. The quantizer generates a quantize signal according to the received analog signal and further generates a difference signal according to the difference between a quantized signal and the analog signal. A feedback circuit feeds back the difference signal from the quantizer to a stage of the filter so that the overall transfer function from the input of the feedback circuit to the output of the filter is equivalent to a low pass filtering.
摘要翻译：电路包括施加模拟信号的滤波器，由滤波器驱动的量化器，由量化器驱动的期望频率的采样器和由采样器驱动的PCM编码器。量化器根据接收到的模拟信号生成量化信号，并根据量化信号和模拟信号之间的差产生差分信号。反馈电路将差分信号从量化器反馈到滤波器的级，使得从反馈电路的输入到滤波器的输出的整体传递函数等效于低通滤波。

2. 发明授权

US5559687A Voltage multiplier for high output current with stabilized output voltage 失效
标题翻译：具有稳定输出电压的高输出电流的电压倍增器
公开(公告)号：US5559687A
公开(公告)日：1996-09-24
申请号：US261473
申请日：1994-06-17
申请人： Germano Nicollini , Pierangelo Confalonieri , Carlo Crippa
发明人： Germano Nicollini , Pierangelo Confalonieri , Carlo Crippa
IPC分类号： G11C17/00 , G11C16/06 , H02M3/07 , H02M9/04 , H02M3/18
CPC分类号： H02M3/07
摘要： A voltage multiplier for relatively high output current has its design output voltage stabilized and rendered independent of process spread, temperature, supply voltage and output current level, by a stabilization loop driving the switch that cyclically connects to ground a charge transfer capacitance of the functional voltage multiplier circuit. The feedback loop comprises an integrating stage, stabilized by creating a low-frequency zero in the transfer function for compensating one of two low-frequency poles of the transfer function of the whole circuit.
摘要翻译：用于相对较高输出电流的电压倍增器，其设计输出电压稳定并且独立于工艺扩展，温度，电源电压和输出电流电平，通过稳定环路驱动开关，循环地连接到接地的功能电压的电荷转移电容乘法器电路。反馈回路包括积分级，通过在传递函数中产生低频零点来稳定，以补偿整个电路的传递函数的两个低频极点中的一个。

3. 发明授权

US4799042A Apparatus and method for offset voltage correction in an analog to digital converter 失效
标题翻译：用于模数转换器中偏移电压校正的装置和方法
公开(公告)号：US4799042A
公开(公告)日：1989-01-17
申请号：US936368
申请日：1986-12-01
申请人： Pierangelo Confalonieri , Daniel Senderowicz , Germano Nicollini
发明人： Pierangelo Confalonieri , Daniel Senderowicz , Germano Nicollini
IPC分类号： H03M1/10 , H03M1/00 , H03M1/46 , H03M1/80 , H03M1/06
CPC分类号： H03M1/1047 , H03M1/464 , H03M1/804
摘要： A charge redistribution analog-to-digital converter is described that permits their ncorporation of offset voltage correction to provide an accurate reflection in the digitalized output signal of the analog input signal. In a distributed capacitor successive approximation device, additional capacitors are added both to a most significant bit array group of capacitors and to a least significant array group of capacitors that are used in conjunction with the offset voltage. The value of the offset voltage is stored in a register and the register determines various switch positions that determine the value of the offset voltage incorporated in the final output voltage.
摘要翻译：描述了一种电荷再分配模数转换器，其允许其偏移电压校正的组合在模拟输入信号的数字化输出信号中提供准确的反射。在分布式电容器逐次逼近装置中，附加电容器被添加到最高有效比特阵列组的电容器和与偏移电压结合使用的最不重要的阵列组的电容器。偏移电压的值存储在寄存器中，并且寄存器确定确定最终输出电压中所包含的偏移电压的值的各种开关位置。

4. 发明授权

US4609877A Buffer circuit with differential structure for measurement of capacitive charges 失效
标题翻译：具有差分结构的缓冲电路，用于测量电容性电荷
公开(公告)号：US4609877A
公开(公告)日：1986-09-02
申请号：US795834
申请日：1985-11-07
申请人： Germano Nicollini , Daniel Senderowicz , Pierangelo Confalonieri
发明人： Germano Nicollini , Daniel Senderowicz , Pierangelo Confalonieri
IPC分类号： H03F3/72 , G01R29/24 , H03F3/70 , H03F3/45
CPC分类号： G01R29/24
摘要： In a buffer with an operational amplifier having two inputs and two outputs and two feedback capacitances are inserted two other capacitances which in the measurement stage are switched in parallel to the feedback ones with opposite sign in such a manner as to cancel out the effects on the output voltage signal.
摘要翻译：在具有两个输入和两个输出的运算放大器和两个反馈电容的缓冲器中插入两个其他电容，其中测量级与具有相反符号的反馈开关平行地切换，以抵消对输出电压信号。

5. 发明授权

US08692612B2 Electronic device for regulating a variable capacitance of an integrated circuit 有权
标题翻译：用于调节集成电路的可变电容的电子装置
公开(公告)号：US08692612B2
公开(公告)日：2014-04-08
申请号：US12891409
申请日：2010-09-27
申请人： Pierangelo Confalonieri , Federico Guanziroli , Germano Nicollini
发明人： Pierangelo Confalonieri , Federico Guanziroli , Germano Nicollini
IPC分类号： H03B1/00 , H03K5/00 , H04B1/10
CPC分类号： H03H5/12
摘要： The present disclosure relates to an electronic regulation device of a variable capacitance of an integrated circuit having a time parameter depending on the variable capacitance. The regulation device includes a regulation loop, and is configured to generate in output a plurality of binary regulation signals.
摘要翻译：本公开涉及具有取决于可变电容的时间参数的集成电路的可变电容的电子调节装置。调节装置包括调节回路，并且被配置为在输出中产生多个二进制调节信号。

6. 发明授权

US4883993A Antibounce circuit for digital circuits 失效
标题翻译：数字电路防反弹电路
公开(公告)号：US4883993A
公开(公告)日：1989-11-28
申请号：US279036
申请日：1988-12-02
申请人： Pierangelo Confalonieri , Sergio Pernici , Germano Nicollini
发明人： Pierangelo Confalonieri , Sergio Pernici , Germano Nicollini
IPC分类号： H03K5/1252
CPC分类号： H03K5/1252
摘要： The antibounce circuit comprises:(a) a first flip-flop constituted by a first and a second NAND gate (10, 12) having their respective outputs connected to one of the inputs of the other gate, the free input of the first gate being the input for said digital signal;(b) a second flip-flop constituted by a third and fourth NAND gate (14, 16) having their respective outputs connected to one of the inputs of the other gate, the free input of the third gate being connected to the output of the first gate;(c) a non-inverting delay circuit (20, 22, 24) connecting the output of the third gate to the free input of the second gate;(d) a first inverter connecting the output of the delay circuit to the free input of the fourth gate.

7. 发明授权

US07400285B2 Circuit for reconstructing an analog signal from a digital signal and transmission system, particularly for WCDMA cellular telephony, including such circuit 有权
标题翻译：用于重建来自数字信号和传输系统的模拟信号的电路，特别是用于包括这种电路的WCDMA蜂窝电话
公开(公告)号：US07400285B2
公开(公告)日：2008-07-15
申请号：US11569630
申请日：2005-05-19
申请人： Germano Nicollini , Pierangelo Confalonieri , Riccardo Martignone
发明人： Germano Nicollini , Pierangelo Confalonieri , Riccardo Martignone
IPC分类号： H03M1/66
CPC分类号： H04B1/707
摘要： A circuit for reconstructing an analog signal starting from a digital input signal includes a digital to analog converter and a low pass-filter connected at the output of the converter for receiving the analog format signal and outputting a reconstructed analog signal. The low pass filter is an active filter continuous in time and current-coupled to the output of the digital-analog converter. The digital-analog converter is of the current-steering type functioning at a sampling frequency greater than the Nyquist frequency of the analog signal.
摘要翻译：用于重建从数字输入信号开始的模拟信号的电路包括数模转换器和连接在转换器输出端的低通滤波器，用于接收模拟格式信号并输出重构的模拟信号。低通滤波器是时间上连续的有源滤波器，并且与数模转换器的输出电流耦合。数模转换器是以大于模拟信号的奈奎斯特频率的采样频率工作的电流导向型。

8. 发明申请

US20070262894A1 Circuit For Reconstructing an Analog Signal From a Digital Signal and Transmission System, Particularly For Wcdma Cellular Telephony, Including Such Circuit 有权
标题翻译：用于从数字信号和传输系统重建模拟信号的电路，特别是用于Wcdma蜂窝电话，包括此类电路
公开(公告)号：US20070262894A1
公开(公告)日：2007-11-15
申请号：US11569630
申请日：2005-05-19
申请人： Germano Nicollini , Pierangelo Confalonieri , Riccardo Martignone
发明人： Germano Nicollini , Pierangelo Confalonieri , Riccardo Martignone
IPC分类号： H03M1/66 , H04M1/78
CPC分类号： H04B1/707
摘要： There is described a circuit for reconstructing an analog signal from a digital signal and wide-band transmission system, particularly for employment in cellular telephony systems, or more in general in mobile communication systems, that adopt the WCDMA standard. The circuit comprises: a digital to analog converter (DAC) suitable for receiving said digital signal and converting it into signal in analog.format;—a low pass-filter (LOW-PASS) connected at the output of said converter for receiving said signal in analog format and providing as output said reconstructed analog signal. Advantageously, the low pass filter (LOW-PASS) is an active filter continuous in time and current coupled to the output of the digital-analog converter (DAC) and the digital-analog converter (DAC) is a converter of the current-steering type functioning at sampling frequency greater than the Nyquist frequency of said analog signal to be reconstructed.
摘要翻译：描述了一种用于从数字信号和宽带传输系统重建模拟信号的电路，特别是用于蜂窝电话系统中的用途，或更一般地在采用WCDMA标准的移动通信系统中。该电路包括：适于接收所述数字信号并将其转换成模拟信号的数模转换器（DAC）; - 在所述转换器的输出处连接的低通滤波器（低通滤波器），用于接收所述信号以模拟格式提供并提供所述重构的模拟信号作为输出。有利地，低通滤波器（LOW-PASS）是连续的数字模拟转换器（DAC）的输出端的时间和电流连续的有源滤波器，并且数模转换器（DAC）是电流转向器在大于待重构的所述模拟信号的奈奎斯特频率的采样频率下工作。

9. 发明授权

US06940348B2 Differential amplifier circuit with common mode output voltage regulation 有权
标题翻译：差分放大电路采用共模输出电压调节
公开(公告)号：US06940348B2
公开(公告)日：2005-09-06
申请号：US10471807
申请日：2002-07-05
申请人： Pierangelo Confalonieri , Germano Nicollini , Riccardo Martignone
发明人： Pierangelo Confalonieri , Germano Nicollini , Riccardo Martignone
IPC分类号： H03F1/30 , H03F3/45
CPC分类号： H03F3/45937 , H03F1/303
摘要： The circuit comprises a differential amplifier with two inputs and two outputs and a common mode regulation circuit. Between a regulation terminal of the amplifier and the outputs there are connected first and second capacitors and first and second capacitive elements that by controlled switches are connected in parallel with, respectively, the first and second capacitors or alternately between first and second reference voltage terminals. The common mode output voltage is not exactly fixed at the beginning of the design, but is determined by attributing appropriate values to the first and second capacitive elements; more particularly, their capacitances C3 and C4 are chosen in such a way as to satisfy the following equality: Vcmn=Vrefl+[(Vrefp−Vrefm)/2]*(C4−C3)/(C3+C4), where Vcmn is the desired common mode output voltage, Vrefp and Vrefm are the differential output voltages and Vrefl is the voltage of the second reference terminal.
摘要翻译：该电路包括具有两个输入和两个输出的差分放大器和一个共模调节电路。在放大器的调节端子和输出端之间，连接有第一和第二电容器以及通过受控开关分别与第一和第二电容器或第一和第二参考电压端子并联连接的第一和第二电容元件。共模输出电压在设计开始时不是完全固定的，而是通过将适当的值归因于第一和第二电容元件来确定的; 更具体地说，它们的电容C3和C4以满足以下等式的方式选择：<？in-line-formula description =“In-line formula”end =“lead”？> Vcmn = Vrefl + [（Vrefp- Vrefm）/ 2] *（C 4 -C 3）/（C 3 + C 4），<？in-line-formula description =“In-line formula”end =“tail”？>其中Vcmn是所需的公共模式输出电压，Vrefp和Vrefm是差分输出电压，Vrefl是第二参考端子的电压。

10. 发明授权

US5617055A Electronic switch having reduced body effect 失效
标题翻译：电子开关具有减少的身体效果
公开(公告)号：US5617055A
公开(公告)日：1997-04-01
申请号：US509304
申请日：1995-07-31
申请人： Pierangelo Confalonieri , Germano Nicollini
发明人： Pierangelo Confalonieri , Germano Nicollini
IPC分类号： H01L27/04 , H01L21/822 , H01L21/8238 , H01L27/092 , H03K17/687 , H03K17/62
CPC分类号： H03K17/6872 , H03K2217/0018
摘要： An electronic switch having a reduced body effect includes first and second switch terminals. A first transistor of a first type has a control terminal, a first substrate coupled to a first voltage level, and first and second drive terminals respectively coupled to the first and second switch terminals. A second transistor of a second type has a control terminal, a second substrate, a first drive terminal coupled to the second substrate and to the first switch terminal, and a second drive terminal. A third transistor of the second type has a control terminal, a third substrate, a first drive terminal coupled to the second drive terminal of the second transistor, and a second drive terminal coupled to the third substrate and to the second switch terminal. A fourth transistor of a first type has a control terminal, a fourth substrate, a first drive terminal coupled to the second drive terminal of the second transistor, and a second drive terminal coupled to the fourth substrate and a first voltage level.
摘要翻译：具有减小的身体效应的电子开关包括第一和第二开关端子。第一类型的第一晶体管具有控制端子，耦合到第一电压电平的第一衬底以及分别耦合到第一和第二开关端子的第一和第二驱动端子。第二类型的第二晶体管具有控制端子，第二基板，耦合到第二基板和第一开关端子的第一驱动端子和第二驱动端子。第二类型的第三晶体管具有控制端子，第三基板，耦合到第二晶体管的第二驱动端子的第一驱动端子和耦合到第三基板和第二开关端子的第二驱动端子。第一类型的第四晶体管具有控制端子，第四衬底，耦合到第二晶体管的第二驱动端子的第一驱动端子和耦合到第四衬底的第二驱动端子和第一电压电平。

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